KR20040040636A - Liquid Crystal Display Panel And Fabricating Method Thereof - Google Patents

Abstract

PURPOSE: A liquid crystal display and a manufacturing method thereof are provided to enable a spacer and an electrode pattern positioned at a non-display region simultaneously to be formed. CONSTITUTION: A lower substrate(51) of the liquid crystal display comprises a TFT(T) positioned at the crossing portion of a data line(54) and a gate line(52). A pixel electrode(72) is connected to a drain electrode(60) of the TFT(T). A storage capacitor(SC) is positioned at a superposed portion of the pixel electrode(72) and the gate line(52). A gate pad portion(GP) and a data pad portion(DP) are formed at a side of the data line(54) and the gate line(52). A spacer(76) is formed superposedly to the pixel electrode(72) positioned at the non-display region.

Description

Liquid Crystal Display Panel And Fabrication Method Thereof

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display panel, and more particularly, to a liquid crystal display panel capable of forming a spacer simultaneously with an electrode pattern positioned in a non-display area, and a manufacturing method thereof.

In general, a liquid crystal display (LCD) displays an image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, the liquid crystal display device includes a liquid crystal display panel in which liquid crystal cells are arranged in a matrix, and a driving circuit for driving the liquid crystal display panel. The liquid crystal display panel is provided with pixel electrodes and a reference electrode, that is, a common electrode, for applying an electric field to each of the liquid crystal cells. In general, the pixel electrode is formed for each liquid crystal cell on the lower substrate, while the common electrode is integrally formed on the front surface of the upper substrate. Each of the pixel electrodes is connected to a thin film transistor (hereinafter referred to as "TFT") used as a switching element. The liquid crystal cell is driven along with the common electrode in accordance with the data signal supplied through the TFT.

Referring to FIG. 1, a liquid crystal display panel according to the related art includes a top plate including a black matrix 2, a color filter 30, a common electrode 28, and an upper alignment layer 24a sequentially formed on an upper substrate 31. , A lower plate composed of a TFT formed on the lower substrate 1, a pixel electrode 22, and a lower alignment layer 24b, a pattern spacer 26 formed between the upper plate and the lower plate, the upper plate, the lower plate, and the pattern spacer 26. Liquid crystal (not shown) is injected into the inner space provided by the).

In the upper plate, the black matrix 2 is formed in a matrix form on the upper substrate 31 to divide the surface of the upper substrate 31 into a plurality of cell regions in which the color filters 30 are to be formed, as well as optical interference between adjacent cells. It will act to prevent. On the upper substrate 31 on which the black matrix 2 is formed, color filters 30 of red, green, and blue primary colors are sequentially formed. The common electrode 28 to which the ground potential is supplied is formed on the upper substrate 31 on which the black matrix 2 and the color filter 30 are formed. The upper alignment layer 24a is formed by applying a material such as polyimide onto the upper substrate 31 on which the common electrode 28 is formed and then performing a rubbing process.

The TFT for switching the driving of the liquid crystal cell on the lower plate includes the gate electrode 6 connected to the gate line (not shown), the source electrode 8 connected to the data line (not shown), and the pixel electrode 22 through the contact hole. And a drain electrode 10 connected to it. Further, the TFT is formed by the gate insulating film 12 for insulating the gate electrode 6, the source electrode 8, and the drain electrode 10, and the source electrode 8 by the gate voltage supplied to the gate electrode 6; The semiconductor layers 14 and 16 are further provided to form a conductive channel between the drain electrodes 10. This TFT selectively supplies the data signal from the data line to the pixel electrode 22 in response to the gate signal from the gate line. The pixel electrode 22 is formed of a transparent conductive material having a high light transmittance and positioned in a cell region divided by a data line and a gate line. The pixel electrode 22 is formed on the passivation layer 18 coated on the entire surface of the lower substrate 1, and is electrically connected to the drain electrode 10 through a contact hole formed in the passivation layer 18. The pattern spacer 26 is formed on the lower substrate 1 on which the pixel electrode 22 is formed. The pattern spacer 26 serves to provide a space for injecting liquid crystal (not shown) between the upper plate and the lower plate. The lower alignment layer 24b is formed to cover the pattern spacer 26 and the pixel electrode 22.

Finally, the upper and lower plates made separately as described above are bonded to each other, and then the liquid crystal is injected into and sealed in the liquid crystal space provided by the pattern spacer 26 to complete the liquid crystal display device.

A conventional method for manufacturing a pattern spacer will be described with reference to FIGS. 2A to 2D.

First, as shown in FIG. 2A, a material mixed with a solvent, a binder, a monomer, and a photoinitiator is printed and dried on the substrate 11, and then the solvent is evaporated to form a spacer in which the binder, the monomer, and the photoinitiator are mixed. Material 26a is formed. Here, the substrate 11 uses at least one of a lower substrate on which a TFT and a pixel electrode are formed and an upper substrate on which a common electrode is formed.

After applying the photoresist 32 on the substrate 11 on which the spacer material 26a is formed, the photomask MS is aligned as shown in FIG. 2B. The photomask MS includes a blocking layer 36 formed in the blocking region S1 and a transmission layer formed in the exposure region S2. In the photomask MS, the transparent photomask substrate 34 is exposed as it is in the exposure area S2. By using the photomask MS, an exposure step of selectively irradiating the ultraviolet light to the photoresist 32 and a developing step of developing the exposed photoresist are performed, as shown in FIG. 2C. To form. The spacer material 26a is patterned by an etching process using the photoresist pattern 38 as a mask to form a pattern spacer 26 having a predetermined height as shown in FIG. 2D.

The pattern spacer 26 of the conventional liquid crystal display device occupies about 2% of the area of the substrates 1 and 31. The spacer material 26a printed on the substrates 1 and 31 on the substrate 1 and 31 to form the pattern spacer 26 has a high material cost and a manufacturing cost such that more than about 95% of the spacer material 26a is removed during the exposure, development, and etching processes. . In addition, a process such as printing, exposure, development, and etching processes for forming the pattern spacer 26 is complicated.

In order to solve this problem, as shown in FIGS. 3A to 3C, a spacer is formed by using an inkjet ejection apparatus.

The inkjet ejection apparatus 40 is aligned on the substrate 11 so as to overlap with the formation position of the spacer, as shown in FIG. 3A. The substrate 11 uses at least one of the lower substrate 1 on which the TFT and the pixel electrode are formed and the upper substrate 31 on which the common electrode is formed.

Using this inkjet ejection apparatus 40, a spacer material 26a is ejected onto the substrate 11 as shown in FIG. 3B. That is, when voltage is applied to the piezoelectric element of the inkjet head 44, a physical pressure is generated, and the flow path between the container 42 containing the spacer material 26a and the nozzle 46 is contracted and relaxed. Spacer material 26a is sprayed onto the substrate 11 through the nozzle 46.

The spacer 26 formed by spraying the spacer material 26a through the nozzle 46 is exposed to ultraviolet rays by the light source 48 or calcined by heat, as shown in FIG. 3C. Will have (H).

The spacer 26 formed by the conventional inkjet method is subjected to gravity while falling to the substrate 11 through the nozzle in a state of low viscosity. Accordingly, the spacers 26, which should be formed to overlap with the black matrix 2, are widely spread when they are seated on the substrate 11. That is, the spacer 26 seated on the substrate 11 has a small height / spread width ratio, so that the spacer 26 is formed in a display area that does not overlap with the black matrix 2 and appears to be uneven on the display area. There is this.

Accordingly, an object of the present invention is to provide a liquid crystal display panel and a method of manufacturing the same, which can form a spacer simultaneously with an electrode pattern positioned in a non-display area.

1 is a cross-sectional view showing a conventional liquid crystal display panel.

2A to 2D are cross-sectional views illustrating a method of manufacturing the pattern spacer shown in FIG. 1.

3A to 3C illustrate a method of manufacturing a spacer using a conventional inkjet.

4 is a plan view illustrating a lower substrate of a liquid crystal display panel according to a first exemplary embodiment of the present invention.

FIG. 5 is a cross-sectional view illustrating a lower substrate of the liquid crystal display panel taken along the line "I-I '" in FIG.

6 is a plan view illustrating a black matrix formed on an upper substrate positioned to face the lower substrate illustrated in FIG. 4.

7A to 7E are cross-sectional views illustrating a method of manufacturing a lower substrate of the liquid crystal display panel illustrated in FIG. 6.

8A to 8D are cross-sectional views illustrating in detail a method of manufacturing the spacer shown in FIG. 7E.

9 is a plan view illustrating a lower substrate of a liquid crystal display panel according to a second exemplary embodiment of the present invention.

FIG. 10 is a cross-sectional view illustrating a lower substrate of the liquid crystal display panel taken along the line " II-II '"

11A through 11E are cross-sectional views illustrating a method of manufacturing a lower substrate of the liquid crystal display panel illustrated in FIG. 10.

12A to 12D are cross-sectional views illustrating in detail a method of manufacturing the spacer illustrated in FIG. 11C.

<Explanation of symbols for main parts of drawing>

1,31,51: Substrate 2,102: Black Matrix

6,56 gate electrode 8,58 source electrode

10,60 drain electrode 12,62 gate insulating film

14,64: active layer 16,66: ohmic contact layer

18,68 protective layer 22,72 pixel electrode

26, 76: spacer 28: common electrode

30: color filter

In order to achieve the above object, the liquid crystal display panel according to the present invention, the upper substrate having a black matrix, the lower substrate having a storage electrode formed to overlap with the black matrix and a pixel electrode formed to partially overlap the storage electrode, and black And a spacer formed simultaneously with at least one of the pixel electrode and the storage electrode overlapping the matrix.

A gate line formed to overlap the storage electrode, a data line formed to cross the gate line, a thin film transistor formed at an intersection of the gate line and the data line, and a pixel connected to the drain electrode of the thin film transistor on the lower substrate; It is characterized by including an electrode.

The pixel electrode is in contact with the story electrode.

The spacers may be formed to overlap one side of the pixel electrode.

The spacer is formed to overlap one side of the storage electrode.

The spacer may be formed of a material reacting to light.

In order to achieve the above object, a method of manufacturing a liquid crystal display panel according to the present invention comprises the steps of preparing an upper substrate having a black matrix, depositing the transparent metal layer on a lower substrate facing the upper substrate, black matrix And spraying a spacer material on the transparent metal layer partially overlapping with each other by an inkjet method, and simultaneously forming a pixel electrode by simultaneously patterning the transparent metal layer and the spacer material and forming a spacer having the same pattern as one side of the pixel electrode. Characterized in that it comprises a.

The spacer material is characterized in that the material that reacts to light.

Patterning the transparent metal layer and the spacer material at the same time includes forming a photoresist to cover the transparent metal layer and the spacer material, and exposing and developing a lower substrate on which the photoresist is formed to form a photoresist pattern and a spacer pattern; And etching the transparent metal layer using a photoresist pattern.

In order to achieve the above object, a method of manufacturing a liquid crystal display panel according to another embodiment of the present invention comprises the steps of providing an upper substrate having a black matrix, and depositing a data metal layer on the lower substrate facing the upper substrate; Spraying a spacer material on the data metal layer by an inkjet method so as to overlap the black matrix, and simultaneously patterning the data metal layer and the spacer material to form a storage electrode and forming a spacer having the same pattern as one side of the storage electrode. Characterized in that it comprises a step.

The spacer material is characterized in that the material that reacts to light.

The patterning of the data metal layer and the spacer material at the same time may include forming a photoresist to cover the data metal layer and the spacer material, exposing and developing a lower substrate on which the photoresist is formed, to form a photoresist pattern and a spacer pattern; And etching the transparent metal layer using a photoresist pattern.

Other objects and features of the present invention in addition to the above objects will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 through 12D.

4 is a plan view illustrating a lower substrate of the liquid crystal display panel according to the first exemplary embodiment of the present invention, and FIG. 5 is a cross-sectional view illustrating a lower substrate of the liquid crystal display panel illustrated in FIG. 4.

4 and 5, the lower substrate 51 of the liquid crystal display panel according to the first embodiment of the present invention may include a TFT (T) positioned at an intersection of the data line 54 and the gate line 52. The pixel electrode 72 connected to the drain electrode 60 of the TFT (T), the storage capacitor SC located at an overlapping portion of the pixel electrode 72 and the gate line 52, and the data line 54. ) And a gate pad portion GP and a data pad portion DP formed at one end of the gate line 52, and a spacer 76 formed to overlap the pixel electrode 72 positioned in the non-display area. do.

The TFT T is a drain electrode connected to the pixel electrode 72 through the gate electrode 56 connected to the gate line 52, the source electrode 58 connected to the data line 54, and the drain contact hole 70a. An electrode 60 is provided. In addition, the TFT (T) further includes semiconductor layers 64 and 66 for forming a conductive channel between the source electrode 58 and the drain electrode 60 by the gate voltage supplied to the gate electrode 56. The TFT T selectively supplies the data signal from the data line 54 to the pixel electrode 72 in response to the gate signal from the gate line 52.

The pixel electrode 72 is formed in a cell region divided by the data line 54 and the gate line 52 and is made of a transparent conductive material having high light transmittance. The pixel electrode 72 is formed on the protective layer 68 coated on the entire surface of the substrate 51, and is electrically connected to the drain electrode 60 through the drain contact hole 70a penetrating through the protective layer 68. . The pixel electrode 72 generates a potential difference from a common electrode (not shown) formed on the upper substrate (not shown) by the data signal supplied through the TFT (T). Due to this potential difference, the liquid crystal located between the lower substrate 51 and the upper substrate (not shown) rotates due to the dielectric anisotropy. The amount of light transmitted from the light source to the upper substrate through the pixel electrode 72 is adjusted by the rotated liquid crystal.

The storage capacitor SC serves to suppress voltage fluctuation of the pixel electrode 72. The storage capacitor SC is formed of a storage electrode 74 formed with a gate line 52 and a gate insulating layer 62 interposed therebetween. The storage electrode 74 is in electrical contact with the pixel electrode 72 through the storage contact hole 70b.

The gate pad part GP and the data pad part DP are positioned at one end of each of the gate line 52 and the data line 54 to be connected to a driving integrated circuit (IC). The gate pad part GP supplies a gate signal for controlling the TFT T to the gate line 52, and the data pad part DP supplies a data signal for controlling the TFT T to the data line 54. Supplies).

The gate pad 82 is in electrical contact with the gate protection electrode 86 through the gate contact hole 70c, and the data pad 78 is in electrical contact with the data protection electrode 80 through the data contact hole 70d. do.

The spacer 76 is formed simultaneously with the pixel electrode 72 on the pixel electrode 72 partially overlapping with the black matrix 102 formed on the upper substrate (not shown) shown in FIG. 6. For example, the spacer 76 is formed to overlap at least one of the gate line 52 and the storage electrode 74 on the pixel electrode 72 forming the storage capacitor SC. The spacer 76 formed at the same time as the pixel electrode 72 is formed in the same pattern as one side of the pixel electrode 72. At this time, the width of the spacer 76 is formed such that the black matrix 102 is smaller than or equal to the width. The spacer 76 serves to maintain a cell gap between the lower substrate 51 and the upper substrate.

A method of manufacturing the lower substrate of the liquid crystal display panel will be described with reference to FIGS. 7A to 7E taken along the line "I-I '" in FIG. 4.

Referring to FIG. 7A, a gate pattern including a gate electrode 56, a gate line 52, and a gate pad 82 is formed on the lower substrate 51.

The gate metal layer is deposited on the lower substrate 51 by a deposition method such as sputtering. The gate metal layer is made of aluminum (Al) or aluminum alloy. The gate metal layer is patterned by a photolithography process including an etching process using a first mask to form a gate pattern including the gate line 52, the gate electrode 56, and the gate pad 82.

Referring to FIG. 7B, the gate insulating layer 62, the active layer 64, and the ohmic contact layer 66 are formed on the lower substrate 51 on which the gate pattern is formed.

As the gate insulating layer 62, silicon oxide (SiOx) or silicon nitride (SiNx), which is an inorganic insulating material, is used. First and second semiconductor layers are successively deposited on the gate insulating layer 62 by a chemical vapor deposition method. The first semiconductor layer is formed of amorphous silicon that is not doped with impurities, and the second semiconductor layer is formed of amorphous silicon doped with N or P impurities. Subsequently, the first and second semiconductor layers are patterned by a photolithography method including a dry etching process using a second mask to form the active layer 64 and the ohmic contact layer 66.

Referring to FIG. 7C, a data pattern is formed on the lower substrate 51 on which the active layer 64 and the ohmic contact layer 66 are formed.

The data metal layer is deposited on the gate insulating layer 62 on which the active layer 64 and the ohmic contact layer 66 are formed by a deposition method such as a CVD method or sputtering. The data metal layer is formed of chromium (Cr) or molybdenum (Mo). Subsequently, the data metal layer is patterned by a photolithography process including a wet etching process by using a third mask, so that the source electrode 58, the drain electrode 60, the storage electrode 74, the data line 54 and the data pad are formed. A data pattern comprising a is formed. Next, the ohmic contact layer 66 exposed between the source electrode 58 and the drain electrode 60 is removed by a dry etching process to separate the source electrode 58 and the drain electrode 60. As the ohmic contact layer 66 is partially removed, a portion of the active layer 64 overlapping with the gate electrode 56 between the source and drain electrodes 58 and 60 becomes a channel.

Referring to FIG. 7D, a passivation layer 68 is formed on the lower substrate 51 on which the data pattern is formed.

The passivation layer 68 is formed by depositing an insulating material on the lower substrate 51 on which the data pattern is formed. As the insulating material, inorganic insulating materials such as silicon nitride (SiNx) and silicon oxide (SiOx), or organic insulating materials such as acryl-based organic compounds, benzocyclobutene (BCB) and perfluorocyclobutane (PFCB) are used. Subsequently, the passivation layer 68 is patterned by a photolithography process including an etching process using a fourth mask to drain drain holes 70a, storage contact holes 70b, gate contact holes 70c and data contact holes ( 70d) is formed.

Referring to FIG. 7E, a transparent electrode pattern and a spacer 76 including the pixel electrode 72, the gate protection electrode 86, and the data protection electrode are formed on the lower substrate 51 on which the passivation layer 68 is formed.

The transparent metal layer is formed on the lower substrate 51 on which the passivation layer 68 is formed by a deposition method such as sputtering. The transparent metal layer may be indium tin oxide (hereinafter referred to as "ITO"), indium zinc oxide (hereinafter referred to as "IZO"), or indium tin oxide (hereinafter referred to as "IZO"). (Indium-Tin-Zinc-Oxide: hereafter referred to as "ITZO"). Subsequently, the photosensitive spacer material is sprayed onto the transparent metal layer partially overlapping with the black matrix using an inkjet spraying value on the transparent metal layer. Then, the transparent metal layer and the photosensitive spacer material are simultaneously patterned in a photolithography process including an etching process using a fifth mask, thereby providing a transparent electrode including a pixel electrode 72, a gate protection electrode 86, and a data protection electrode. Patterns and spacers 76 are formed. The pixel electrode 72 is connected to the drain electrode 60 through the drain contact hole 70a passing through the passivation layer 68, and the storage electrode 74 through the storage contact hole 70b passing through the passivation layer 68. Connected with. The gate protection electrode 86 is connected to the gate pad 82 through a gate contact hole 70c penetrating through the gate insulating film 62 and the protection film 68. The data protection electrode is connected to the data pad through the data contact hole penetrating the passivation layer 68.

8A to 8D are cross-sectional views illustrating in detail a method of forming the transparent electrode pattern and the spacer illustrated in FIG. 7E.

First, a transparent metal layer 72a is entirely deposited on the lower substrate 51 on which the passivation layer 68 is formed, as shown in FIG. 8A. The inkjet injection apparatus 90 is aligned on the lower substrate 51 on which the transparent metal layer 72a is entirely deposited. The photosensitive spacer material 76a is sprayed onto the transparent metal layer 72a overlapping the gate line 52 using the inkjet jet apparatus 90, and then soft-baked. Here, the photosensitive spacer material 76a is a material that does not react to the stripping liquid of a stripping process performed later. A negative photoresist 96 is entirely coated on the lower substrate 51 on which the photosensitive spacer material 76a is mounted, as shown in FIG. 8B. The photoresist 96 may use a positive photoresist in which a region reactive to light is removed in the development process instead of a negative photoresist in which the region not reacting to the light is removed in the developing process. The photomask MS, which is the fifth mask, is aligned on the lower substrate 51 on which the photoresist 96 is entirely coated. Here, the photomask MS includes a blocking layer 94 formed in the blocking region S1 and a transmission layer formed in the exposure region S2. The transparent layer is formed such that the transparent photomask substrate 92 is exposed as it is.

In the exposure process using the photomask MS, the photoresist is exposed through the exposure area S2 of the photomask MS to the developer 100 sprayed from the developing apparatus 98 as shown in FIG. 8C. Both the photoresist and the photosensitive spacer material 76a that are shielded through the blocking region S1 are removed. The photoresist exposed through the exposure area S2 remains and is formed as a photoresist pattern 88 on the lower substrate 51, and the photosensitive spacer material 76a exposed through the exposure area is formed on the lower substrate 51. Formed in the spacer pattern 76b. After the development process, the spacer pattern 76b is hard-baked at a predetermined temperature.

After etching the transparent metal layer 72a using the photoresist pattern 88 as a mask, a stripping process is performed to remove the photoresist pattern 88 remaining on the lower substrate 51, as shown in FIG. 8D. 72, gate protection electrode 86 and spacer 76 are formed. The spacer 76 is formed simultaneously with the pixel electrode 72 on the pixel electrode 72 overlapping the black matrix.

As described above, the spacer according to the first embodiment of the present invention is formed simultaneously with the pixel electrode on the pixel electrode overlapping the black matrix. Accordingly, the spacers can be formed in the non-display area to prevent deterioration of image quality such as spots, and can be formed simultaneously with the pixel electrodes to reduce the number of steps for forming a conventional pattern spacer. In addition, the material cost can be reduced by applying the spacer material only to a desired position using the ink jet ejection apparatus.

9 is a plan view illustrating a lower substrate of a liquid crystal display panel according to a second exemplary embodiment of the present invention, and FIG. 10 is a cross-sectional view illustrating a lower substrate of the liquid crystal display panel illustrated in FIG. 9.

9 and 10, the lower substrate of the liquid crystal display panel according to the second exemplary embodiment of the present invention is compared with the lower substrate of the liquid crystal display panel of FIG. 4 except for a spacer formed at the same time as the storage electrode. With the same components.

The spacer 76 is formed simultaneously with the storage electrode 74 on the storage electrode 74 overlapping with the black matrix 102 formed on the upper substrate (not shown). The spacer 76 formed at the same time as the storage electrode 74 is formed in the same pattern as one side of the storage electrode 74. At this time, the width of the spacer 76 is formed such that the black matrix 102 is smaller than or equal to the width. The spacer 76 serves to maintain a cell gap between the lower substrate 51 and the upper substrate.

A method of manufacturing the lower substrate of the liquid crystal display panel will be described with reference to FIGS. 11A through 11E taken along the line " II-II '"

Referring to FIG. 11A, a gate pattern is formed on the lower substrate 51.

The gate metal layer is deposited on the lower substrate 51 by a deposition method such as sputtering. The gate metal layer is made of aluminum (Al) or aluminum alloy. The gate metal layer is patterned by a photolithography process including an etching process using a first mask to form a gate pattern including the gate electrode 56, the gate line 52, and the gate pad 82.

Referring to FIG. 11B, a gate insulating layer 62, an active layer 64, and an ohmic contact layer 66 are formed on the lower substrate 51 on which the gate pattern is formed.

As the gate insulating layer 62, silicon oxide (SiOx) or silicon nitride (SiNx), which is an inorganic insulating material, is used. First and second semiconductor layers are successively deposited on the gate insulating layer 62 by a chemical vapor deposition method. The first semiconductor layer is formed of amorphous silicon that is not doped with impurities, and the second semiconductor layer is formed of amorphous silicon doped with N-type or P-type impurities. Subsequently, the first and second semiconductor layers are patterned by a photolithography method including a dry etching process using a second mask to form the active layer 64 and the ohmic contact layer 66.

Referring to FIG. 11C, a data pattern is formed on the lower substrate 51 on which the active layer 64 and the ohmic contact layer 66 are formed.

The data metal layer is deposited on the gate insulating layer 62 on which the active layer 64 and the ohmic contact layer 66 are formed by a deposition method such as a CVD method or sputtering. The data metal layer is formed of chromium (Cr) or molybdenum (Mo). Subsequently, a spacer material is sprayed onto the data metal layer using an inkjet injection value on the data metal layer. Then, the pattern is patterned by a photolithography process including a wet etching process by using a third mask to form a data pattern including a source electrode 58, a drain electrode 60, a storage electrode 74, a data line, and a data pad. And spacer 76 are formed. Next, the ohmic contact layer 66 exposed between the source electrode 58 and the drain electrode 60 is removed by a dry etching process to separate the source electrode 58 and the drain electrode 60. As the ohmic contact layer 66 is partially removed, a portion of the active layer 64 overlapping with the gate electrode 56 between the source and drain electrodes 58 and 60 becomes a channel.

Referring to FIG. 11D, a passivation layer 68 is formed on the lower substrate 51 on which the data pattern is formed.

The passivation layer 68 is formed by depositing an insulating material on the lower substrate 51 on which the data pattern is formed. As the insulating material, inorganic insulating materials such as silicon nitride (SiNx) and silicon oxide (SiOx), or organic insulating materials such as acryl-based organic compounds, benzocyclobutene (BCB) and perfluorocyclobutane (PFCB) are used. Subsequently, the passivation layer 68 is patterned by a photolithography process including an etching process using a fourth mask to drain drain contact hole 70a, storage contact hole 70b, gate contact hole 70c and data contact hole ( 70d) is formed.

Referring to FIG. 11E, a transparent electrode pattern is formed on the lower substrate 51 on which the passivation layer 68 is formed.

The transparent metal layer is formed on the lower substrate 51 on which the passivation layer 68 is formed by a deposition method such as sputtering. The transparent metal layer is made of ITO, IZO, ITZO, or the like. Subsequently, the transparent metal layer is simultaneously patterned in a photolithography process including an etching process using a fifth mask to form a transparent electrode pattern including the pixel electrode 72, the gate protection electrode 86, and the data protection electrode. The pixel electrode 72 is connected to the drain electrode 60 through the drain contact hole 70a passing through the passivation layer 68, and the storage electrode 74 through the storage contact hole 70b passing through the passivation layer 68. Connected with. The gate protection electrode 86 is connected to the gate pad 82 through a gate contact hole 70c penetrating through the gate insulating film 72 and the protection film 78. The data protection electrode is connected to the data pad through the data contact hole penetrating the passivation layer 68.

12A to 12D are cross-sectional views illustrating in detail a method of simultaneously forming the storage electrode and the spacer illustrated in FIG. 11C.

First, a data metal layer 59 is entirely deposited on the lower substrate 51 on which the gate insulating layer 62 is formed, as shown in FIG. 12A. The inkjet injection apparatus 90 is arranged on the lower substrate 51 on which the data metal layer 59 is deposited on the entire surface. The photosensitive spacer material 76a is sprayed onto the data metal layer 59 overlapping the gate line 52 by using the inkjet jet apparatus 90, and then soft-baked. Here, the photosensitive spacer material 76a is a material that does not react to the stripping liquid of a stripping process performed later.

A negative photoresist 96 is applied to the entire surface of the lower substrate 51 on which the photosensitive spacer material 76a is mounted, as shown in FIG. 12B. Instead of a negative photoresist in which a region that does not react to light is removed in the developing process, a positive photoresist in which a region that reacts to light is removed in the developing process may be used. The photomask MS, which is the third mask, is aligned on the lower substrate 51 on which the photoresist 96 is entirely coated. Here, the photomask MS includes a blocking layer 94 formed in the blocking region S1 and a transmission layer formed in the exposure region S2. The transparent layer is formed such that the transparent photomask substrate 92 is exposed as it is.

The photoresist 96 is exposed to light using the photomask MS, and then the photoresist is exposed to light through the blocking region S1 with the developer 100 sprayed from the developing apparatus 98 as shown in FIG. 12C. Both the resist 96 and the photosensitive spacer material 76a are removed, and the photoresist 96 and the photosensitive spacer material 76a exposed through the exposure area S2 remain to respectively photoresist on the lower substrate 51. It is formed of a pattern 88 and a spacer pattern 76b. After the developing process, the spacer pattern 76b is hard-baked at a predetermined temperature.

After etching the data metal layer 59 with the photoresist pattern 88 as a mask, a strip process of removing the photoresist pattern 88 remaining on the lower substrate 51 is carried out, as shown in FIG. 12D. (58), the drain electrode 60, the storage electrode 74 and the spacer 76 are formed. The spacer 76 is formed simultaneously with the storage electrode 74 on the storage electrode 74 overlapping the black matrix.

As described above, the spacer according to the second embodiment of the present invention is formed on the storage electrode overlapping the black matrix at the same time as the storage electrode. Accordingly, the spacer can be formed in the non-display area to prevent deterioration of image quality such as spots, and can be formed at the same time as the storage electrode to reduce the number of processes for forming a conventional pattern spacer. In addition, the material cost can be reduced by applying the spacer material only to a desired position using the ink jet ejection apparatus.

On the other hand, the manufacturing method of the liquid crystal display panel according to the first and second embodiments of the present invention is formed using the first to fifth masks, the electrode pattern and the spacer located in the non-display area regardless of the number of masks It can be formed at the same time.

As described above, the liquid crystal display panel and the method of manufacturing the same according to the present invention are formed simultaneously with at least one of the storage electrode and the pixel electrode overlapping the black matrix. Accordingly, the spacer formed by the conventional inkjet injection method and formed in the display area having a small ratio of height / spread width is patterned and removed at the same time as the electrode pattern located in the non-display area, thereby preventing deterioration of image quality such as spots. . In addition, since the spacer of the liquid crystal display panel according to the present invention is formed simultaneously with at least one of the storage electrode and the pixel electrode, the number of processes for forming a conventional pattern spacer can be reduced. In addition, the spacer of the liquid crystal display panel according to the present invention can reduce the material cost by applying the spacer material only to a desired position by using the inkjet injection method.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (12)

An upper substrate having a black matrix, A lower substrate having a storage electrode formed to overlap the black matrix and a pixel electrode formed to partially overlap the storage electrode; And a spacer formed simultaneously with at least one of the pixel electrode and the storage electrode overlapping the black matrix. The method of claim 1, On the lower substrate A gate line formed to overlap the storage electrode; A data line formed to intersect the gate line; A thin film transistor formed at an intersection of the gate line and the data line; And a pixel electrode connected to the drain electrode of the thin film transistor. The method of claim 1, And the pixel electrode is in contact with the story electrode. The method of claim 1, And the spacer is formed to overlap one side of the pixel electrode. The method of claim 1, And the spacer is formed to overlap one side of the storage electrode. The method of claim 1, And the spacer is formed of a material reacting to light. Preparing an upper substrate having a black matrix, Depositing the transparent metal layer on a lower substrate facing the upper substrate; Spraying a spacer material by an inkjet method on the transparent metal layer partially overlapping the black matrix; And patterning the transparent metal layer and the spacer material at the same time to form a pixel electrode and simultaneously forming a spacer having the same pattern as one side of the pixel electrode. The method of claim 7, wherein And the spacer material is a material reacting with light. The method of claim 7, wherein Simultaneously patterning the transparent metal layer and the spacer material Forming a photoresist to cover the transparent metal layer and the spacer material; Exposing and developing the lower substrate on which the photoresist is formed to form a photoresist pattern and a spacer pattern; And etching the transparent metal layer by using the photoresist pattern. Preparing an upper substrate having a black matrix, Depositing a data metal layer on a lower substrate facing the upper substrate; Spraying a spacer material on the data metal layer by an inkjet method so as to overlap the black matrix; And simultaneously patterning the data metal layer and the spacer material to form a storage electrode and simultaneously forming a spacer having the same pattern as one side of the storage electrode. The method of claim 10, And the spacer material is a material reacting with light. The method of claim 10, Simultaneously patterning the data metal layer and the spacer material Forming a photoresist to cover the data metal layer and the spacer material; Exposing and developing the lower substrate on which the photoresist is formed to form a photoresist pattern and a spacer pattern; And etching the transparent metal layer by using the photoresist pattern.