KR20040025956A - Thin film transistor substrate and method of manufacturing the same - Google Patents

Abstract

PURPOSE: A thin film transistor substrate is provided to increase cohesion between a spacer and an organic insulation layer and prevent the spacer from being peeled off from the organic insulation layer due to the impact from the outside by forming the spacer on the organic insulation layer. CONSTITUTION: An insulation substrate(210) is prepared. A thin film transistor(TFT)(220) is formed on the insulation substrate, located in a cross point of the first and second electrodes ramified from a gate line and a data line. The organic insulation layer(230) is formed on the insulation substrate having the TFT wherein the spacer(240) protruding from the upper surface of the organic insulation layer is formed in a predetermined region of the organic insulation layer.

Description

Thin Film Transistor Substrate and Manufacturing Method Thereof {THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor substrate and a method of manufacturing the same, and more particularly, to a thin film transistor substrate capable of maintaining a constant cell gap and preventing peeling of spacers in an alignment forming process. It is about.

In general, the liquid crystal display includes a spacer for maintaining a cell gap between the thin film transistor substrate and the color filter substrate in order to secure a liquid crystal layer having a constant thickness between the thin film transistor substrate and the color filter substrate. In the conventional spacer forming process, a scattering process of dispersing a spacer on a thin film transistor substrate is used, but such a scattering process is expensive and it is difficult to maintain a low cell gap to meet consumer demand for low voltage and high speed response liquid crystal.

Therefore, the spacer forming process can form a fine pattern, thereby maintaining a low cell gap, and use a photolithography technique that surpasses the scattering process in terms of cell gap uniformity.

1 is a cross-sectional view illustrating a general liquid crystal display device.

Referring to FIG. 1, a general liquid crystal display device 100 may include a thin film transistor substrate 60 including a thin film transistor 62, a color filter substrate 70 including a color filter layer 73, and a gap between the thin film transistor substrates 60. And a liquid crystal 80.

The thin film transistor substrate 60 includes a first substrate 61 made of a transparent material such as glass or plastic, a thin film transistor 62 provided on the first substrate 61, and the thin film transistor 62. An organic insulating layer 63 that is covered and coated on the first substrate 61, and an indium tin oxide (ITO) or an indium zinc oxide (IZO). And a pixel electrode 64 provided on the organic insulating layer 63 and a first alignment layer 65 provided on the pixel electrode 64.

Meanwhile, the color filter substrate 70 is provided on the second substrate 71 made of a transparent material, the black matrix pattern 72 provided on the second substrate 71, and the second substrate 71. An overcoating layer provided on the color filter layer 73 to cover the black matrix pattern 72 and to remove a step of the color filter layer 73 including red, green, and blue color filters, and the color filter layer 73. 74, a common electrode 75 made of ITO or IZO and coated on the entire surface of the overcoating layer 74, on the common electrode 75, and a position of the spacer corresponding to the black matrix pattern 72. And a second alignment layer 77 coated on the common electrode 75 provided with the spacer 76.

The thin film transistor substrate 60 and the color filter substrate 70 are coupled to face each other, and the spacer 76 provided on the color filter substrate 70 is in contact with the thin film transistor substrate 60. The cell gap between the thin film transistor substrate 60 and the color filter substrate 60 is maintained.

Orientation grooves (not shown) are formed on the first and second alignment layers 65 and 77 so that the liquid crystals 80 are regularly arranged in a predetermined direction. Polyimide (polyimide) on the pixel electrode 64 of the thin film transistor substrate 60 and the common electrode 75 of the color filter substrate 70 to form the first and second alignment layer formed with the alignment grooves imide) film is applied, and an alignment forming process is performed to form an alignment groove in a predetermined direction by rotating a rubbing roller on the polyimide film.

However, the spacer 76 is formed by coating an organic layer on the common electrode 150 and patterning the organic layer. The spacer 76 is formed by rotating the rubbing roller during the rubbing process. 75) easily peeled off.

Accordingly, it is an object of the present invention to provide a thin film transistor substrate capable of keeping the cell gap constant and preventing the spacer from peeling off during the alignment formation process.

In addition, another object of the present invention is to provide a method for manufacturing the thin film transistor substrate.

1 is a cross-sectional view of a general liquid crystal display device.

2 is a cross-sectional view illustrating a thin film transistor substrate according to an exemplary embodiment of the present invention.

3A to 3G are flowcharts illustrating a manufacturing process according to a first embodiment for forming the thin film transistor substrate illustrated in FIG. 2.

4A and 4B are flowcharts illustrating a manufacturing process according to a second embodiment for forming the thin film transistor substrate illustrated in FIG. 2.

<Description of the symbols for the main parts of the drawings>

210: insulated substrate 220: thin film transistor

230: organic insulating film 235: contact hole

240: spacer 250: pixel electrode

290: alignment layer

A thin film transistor substrate for achieving the object of the present invention, an insulating substrate, a thin film transistor provided on the insulating substrate, and located at the intersection of the first and second electrodes branched from a gate line and a data line, respectively, and the thin film It is provided on the insulated substrate with a transistor, Comprising: The predetermined area | region consists of the organic insulating film which has a spacer which protruded by predetermined height from the upper surface.

In addition, according to another aspect of the present invention, there is provided a method of manufacturing a thin film transistor substrate, including forming a thin film transistor on an insulating substrate, and forming an organic insulating layer on the insulating substrate so as to cover the thin film transistor. Forming a spacer having a predetermined height by patterning the organic insulating layer, forming a contact hole to expose a drain electrode of the thin film transistor on the organic insulating layer, and forming a pixel electrode on the organic insulating layer It comprises the step of forming.

In addition, according to another aspect of the present invention, there is provided a method of manufacturing a thin film transistor substrate, including forming a thin film transistor on an insulating substrate, and covering the thin film transistor on an organic insulating layer on the insulating substrate. Forming a spacer by pressing the organic insulating layer into a mold having a groove, forming a contact hole to expose the drain electrode of the thin film transistor on the organic insulating layer, and forming a pixel electrode on the organic insulating layer. It comprises a step of forming.

According to such a thin film transistor substrate and a method for manufacturing the same, the cell gap between the thin film transistor substrate and the color filter substrate can be kept constant, and the rubbing roller is formed during the alignment forming step of forming an alignment film and rubbing the alignment film. The spacer can be prevented from peeling off.

Hereinafter, a thin film transistor substrate and a method of manufacturing the same according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2 is a cross-sectional view illustrating a thin film transistor substrate according to an exemplary embodiment of the present invention.

Referring to FIG. 2, a thin film transistor substrate 200 according to an exemplary embodiment of the present invention covers an insulating substrate 210, a thin film transistor 220 and the thin film transistor 220 provided on the insulating substrate 210. The organic insulating layer 230 provided on the insulating substrate 210, the spacer 240 integrally provided with the organic insulating layer 230, the pixel electrode 250 provided on the organic insulating layer 230, and the The alignment layer 290 is provided on the pixel electrode 250 and has a groove formed in a predetermined direction.

The thin film transistor 220 may cover the gate electrode 221 and the gate electrode 221 branched from a gate line (not shown) provided in the first direction on the insulating substrate 210. The gate insulating layer 222 stacked on the entire surface, the active pattern 223 and the ohmic contact pattern 224 sequentially stacked on the gate insulating layer 222 and orthogonal to the first direction on the insulating substrate 210. A source electrode 225 and a data electrode 226 branched from a data line (not shown) provided in a second direction are formed.

The organic insulating layer 230 is provided to have a predetermined thickness to protect the thin film transistor 220, and a contact hole 235 is formed to expose the drain electrode 226.

The spacer 240 is integrally provided with the organic insulating layer 230, and a portion of the spacer 240 protrudes from a surface opposite to the surface in contact with the insulating substrate 210. In particular, the protruding position of the spacer 240 corresponds to the upper side of the gate line or the data line, and more preferably corresponds to the intersection of the gate line and the gate line.

The pixel electrode 250 is made of indium tin oxide (ITO) or indium zinc oxide (IZO), and the pixel electrode 250 is deposited on the organic insulating layer 230, The contact hole 235 formed in the organic insulating layer 230 is electrically connected to the drain electrode 226 of the thin film transistor 220.

An alignment layer 290 for arranging liquid crystals (not shown) in a predetermined direction is provided on the pixel electrode 250. An alignment groove (not shown) is provided on the alignment layer 290 in a predetermined direction, and the liquid crystal is arranged in a predetermined direction in the alignment groove formed by the rubbing roller (not shown).

Since the spacer 240 is integrally formed with the organic insulating layer 230, when the thin film transistor substrate 200 is coupled to face the color filter substrate, which is not shown, the spacer 240 is formed of the thin film transistor substrate ( 200) and the cell gap between the color filter substrate is kept uniform. In addition, during the rubbing process for forming the alignment groove, a defect in which the spacer 240 is peeled off from the thin film transistor substrate may be prevented by the rotation of the rubbing roller.

3A to 3G are flowcharts illustrating a manufacturing process according to a first embodiment of FIG. 2 for forming the thin film transistor substrate shown in FIG. 2.

Referring to FIG. 3A, after depositing a first metal film such as aluminum (Al), chromium (Cr), or molybdenum tungsten (MoW) on the insulating substrate 210, the first metal film is patterned to form a gate line (not shown). And a gate electrode 221 branching from the gate line. Subsequently, silicon nitride (SiNx) is deposited on the entire surface of the insulating substrate 210 on which the gate electrode 221 is formed by the plasma chemical vapor deposition (PECVD) method to deposit the gate insulating layer 222.

An amorphous silicon film and an in-situ doped amorphous silicon film are sequentially deposited on the gate insulating film 222 by a plasma chemical vapor deposition method, and the patterns are patterned on the gate insulating film 222 above the gate electrode 221. The active pattern 223 and the ohmic contact pattern 224 are formed.

Subsequently, after depositing a second metal film such as chromium (Cr) on the entire surface of the resultant, the second metal film is patterned to orthogonal to the gate line, and a source electrode branched from the data line. 225 and the drain electrode 226 are formed. Accordingly, the thin film transistor 130 including the gate electrode 221, the active pattern 223, the ohmic contact pattern 224, the source electrode 225, and the drain electrode 226 is completed. In this case, a gate insulating layer 222 is provided between the gate line and the data line to prevent the gate line and the data line from contacting each other.

On the insulating substrate 210 on which the thin film transistor 220 is formed, an organic insulating film 230 having photosensitivity is coated to a predetermined thickness. The thickness of the organic insulating layer 230 is coated in consideration of the height of the spacer and the depth of the contact hole.

Referring to FIG. 3B, the organic insulating film 230 is aligned with the first mask 300 on the insulating substrate 210 coated with a predetermined thickness, and the organic insulating film ( Spacer 230 is formed.

In detail, the first mask 300 transmits a first light blocking region 320 that blocks light to a region on the organic insulating layer on which the spacer is to be formed, and light that travels to a region other than the region where the spacer is to be formed. The first transmission region 310 is formed.

The position of the first light blocking region 320 corresponds to a gate line or a data line on the insulating substrate 210, and preferably corresponds to an intersection point of the gate line and the data line.

The organic insulating layer 230 is a kind of positive photoresist, and a region where light is incident upon an exposure process is removed by a developer in a developing process. Thus, a pattern is formed by leaving a region in which no light is incident during the exposure process in the developing process.

The first mask 300 is aligned on the insulating substrate 210, and light is supplied to the organic insulating layer 230 through the first mask 300. The light transmitted through the first opening region 310 demultiplexes the organic insulating layer 230.

Thereafter, the exposed insulating substrate 210 is developed using a developer. At this time, the region of the organic insulating layer 230 provided with light is removed, and the portion of the organic insulating layer 230 which is not incident with light is left as it is, thereby forming a spacer.

Referring to FIG. 3C, a contact hole is formed using the second mask 400 having a predetermined pattern formed on the organic insulating layer 230 on which the spacer 240 is formed.

In detail, the second mask 400 includes a second opening region 410 that transmits light to a position corresponding to the drain electrode 226 of the thin film transistor 220 formed on the insulating substrate 210. The second light blocking region 420 is formed in a region other than the second opening region 410 to block light.

As described above with reference to FIG. 3B, the organic insulating layer 230 is a kind of positive photoresist, and the second mask 400 is aligned with the insulating substrate 210, and the organic insulating layer 230 is aligned. Exposure and development. As a result, a contact hole exposing a part of the drain electrode 226 of the thin film transistor 220 is formed.

Detailed descriptions of the exposure and development processes are omitted because they are based on the same process as the exposure and development processes of the spacer 240.

When the organic insulating layer 230 is a rigid material, the organic insulating layer is sufficient to form the contact hole with the spacer 240 and to perform a function by itself without having to cure the organic insulating layer 240. There is no need to perform a bake process to cure 240.

Hereinafter, although not illustrated in the drawings, a case in which the organic insulating layer 230 is a soft example and a baking process for curing the organic insulating layer 30 will be described.

In the baking process for curing the organic insulating layer 230, a reflow phenomenon occurs in the organic insulating layer 230. The reflow phenomenon refers to a phenomenon in which the organic insulating layer 230 flows down with fluidity at a high temperature. As a result, the profile of the spacer 240 and the contact hole has a gentle curve.

A curing process may be further performed to reduce the reflow phenomenon of the organic insulating layer 230 before the baking process. The organic insulating layer 230 may be cured by heat or light, and the organic insulating layer 230 may be pre-cured by exposing UV light to the entire surface of the organic insulating layer 230 in which the spacer 240 and the contact hole are formed. When the baking process is performed, the reflow phenomenon of the organic insulating layer 230 may be reduced.

3D and 3E, an exposure, development, and etching process is performed such that the profile of the spacer 240 reflowed by the baking process has a steep slope.

The photoresist 260 is coated on the entire surface of the organic insulating layer 230 on which the spacer 240 and the contact hole 235 are formed. The photoresist 260 is a negative photoresist that is removed in a development process in which light is incident. Thereafter, the photoresist 260 is patterned using a third mask 500 to remove the photoresist 260 applied to the reflowed spacer 240.

In detail, the third mask 500 includes a third opening region 510 that transmits light to the sidewall region of the spacer 240 during an exposure process, and the third mask except for the third opening region 510. A third light blocking region 520 is formed to block light incident to the 500 region.

Light passing through the third opening region 510 exposes the photoresist 260 formed on the side surface of the spacer 240, and the photoresist 260 is removed in a developing process to remove the spacer 240. Expose the sides of the.

Thereafter, the side surface of the spacer 240 exposed by the dry etching process is etched to form a spacer 240 having a steep inclined profile.

FIG. 3F is a view for explaining a process for forming a pixel electrode on an organic insulating film. A transparent conductive film of ITO or IZO is formed on an organic insulating film 230 having a rigid spacer 240 having a steeply inclined profile. 270 is deposited on the front. The transparent conductive layer 270 is electrically connected to the drain electrode 226 of the thin film transistor 220. Thereafter, the transparent conductive film 270 is patterned to form a pixel electrode.

Next, referring to FIG. 3G, a polyimide thin film 280 is formed on an upper surface of the resultant, that is, a surface on which the pixel electrode 250 is formed to arrange liquid crystals (not shown) in a predetermined direction. In addition, an alignment forming process is performed to form an alignment groove (not shown) using the rubbing roller 700 in the polyimide thin film 280.

On the outer circumferential surface of the rubbing roller 700 is attached a rubbing cloth protruding a plurality of pile (pile). When the rubbing roller 700 is provided on the polyimide thin film 280 and moved in a predetermined direction, the rubbing cloth of the polyimide thin film 280 and the rubbing roller 700 rubs each other, and the rubbing roller A plurality of alignment grooves extending in the moving direction of 700 are formed. This completes the alignment layer 290 shown in FIG.

4A and 4B are flowcharts illustrating a manufacturing process according to a second embodiment for forming the thin film transistor substrate illustrated in FIG. 2.

4A and 4B, a thin film transistor 220 is formed on an insulating substrate 210, and an organic insulating layer 230 for protecting the thin film transistor 220 is coated to a predetermined thickness.

The mold 600 in which the predetermined groove 610 is formed on the surface facing the organic insulating layer 230 is aligned to face the insulating substrate 210.

The groove 610 is formed at a position where the spacer 240 is to be formed on the organic insulating layer 230, that is, at a position corresponding to a gate line or a data line on the insulating substrate 210. Preferably, the groove 610 is formed with a predetermined depth at a position corresponding to the intersection of the gate line and the data line.

The mold 600 having the grooves 610 is moved toward the organic insulating layer 230 to compress the organic insulating layer 230.

As a result, the organic insulating layer 230 is pushed into the groove 610 of the mold 600, so that the spacer having the same shape as the groove 610 formed in the mold 600 is formed on the organic insulating layer 230. 240 is formed.

Thereafter, forming a contact hole on the organic insulating layer, curing the organic insulating layer including the spacers, forming a pixel electrode, and forming an alignment layer are described with reference to FIGS. 3C to 3G. Since it is the same as that, it will be omitted below.

By integrally forming the spacer on the organic insulating film, the cell gap between the thin film transistor substrate and the color filter substrate is kept constant, and the spacer is prevented from being peeled off by the rotation of the rubbing roller during the alignment formation process. Can be.

As described above, according to the present invention, by providing a spacer integrally with the organic insulating layer on the organic insulating layer of the thin film transistor substrate, the bonding force between the spacer and the organic insulating layer is increased, thereby preventing the organic matter of the spacer due to external impact. Peeling from an insulating film can be prevented.

In particular, when the alignment film is formed on the thin film transistor substrate, it is possible to prevent the spacer from being easily peeled from the thin film transistor substrate by the rubbing roller when the rubbing roller is rotated to form the alignment groove on the alignment film. have.

Although described with reference to the embodiments above, those skilled in the art will understand that the present invention can be variously modified and changed without departing from the spirit and scope of the invention as set forth in the claims below. Could be.

Claims (7)

Insulating substrate; A thin film transistor provided on the insulating substrate and positioned at an intersection point of the first and second electrodes branched from the gate line and the data line, respectively; And A thin film transistor substrate comprising an organic insulating layer provided on the insulating substrate having the thin film transistor, the organic insulating film having a spacer protruding a predetermined height from a top surface. The thin film transistor substrate of claim 1, wherein a position of the spacer corresponds to an intersection point of the gate line and the data line. Forming a thin film transistor on an insulating substrate; Forming an organic insulating film on the insulating substrate to cover the thin film transistor; Patterning the organic insulating layer to form a spacer having a predetermined height; Forming a contact hole on the organic insulating layer to expose the drain electrode of the thin film transistor; And Forming a pixel electrode on the organic insulating film. The method of claim 3, wherein after forming the contact hole, And baking the organic insulating film to cure the organic insulating film. The method of claim 4, wherein before baking the organic insulating layer, And pre-curing the organic insulating layer by exposing ultraviolet rays to the entire surface of the organic insulating layer. The method of claim 4, wherein after baking the organic insulating layer, Forming a photoresist pattern on the organic insulating layer to expose side surfaces of the spacer; And etching the side surfaces of the exposed spacers so that the side surfaces of the spacers have a steep inclined profile. Forming a thin film transistor on an insulating substrate; Forming an organic insulating film on the insulating substrate to cover the thin film transistor; Pressing the organic insulating layer into a mold having a groove to form a spacer; Forming a contact hole on the organic insulating layer to expose the drain electrode of the thin film transistor; And Forming a pixel electrode on the organic insulating film.