KR20040024755A - circuit for power control in computer system - Google Patents

Abstract

PURPOSE: A circuit for controlling power of a computer system is provided to secure an operation of a main power switch by disabling the operation of a CD-ROM switch when the computer is changed to a power saving mode during system operation. CONSTITUTION: The CD-ROM switch(3) supplies the power to a CD-ROM drive(21) in a state that the main power switch(1) is turned off. A power supply(19) includes a DC-DC converter converting the power from an adaptor or a battery into various voltages. An audio IC(20) is operated by receiving the power from the power supply when the CD-ROM switch is turned on. An audio CODEC(COder/DECoder) receives/processes audio data of the CD-ROM drive depending on a playback signal of the audio IC. A power switch operating circuit(15) generates an on/off-signal when the main power switch and the CD-ROM switch are selected. Controlling the power supply depending on the on/off of the main power switch and the CD-ROM switch, a power management controller(17) turns on/off the power supplied to a system board(23), and supplies the power to the audio IC and the CD-ROM drive by receiving the on-signal generated when the CD-ROM switch is turned on in the state that the main power switch is turned off.

Description

Power control circuit of computer system {circuit for power control in computer system}

The present invention relates to a computer system, and more particularly, to a power supply control circuit of a computer system having a CD-ROM drive operable even at power off.

Computer systems generally include a central processing unit that performs arithmetic and control functions, a storage device such as a hard disk drive and a CD-ROM drive, an input device such as a touch pad for mouse pointing input, a video chip that processes a video signal, The system main body is equipped with a sound chip that processes audio signals, and a chipset that manages data input / output and exchange between devices, and a video signal provided from a video chip connected to the system main body and a connector. It is composed of a display unit.

As described above, using a computer equipped with a CD-ROM drive, a user can listen to desired music as in the case of using a dedicated audio system. However, in order to listen to music with a computer, the power switch (not shown) is turned on and the system is booted, and then audio data processed by the sound chip is output as sound.

The audio IC is operated by a driving power source independent of the system power supply to process audio files of a disc inserted in the CD ROM drive. The power supply to the audio IC and the CD ROM drive is turned on at one side of the system main body. A CD ROM power switch for turning off was further provided.

Recently, a power management function called ACPI (Advanced Configuration and Power Interface Specification) for managing power of a system by dividing the system operation state of a computer system into six types has been proposed and used.

According to the ACPI, the power management state of a computer system is largely defined as a six-sleeping state, SO-S5. The state of S0 is the normal state, the states S1 to S4 are the state in which the power consumption of the computer system is gradually reduced, and the state of S5 is the soft off state with all the power of the system cut off. Here, the S3 state of ACPI is for rapid reuse of computer systems, in which power to other computer hardware devices other than the system memory and power management controller, consisting of volatile memory, is stopped. .

Such a power supply of a computer system having a power management function supports an ATX specification having a power supply structure separated into main power and standby power. Power supply that supports ATX standard always outputs standby power when external power is applied. This standby power is supplied to the computer system's power management controller (South Bridge).

The computer system having the above audio DJ function has a power supply control circuit diagram as shown in FIG. Here, SYS_PSW_CTL * is a system power state signal indicating a power state of the system board, and PW_BTN_IN * and AUD_PWR_BTN * are a selection state signal of a main power switch and a selection state signal of a CD ROM power switch, respectively.

When the CD-ROM power switch 103 is selected to be On in the S5 mode (power off mode) of the ACPI, SYS_PSW_CTL * becomes a low signal to operate in the audio mode instead of the window mode. At this time, when the main power switch 101 is selected to be On, it is designed so that the selection signal PW_BTN_IN * of the main power switch is not applied by the D-flip flop. Similarly, if the main power switch is pressed first, AUD_PWR_BTN * is not recognized when the CD ROM power switch is pressed.

However, after the system enters the S3 state (sleep mode), the D-flip flop becomes the initial state before the power switch is selected. In this state, when a case of waking up with the CD ROM power switch occurs, the system recognizes the CD ROM power switch as a selection signal of the main power switch and the main power switch is in a disabled state. At this time, the system enters the system operation mode other than the operation mode of the audio DJ, but the main power switch does not operate when the system is forced to shut down afterwards. In such a case, it is troublesome to override the audio power switch so that the system power is turned off.

Accordingly, an object of the present invention is to provide a power supply control circuit of a computer system which can ensure the operation of the main power switch by disabling the operation of the CD-ROM power switch when switching to the power saving mode during system operation.

1 is a power control block diagram of a computer system having a CD-ROM drive operating even at power-off according to the present invention;

2 is an internal block diagram of the power switch driving circuit unit of FIG.

3 is a detailed circuit diagram according to a first embodiment of a power switch driving circuit unit of FIG. 2;

4 is a detailed circuit diagram according to a first embodiment of the power switch driving circuit unit of FIG. 2;

5 is a detailed circuit diagram according to a first embodiment of a power switch driving circuit unit of FIG. 2;

6 and 7 are state display diagrams of the power saving signal and the power switch in the normal mode and the power saving mode of the computer system of the first and second embodiments, respectively;

8 is a power supply control circuit diagram of a conventional computer system.

* Explanation of symbols for the main parts of the drawings

1: main power switch 3: CD ROM power switch

15: power switch drive circuit portion 17: power management controller

19: power supply 20: audio IC chip

21: CD-ROM Drive 23: System Board

25: central processing unit 31: system power selection signal generator

33: CD ROM power selection signal blocking unit 35: CD ROM power selection signal generator

36, 38: field effect transistor 37: power input signal generator

46: NAND gate

The object is, according to the present invention, a system board, a main power switch for supplying power to the system board, a CD ROM drive, a CD ROM power switch for selecting an operation of the CD ROM drive, and the system board. And a power supply unit for supplying power to the CD ROM drive, and outputting a normal signal and a power saving signal to the power supply unit according to a normal mode and a power saving mode in the on state of the main power switch to supply power to the system board. A power control circuit of a computer system having a power control unit for controlling the power supply unit to supply power to the CD ROM drive when the CD ROM power switch is turned on in the off state of the main power switch, wherein the main power switch is in an on state Transmits a selection signal to the power controller when the CD ROM power switch is turned on in the power saving mode; Block is to have the power saving mode is achieved by including a power source selection control to prevent the wake-up to the normal mode by turning on the selection of the CD-ROM power switch.

Here, a CD ROM power selection signal generator and a system power selection signal generator having a plurality of field effect transistors for generating respective selection signals according to the on-off selection of the CD ROM power switch and the main power switch, and the CD ROM. Preferably, a power input signal generation unit for providing a selected signal to the power control unit when one of the power switch and the main power switch is selected.

The power selection control unit is interposed between the CD ROM power switch and the CD ROM power selection signal generation unit. In the power saving mode, the OFF signal is generated by logically combining the power saving signal and the selection signal of the CD ROM power switch. The CD ROM power selection signal blocking unit output to the power selection signal generator may disable the CD ROM power switch in the power saving mode.

The CD ROM power selection signal blocking unit may include an orgate configured to logically combine the power saving signal and the CD ROM power switch selection signal to disable the CD ROM power switch in the power saving mode.

In another exemplary embodiment, the CD ROM power selection signal blocking unit may include a plurality of NAND gates that output an OFF signal by inversely multiplying the power saving signal and the selection signal of the CD ROM power switch.

In another embodiment, the CD-ROM power selection signal blocking unit outputs a low signal by logically combining an S3 mode signal and an S4 mode signal among the power saving signals, and an electric field having a gate terminal connected to an output terminal of the NAND gate. The CD transistor power switch may be disabled in the power saving mode including an effect transistor.

The power input signal generator is a D-flip flop, and is connected to the output terminals Q and Q / of the D-flip flop, respectively, to the output terminals of the CD-ROM power selection signal generator and the system power selection signal generator. It is preferable to output mutually exclusive.

The CD ROM power selection signal generator and the system power selection signal generator may include at least one field effect transistor.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a power supply control block diagram of a computer system having a CD-ROM drive operating even at power-off in accordance with the present invention. As shown in the figure, the power control block of the computer system includes a main power switch 1 and a CD ROM power switch 3 for supplying power to the CD ROM drive 21 in a state in which the main power switch 1 is turned off. ) And a power supply unit having a DC-DC converter (not shown) that receives power supplied from an adapter or a battery and converts the power into voltages of various sizes (1.5V, 3.3V, 4.5V, 3.3Vsb, 5Vsb, etc.). 19, an audio IC unit 20 operating by receiving power from the power supply unit 19 when the CD ROM power switch 3 is selected on, and a CD ROM drive according to a reproduction signal of the audio IC unit 20. FIG. An audio codec (not shown) for receiving and processing audio data of (21), and a power switch driving circuit section (15) for generating an on-off signal when the main power switch (1) and the CD-ROM power switch (3) are selected. . Then, the power supply unit 19 is controlled according to the on / off of the main power switch 1 and the CD ROM power switch 3 to turn on and off the voltage supplied to the system board 23, and the main power switch 1 is turned off. Power management to control the power supply unit 19 to supply power to the audio IC unit 20 and the CD-ROM drive 21 by receiving an ON signal generated when the CD-ROM power switch 3 is turned on. Power control to the power management controller 17 in accordance with the normal mode (S0 state), power saving mode (S3 state), and power off mode (S5 state) when the input signal from the controller 17 and the input / output device is not generated for a predetermined time. It further has a central processing unit 25 for outputting a signal.

Here, the power management controller 17 manages various inputs and outputs and performs a power management function for outputting a power control signal for controlling the power supply unit 19 according to a power command command provided from the central processing unit 25.

The central processing unit 25 outputs a power saving command in accordance with various power states S0, S3, S4, and S5 according to the ACPI specification. The central processing unit 25 outputs a normal power command to the power management controller 17 in the normal mode where the normal power is supplied, and switches to the S3 power saving mode when there is no input signal for a predetermined time from the input device (keyboard or mouse). The S3 power saving command is output to the power management controller 17 as much as possible.

According to the S3 power saving command of the central processing unit 25, the power management controller 17 switches the power saving control signal (S3 mode) to a low level and applies it to the power supply unit 19.

In the conventional power switch driving circuit unit, the main power switch and the CD-ROM power switch are designed to have a power input function exclusively. That is, when the main power switch is first pressed, the operation of the CD-ROM power switch 3 is in a disabled state, and when the CD-ROM power switch is pressed, the operation of the main power switch is in a disabled state. On the other hand, the power switch driving circuit unit 15 of the present invention has been implemented so that the operation of the CD-ROM power switch 3 is always in a disabled state when the system is switched from the normal mode to the power saving mode in the operating state.

FIG. 2 is a detailed block diagram of the power switch driver circuit of FIG. 1. As shown in the figure, the system selection signal generator 31 which generates the on / off signal of the system power source according to the selection of the main power switch 1, and the CD ROM drive (in accordance with the selection of the CD ROM power switch 3). CD ROM selection signal generation unit 35 for generating the on-off signal of 21 and a power input signal generation unit 37 for providing a power input unit 19 with a signal which is preferentially input among the CD ROM selection signal and the system selection signal. ), And a CD ROM selection signal blocking section 33 functioning as a power supply selection control section for controlling the drive of the CD ROM selection signal generation section 35 when the system is switched to the S3 sleep mode.

The CD ROM selection signal blocking unit 33 logically combines the S3 power saving signal (PW_SLP_S3 *) provided from the power management controller 17 with the on / off signal of the CD ROM power switch 3, and when the S3 power saving signal is low. The low signal is generated and provided to the CD ROM power selection signal generator 35 regardless of the on / off of the ROM power switch 3. The CD-ROM selection signal blocking unit 33 supplies an on-off selection signal according to the on-off signal of the CD-ROM power switch 3 when the power signal provided from the power management controller 17 is in the power-off mode S5. Normally, it is provided to the CD-ROM power selection signal generator 35.

3 is a detailed circuit diagram according to a first embodiment of the power switch driver circuit of FIG. 2. As shown in the figure, the power input signal generator 37 is composed of D-flip flops. The output terminals Q and Q / of the D-flop flop are connected to the CD-ROM power selection signal generator 35 and the system power selection signal generator 31, respectively, and the preset terminal is connected to the power supply 19. Due to the characteristics in which the Q stage and the Q / stage have opposite signal states, only one of the CD ROM power selection signal generator 35 and the system power selection signal generator 31 operates.

The CD-ROM power selection signal generator 35 and the system power selection signal generator 31 are composed of a plurality of field effect transistors 38 so that the high / low signals generated by the field effect transistors 36 on both sides are D-. It is input to Q and Q / of flip-flop.

The CD ROM power selection signal blocking unit 33 receives the three npn transistors 34, the output signals of the npn transistor 34, and the S3 power saving signal, and logically combines them to provide the CD ROM power selection signal generation unit 35. It has an oragate 36.

Therefore, when the S3 power saving signal is low, a high signal is always applied to the CD ROM selection signal generation unit 35 by the CD ROM selection signal blocking unit 33 to operate the CD ROM selection signal generation unit 35. To stop.

4 is a detailed circuit diagram according to a second embodiment of the power switch driving circuit unit of FIG. 2. Detailed description of the same configuration as in FIG. 2 will be omitted. As shown in the figure, the CD-ROM power supply selection signal blocking portion 43 has four NAND gates 46. Each NAND gate 46 uses the selection signal of the CD ROM power switch 1, the S3 power saving signal, and the S4 power saving signal as input signals to logically invert and invert each of the signals. The high signal is output to the CD-ROM power supply selection signal generator 35 regardless of on or off (see Fig. 7). As a result, the operation of the CD-ROM power supply selection signal generator 35 is stopped.

FIG. 5 is a detailed circuit diagram according to a third embodiment of the power switch driving circuit unit of FIG. 2. Similarly, detailed description of the same configuration as in FIG. 3 will be omitted. As shown in the figure, the CD-ROM power selection signal cut-off unit 53 includes two NAND gates 56 for inverting and logically multiplying the S3 power saving signal and the S4 power saving signal as input signals, and an output terminal of the NAND gate 56. And a field effect transistor 54 having a source terminal and a gate terminal connected to the output terminal of the CD ROM power selection signal generator 35, respectively. As a result, when the S3 power saving signal is low and the S4 power saving signal is high, the second NAND gate receiving the output signal of the first NAND gate 53a for converting the S3 power saving signal to the high state and the S4 power saving signal as the input signals. The output signal of 53b goes low. The high signal is output from the drain terminal of the field effect transistor 54 whose gate terminal is connected to the output terminal of the second NAND gate 53b (see Fig. 7). By the high signal output from the field effect transistor 54, the CD ROM power selection signal generator 35 enters the driving stop state.

As described above, when the system enters the S3 power saving mode during operation, the CD ROM power selection signal generator 35 always generates a high signal (off signal) regardless of whether the CD ROM power switch 3 is turned on or off. The selection signal of the power switch 3 is maintained as an off signal.

Here, in the above-described embodiment, the CD ROM selection signal blocking unit of the present invention has been described as being composed of a NAND gate or an or gate, etc., but is not limited to the detailed description, and a logic combination circuit may be implemented using other logic elements. .

With this arrangement, in a computer system having a CD-ROM drive that operates even at power-off, in a state in which power saving mode is switched during system operation by a drive circuit of a main power switch and a CD-ROM power switch that mutually exclusively input power. Operation of the main power switch can be guaranteed regardless of the on / off selection of the CD-ROM power switch.

As described above, according to the present invention, there is provided a power supply control circuit of a computer system that can ensure the operation of the main power switch by disabling the operation of the CD-ROM power switch when switching to the power saving mode during system operation.

Claims (8)

Supply power to a system board, a main power switch for supplying power to the system board, a CD ROM drive, a CD ROM power switch for selecting an operation of the CD ROM drive, the system board and the CD ROM drive A power supply unit for controlling the power supply unit to supply power to the system board by outputting a normal signal and a power saving signal to the power supply unit according to the normal mode and the power saving mode in the on state of the main power switch, and the CD in the off state of the main power switch. A power control circuit of a computer system having a power control unit for controlling the power supply unit to supply power to the CD ROM drive when the ROM power switch is selected on, When the main power switch is in the power saving mode while the main power switch is in the on state, when the on-selection of the CD ROM power switch is turned on, the selection signal is blocked from being transmitted to the power control unit so that the power saving mode is returned to the normal mode by the ON selection of the CD ROM power switch. A power supply control circuit of a computer system, characterized in that it comprises a power selection control unit for preventing the wake-up. The method of claim 1, A CD ROM power selection signal generator and a system power selection signal generator having a plurality of field effect transistors for generating respective selection signals according to the on / off selection of the CD ROM power switch and the main power switch; And a power input signal generator for preferentially providing the selected signal to the power control unit when one of the CD-ROM power switch and the main power switch is selected. The method of claim 2, The power selection control unit is interposed between the CD ROM power switch and the CD ROM power selection signal generation unit. In the power saving mode, the OFF signal is generated by logically combining the power saving signal and the selection signal of the CD ROM power switch. And a CD ROM power selection signal blocking unit for outputting the power selection signal generation unit. The method of claim 3, And the CD ROM power selection signal blocking unit includes an orgate configured to logically combine the power saving signal and the selection signal of the CD ROM power switch. The method of claim 3, And the CD ROM power selection signal blocking unit includes a plurality of NAND gates for outputting an off signal by inversely multiplying the power saving signal and the selection signal of the CD ROM power switch. In the third, The CD-ROM power selection signal blocking unit includes a NAND gate outputting a low signal by logically combining an S3 power saving signal and an S4 power saving signal among the power saving signals, and a field effect transistor having a gate terminal connected to an output terminal of the NAND gate. A power supply control circuit of a computer system, characterized in that The method of claim 2, The power input signal generator is a D-flip flop, and output terminals Q and Q / of the D-flip flop are connected to output terminals of the CD-ROM power selection signal generator and the system power selection signal generator, respectively, to receive the power selection signal. A power supply control circuit of a computer system, characterized in that the mutually exclusive output. The method according to any one of claims 1 to 7, And the CD ROM power selection signal generator and the system power selection signal generator include at least one field effect transistor.