KR20040024154A - High density plasma chemical vapor deposition apparatus for preventing particle from making in semiconductor wafer edge - Google Patents

High density plasma chemical vapor deposition apparatus for preventing particle from making in semiconductor wafer edge Download PDF

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KR20040024154A
KR20040024154A KR1020020055679A KR20020055679A KR20040024154A KR 20040024154 A KR20040024154 A KR 20040024154A KR 1020020055679 A KR1020020055679 A KR 1020020055679A KR 20020055679 A KR20020055679 A KR 20020055679A KR 20040024154 A KR20040024154 A KR 20040024154A
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semiconductor wafer
edge
vapor deposition
chemical vapor
density plasma
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KR1020020055679A
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Korean (ko)
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허근
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삼성전자주식회사
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Publication of KR20040024154A publication Critical patent/KR20040024154A/en

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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4401—Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45587—Mechanical means for changing the gas flow
    • C23C16/45591—Fixed means, e.g. wings, baffles
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582—Rigid and flat substrates, e.g. plates or discs
    • C23C16/4583—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/505—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/513—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using plasma jets

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

PURPOSE: High density plasma chemical vapor deposition(CVD) equipment capable of controlling generation of particles on the edge of a semiconductor wafer is provided to control a defect on the edge of a semiconductor wafer due to plasma and reaction gas by installing a clamp between the wafer and the plasma so that the clamp overlaps the edge of the wafer. CONSTITUTION: An inner space of a predetermined size is defined by the outer wall(310) of a chamber. The semiconductor wafer(200) is placed on a susceptor(320) in the chamber. A gas supply unit is so disposed to confront the upper surface of the semiconductor wafer. The clamp(360) is so disposed between the plasma on the semiconductor wafer and the semiconductor wafer to overlap the edge of the semiconductor wafer.

Description

반도체 웨이퍼 가장자리에서의 파티클 발생이 억제되는 고밀도 플라즈마 화학 기상 증착 장비{High density plasma chemical vapor deposition apparatus for preventing particle from making in semiconductor wafer edge}High density plasma chemical vapor deposition apparatus for preventing particles from making in semiconductor wafer edge}

본 발명은 반도체 제조 설비에 관한 것으로서, 특히 반도체 웨이퍼 가장자리에서의 파티클 발생이 억제되는 고밀도 플라즈마 화학 기상 증착 장비에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor fabrication equipment and, more particularly, to high density plasma chemical vapor deposition equipment in which particle generation at a semiconductor wafer edge is suppressed.

최근 반도체 웨이퍼에 보다 많은 칩들을 집적시키기 위하여 반도체 소자의 크기가 급속도로 작아지고 있는 추세이며, 이에 따라 금속 배선과 트랜지스터 사이의 아이솔레이션으로서 얕은 트랜치 아이솔레이션(STI; Shallow Trench Isolation) 방법이 각광받고 있다. 그러나 통상적으로 트랜치는 높은 어스펙트 비(aspect ratio)를 가지므로, 트랜치 내부를 절연막, 예컨대 산화막으로 채우는 공정이 용이하지 않다. 따라서 최근 고밀도 플라즈마를 이용한 화학 기상 증착 방법을 주로 사용하고 있다.Recently, in order to integrate more chips into a semiconductor wafer, the size of a semiconductor device is rapidly decreasing, and accordingly, a shallow trench isolation (STI) method has been in the spotlight as an isolation between a metal wiring and a transistor. However, since the trench typically has a high aspect ratio, the process of filling the trench with an insulating film, such as an oxide film, is not easy. Therefore, recently, a chemical vapor deposition method using a high density plasma is mainly used.

상기 방법은, 고밀도 플라즈마를 이용한 화학 기상 증착 설비 내에서 산화막을 증착(deposition)하는 공정과 식각하는 공정을 반복적으로 수행함으로써, 보이드(void) 없이 트랜치 내부를 산화막으로 채우는 방법이다. 그러나 이와 같은 고밀도 플라즈마를 이용한 화학 기상 증착 방법을 사용하더라도, 웨이퍼 가장자리인 웨이퍼 베벌(wafer bevel)에서 버블(bubble)과 같은 결함(defect)이 여전히 발생하고, 이와 같은 결함이 파티클 소스로 작용하여 소자의 신뢰성이 떨어진다는 문제가 존재한다.The method is a method of filling the inside of a trench with an oxide film without voids by repeatedly performing a process of depositing and etching an oxide film in a chemical vapor deposition apparatus using a high density plasma. However, even with such a chemical vapor deposition method using a high density plasma, defects such as bubbles still occur at the wafer bevel, which is the edge of the wafer, and such defects act as a particle source. There is a problem that the reliability of the.

도 1은 반도체 웨이퍼 가장자리에서의 파티클 발생 현상을 설명하기 위하여 나타내 보인 도면이다.1 is a view illustrating a particle generation phenomenon at the edge of a semiconductor wafer.

도 1을 참조하면, 반도체 웨이퍼(100)의 가장자리인 웨이퍼 베벌(100a)에 버블(110)이 발생한다. 통상적으로 얕은 트랜치 아이솔레이션 형성을 위해서 반도체웨이퍼(100)에는 실리콘 산화막/실리콘 질화막 라이너/실리콘 산화막이 적층되어 있다. 이 상태에서 고밀도 플라즈마를 이용한 화학 기상 증착 공정을 진행하게 되면, 반응 가스에 의해 발생되는 H2가스에 의해 상기 버블(110)이 발생하게 된다. 상기 버블(100)은 증착률은 낮은 반면 식각률이 높기 때문에 패턴 내에서 플라즈마에 의한 데미지(damage)가 발생하고, 이 데미지에 의해 하부 막질이 변화되어 패턴 이상 또는 하부 막질의 막질 불량의 결과라 할 수 있다. 따라서 반도체 웨이퍼(100)의 전면 부위에서는 식각률 또는 증착률을 조정함으로써 상기 버블의 발생을 어느정도 억제할 수 있다. 그러나 반도체 웨이퍼(100)의 베벌(100a), 특히 하부에서는 상기 버블의 발생을 억제할 수 없다.Referring to FIG. 1, bubbles 110 are generated in the wafer bevel 100a, which is an edge of the semiconductor wafer 100. In general, a silicon oxide film / silicon nitride film liner / silicon oxide film is stacked on the semiconductor wafer 100 to form shallow trench isolation. In this state, when the chemical vapor deposition process using the high density plasma is performed, the bubble 110 is generated by the H 2 gas generated by the reaction gas. Since the bubble 100 has a low deposition rate but a high etching rate, damage may occur due to plasma in the pattern, and the lower film quality is changed by the damage, resulting in abnormal pattern quality or poor film quality of the lower film quality. Can be. Therefore, the generation of the bubbles may be suppressed to some extent by adjusting the etching rate or the deposition rate at the front portion of the semiconductor wafer 100. However, the generation of the bubbles cannot be suppressed in the bevel 100a, particularly the lower portion of the semiconductor wafer 100.

본 발명이 이루고자 하는 기술적 과제는 웨이퍼 가장자리에서의 파티클 발생이 억제되는 고밀도 플라즈마를 이용한 화학 기상 증착 장비를 제공하는 것이다.The technical problem to be achieved by the present invention is to provide a chemical vapor deposition apparatus using a high-density plasma in which particle generation at the wafer edge is suppressed.

도 1은 반도체 웨이퍼 가장자리에서의 파티클 발생 현상을 설명하기 위하여 나타내 보인 도면이다.1 is a view illustrating a particle generation phenomenon at the edge of a semiconductor wafer.

도 2는 본 발명에 따른 고밀도 플라즈마 화학 기상 증착 장비를 나타내 보인 단면도이다.2 is a cross-sectional view showing a high density plasma chemical vapor deposition apparatus according to the present invention.

도 3은 도 2의 "A" 부분을 확대하여 나타내 보인 도면이다.FIG. 3 is an enlarged view of a portion “A” of FIG. 2.

<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>

200...반도체 웨이퍼2100a...웨이퍼 베벌200 ... Semiconductor Wafer 2100a ... Wafer Bevel

310...외벽320...서셉터310.Outer wall 320 ... Susceptor

330...덮개340...고주파 전원330 Cover 340 High-frequency power

350...플라즈마360...클램프350 ... plasma 360 ... clamp

상기 기술적 과제를 달성하기 위하여, 본 발명에 따른 고밀도 플라즈마를 이용한 화학 기상 증착 장비는, 일정 크기의 내부 공간을 한정하는 챔버 외벽; 상기 챔버 외벽 내에서 반도체 웨이퍼가 안착되는 서셉터; 상기 반도체 웨이퍼의 상부면과 대향되도록 배치된 가스 공급부; 상기 서셉터 및 가스 공급부에 각각 연결된 고주파 전원 인가부; 및 상기 반도체 웨이퍼 상부에 형성되는 플라즈마와 상기 반도체 웨이퍼 사이에서 상기 반도체 웨이퍼의 가장자리와 중첩되도록 배치된 클램프를 구비하는 것을 특징으로 한다.In order to achieve the above technical problem, the chemical vapor deposition apparatus using a high-density plasma according to the present invention, the chamber outer wall defining an internal space of a predetermined size; A susceptor on which a semiconductor wafer is seated in the outer wall of the chamber; A gas supply unit disposed to face an upper surface of the semiconductor wafer; A high frequency power supply unit respectively connected to the susceptor and the gas supply unit; And a clamp disposed between the plasma formed on the semiconductor wafer and the semiconductor wafer so as to overlap an edge of the semiconductor wafer.

상기 클램프는 반응 가스가 상기 웨이퍼의 가장자리로 공급되지 않도록 하는 것이 바람직하다.The clamp is preferably such that no reactive gas is supplied to the edge of the wafer.

이하 첨부 도면을 참조하여 본 발명의 바람직한 실시예를 상세히 설명하기로 한다. 그러나, 본 발명의 실시예들은 여러 가지 다른 형태로 변형될 수 있으며, 본 발명의 범위가 아래에서 상술하는 실시예들로 인해 한정되어지는 것으로 해석되어져서는 안된다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, embodiments of the present invention may be modified in many different forms, and the scope of the present invention should not be construed as being limited by the embodiments described below.

도 2는 본 발명에 따른 고밀도 플라즈마 화학 기상 증착 장비를 나타내 보인 단면도이다. 그리고 도 3은 도 2의 "A" 부분을 확대하여 나타내 보인 도면이다.2 is a cross-sectional view showing a high density plasma chemical vapor deposition apparatus according to the present invention. 3 is an enlarged view of portion “A” of FIG. 2.

도 2 및 도 3을 참조하면, 본 발명에 따른 고밀도 플라즈마를 이용한 화학 기상 증착 장비(300)는, 챔버 외벽(310)에 의해 일정 크기의 내부 공간을 포함한다. 상기 챔버 외벽(310) 내의 공간에는 반도체 웨이퍼(200)가 안착되는 서셉터(susceptor)(320)가 배치된다 상기 외벽(310) 상부에는 상부 전극 및 가스 공급부로서 작용하는 덮개(330)가 배치된다.2 and 3, the chemical vapor deposition apparatus 300 using the high density plasma according to the present invention includes an internal space having a predetermined size by the chamber outer wall 310. A susceptor 320 on which the semiconductor wafer 200 is mounted is disposed in a space in the chamber outer wall 310. A cover 330 is disposed on the outer wall 310 to serve as an upper electrode and a gas supply unit. .

도면에 나타내지는 않았지만, 덮개(330) 내에는 덮개(330)를 관통하는 가스 공급관들이 삽입되어 있으며, 이 가스 공급관들은 외부의 가스 공급 장치(미도시)와 연결된다. 따라서 외부의 가스 공급 장치로부터 공급되는 반응 가스는 덮개(330) 내에 삽입된 가스 공급관을 통하여 챔버 외벽(310) 내부로 공급된다. 서셉터(320) 내부에는 열을 발생시키기 위한 히터(미도시)가 장착되어 있을 수 있다.Although not shown in the drawing, a gas supply pipe penetrating the cover 330 is inserted in the cover 330, which is connected to an external gas supply device (not shown). Therefore, the reaction gas supplied from the external gas supply device is supplied into the chamber outer wall 310 through the gas supply pipe inserted into the cover 330. The susceptor 320 may be equipped with a heater (not shown) for generating heat.

상기 서셉터(320)와 덮개(330)에는 고주파 전원(RF power; Redio Frequency power)(340)이 각각 연결된다. 따라서 상기 서셉터(320)는 반도체 웨이퍼(200)의 지지 역할 외에도 하부 전극으로서의 역할도 수행한다. 상기 고주파 전원에 일정 크기의 바이어스가 인가되고, 반응 가스가 공급되면, 반도체 웨이퍼(200)와 덮개(330) 사이의 공간에는 플라즈마(350)가 만들어진다.The susceptor 320 and the cover 330 are connected to a radio frequency power (RF power) (340), respectively. Accordingly, the susceptor 320 serves as a lower electrode in addition to supporting the semiconductor wafer 200. When a bias of a predetermined magnitude is applied to the high frequency power source and a reaction gas is supplied, a plasma 350 is formed in a space between the semiconductor wafer 200 and the cover 330.

상기 반도체 웨이퍼(200)의 가장자리 부분인 웨이퍼 베벌(wafer bevel)(200a) 위에는 클램프(clamp)(360)가 배치된다. 즉 상기 클램프(360)는 반도체 웨이퍼(200)의 가장자리 부분인 웨잎 베벌(200a)과 상기 플라즈마(350) 사이에 배치된다. 클램프(360)는 반도체 웨이퍼(200)와 일정 간격 이격된다. 이 클램프(360)는 공정 진행 중에 반응 가스(도면에서 화살표로 표시)가 반도체 웨이퍼(200)의 가장자리 부분인 웨이퍼 베벌(200a)로 공급되지 않도록 함으로써 웨이퍼 베벌(200a)에 발생되었던 결함들이 발생하는 현상을 억제한다. 특히 얕은 트랜치 아이솔레이션을 형성하기 위하여 실리콘 산화막/실리콘 질화막 라이너/실리콘 산화막이 순차적으로 형성된 반도체 웨이퍼(200)에 대한 트랜치 매립 공정을 진행하더라도, 웨이퍼 베벌(200a)에서의 버블이 발생되지 않도록 한다. 비록 도면에서 상기 클램프(360)는 외벽(310) 측면에 부착된 것으로 도시되어 있지만, 별도의 지지 수단을 사용하여 상기 외벽(310)에 부착되지 않을 수도 있다.A clamp 360 is disposed on the wafer bevel 200a, which is an edge portion of the semiconductor wafer 200. That is, the clamp 360 is disposed between the weeping bevel 200a, which is an edge of the semiconductor wafer 200, and the plasma 350. The clamp 360 is spaced apart from the semiconductor wafer 200 by a predetermined interval. The clamp 360 prevents the reaction gas (indicated by an arrow in the drawing) from being supplied to the wafer bevel 200a, which is an edge portion of the semiconductor wafer 200, during the process. Suppress the phenomenon. In particular, even when the trench filling process is performed on the semiconductor wafer 200 in which the silicon oxide film / silicon nitride film liner / silicon oxide film is sequentially formed to form shallow trench isolation, bubbles in the wafer bevel 200a are not generated. Although the clamp 360 is shown attached to the side of the outer wall 310 in the drawing, it may not be attached to the outer wall 310 using a separate support means.

이상 본 발명을 바람직한 실시예를 들어 상세하게 설명하였으나, 본 발명은 상기 실시예에 한정되지 않으며, 본 발명의 기술적 사상 내에서 당 분야에서 통상의 지식을 가진 자에 의하여 여러 가지 변형이 가능함은 당연하다.Although the present invention has been described in detail with reference to preferred embodiments, the present invention is not limited to the above embodiments, and various modifications may be made by those skilled in the art within the technical spirit of the present invention. Do.

이상의 설명에서와 같이, 본 발명에 따른 고밀도 플라즈마를 이용한 화학 기상 증착 장비는, 반도체 웨이퍼와 플라즈마 사이에 상기 반도체 웨이퍼의 가장자리와 중첩되도록 배치된 클램프를 구비함으로써, 플라즈마 및 반응 가스에 의해 웨이퍼 가장자리에서의 결함 발생을 억제하고, 이에 따라 산화막 증착 공정을 신뢰성 있게 수행할 수 있다는 이점을 제공한다.As described above, the chemical vapor deposition apparatus using the high-density plasma according to the present invention includes a clamp disposed between the semiconductor wafer and the plasma so as to overlap the edge of the semiconductor wafer, and thus, at the wafer edge by the plasma and the reactive gas. This suppresses the occurrence of defects, thereby providing the advantage that the oxide film deposition process can be performed reliably.

Claims (2)

일정 크기의 내부 공간을 한정하는 챔버 외벽;A chamber outer wall defining an interior space of a predetermined size; 상기 챔버 외벽 내에서 반도체 웨이퍼가 안착되는 서셉터;A susceptor on which a semiconductor wafer is seated in the outer wall of the chamber; 상기 반도체 웨이퍼의 상부면과 대향되도록 배치된 가스 공급부;A gas supply unit disposed to face an upper surface of the semiconductor wafer; 상기 서셉터 및 가스 공급부에 각각 연결된 고주파 전원 인가부; 및A high frequency power supply unit respectively connected to the susceptor and the gas supply unit; And 상기 반도체 웨이퍼 상부에 형성되는 플라즈마와 상기 반도체 웨이퍼 사이에서 상기 반도체 웨이퍼의 가장자리와 중첩되도록 배치된 클램프를 구비하는 것을 특징으로 하는 고밀도 플라즈마를 이용한 화학 기상 증착 장비.And a clamp disposed between the plasma formed on the semiconductor wafer and the semiconductor wafer so as to overlap an edge of the semiconductor wafer. 제1항에 있어서,The method of claim 1, 상기 클램프는 반응 가스가 상기 웨이퍼의 가장자리로 공급되지 않도록 하는 것을 특징으로 하는 고밀도 플라즈마를 이용한 화학 기상 증착 장비.The clamp is a chemical vapor deposition apparatus using a high density plasma, characterized in that the reaction gas is not supplied to the edge of the wafer.
KR1020020055679A 2002-09-13 2002-09-13 High density plasma chemical vapor deposition apparatus for preventing particle from making in semiconductor wafer edge KR20040024154A (en)

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