KR20040019118A - Method for forming the flash EPROM cell - Google Patents

Abstract

PURPOSE: A method for manufacturing a flash EPROM(Erasable Programmable Read Only Memory) cell is provided to be capable of forming an R-poly pattern without an additional photo and etching process. CONSTITUTION: The first poly layer is formed on the entire surface of a semiconductor substrate(10). At this time, the substrate has a predetermined lower structure. The first ion implantation is carried out on the first poly layer by using R-poly forming ions. A photoresist pattern is formed at the predetermined upper portion of the resultant structure. The second ion implantation is carried out on the resultant structure. A floating gate(22) of an EPROM, a lower storage node(24) of a capacitor, and an R-poly(26) are formed by selectively patterning the first poly layer. An insulating layer and the second poly layer are sequentially deposited on the resultant structure. A capacitance of the EPROM and a protecting layer(46) of the R-poly are formed by selectively etching the resultant structure.

Description

Method for forming flash pyromium cell

The present invention simplifies the process of forming a high resistance R-poly pattern in the manufacturing process of a semiconductor memory device such as EPROM (Erasable Programmable ROM), thereby improving the manufacturing yield of semiconductor devices. The present invention relates to a method for producing a flash epipyrome cell.

This pyrom is a type of ROM that can electrically program or erase data.

1A to 1C are cross-sectional views illustrating a conventional method for manufacturing a flash pyromium cell.

First, as shown in FIG. 1A, a gate oxide film (not shown) on the silicon substrate 1, a first polysilicon layer 2 for the floating gate electrode, a gate dielectric film 3, for example, an ONO film, The second polysilicon layer 4 for the control gate electrode is sequentially stacked and etched sequentially using a gate electrode mask (not shown) to form the gate electrode pattern 5. After the impurity ion implantation process is performed using the gate electrode pattern 5 as an ion implantation barrier to form a source / drain (not shown), a gate spacer 6 is formed on the sidewall of the gate electrode pattern 5.

As illustrated in FIG. 1B, the undoped polysilicon 7 is deposited on the entire product on which the gate electrode pattern 5 is formed, and a low concentration ion implantation process is performed using the mask 8 for forming an R-poly pattern. After the low doping, the etching process is performed again using the R-poly pattern forming mask 8 as an etching mask, whereby a high resistance R-poly pattern 7 'is formed.

Subsequently, as shown in FIG. 1C, the interlayer insulating film 9 is deposited on the entire product on which the R-poly pattern 7 ′ is formed, and the contact hole forming process is performed to form the plug 10 in the interlayer insulating film 9. Then, the metal wiring 11 is formed on the plug 10 so that the semiconductor devices are interconnected.

However, when the R-poly pattern having high resistance is formed by a flash pyrilom cell manufacturing method as in the related art, after forming the gate electrode pattern of the basic unit device to form the R-poly pattern, the polysilicon deposition step In addition, there is a problem in that the process steps are complicated by depositing polysilicon and patterning it by photo and etching processes.

In addition, after the polysilicon deposition, after the photolithography and etching process, the polysilicon is not removed from the portion used as the capacitance and the portion used as the floating gate of the pyrom, thereby reducing the reliability of the semiconductor device.

The present invention has been made to solve the above problems, an object of the present invention in forming a high resistance (R-poly) pattern of the high resistance (flash resistance) of the flash epitaxial cells, the polysilicon for forming the floating gate undoped poly After depositing using silicon and performing low doping by performing low concentration ion implantation process in the area where R-poly pattern is to be formed, the selective photomasking process is performed and the part used as capacitance and the part used as floating gate of epipyrom By providing an ion implantation process for capacitance poly to, to provide a method for manufacturing a flash ypyrom cell to form an R-poly pattern without an additional photo process and etching process.

1A to 1C are cross-sectional views illustrating a conventional method for manufacturing a flash pyromium cell.

2A to 2F are cross-sectional views sequentially illustrating a method for manufacturing a flash epipyrom cell according to a preferred embodiment of the present invention.

-Explanation of symbols for the main parts of the drawing-

10: semiconductor substrate 22: floating gate

24: capacitor lower electrode 26: R-poly

30 insulating film 42 control gate

44: capacitor upper electrode 46: R-poly protective layer

50: interlayer insulating film 60: plug

70: metal wiring

In order to achieve the above object, the present invention provides a method for manufacturing a flash pyromium cell, the step of forming a first poly film on the upper surface of the upper surface of the semiconductor substrate having a predetermined substructure, and a low concentration on the upper surface of the first poly film Implanting ions for forming R-poly, and performing a selective photomasking process so as to cover only the upper portion of the R-poly forming region of the semiconductor substrate to form a photoresist pattern, and then to the floating gate and capacitor forming region of Performing an ion implantation process for the capacitance poly, and selectively patterning the first poly film doped with the R-poly forming ion or the capacitance poly ion by an etching process to form a floating gate of epipyrom and a lower electrode of the capacitor; Forming an R-poly, and forming a floating gate of the pyrom, a lower electrode of the capacitor, and an R-poly Sequentially depositing an insulating film and a second poly film on the substrate, and forming a protective layer of pyromium, capacitance, and R-poly by a selective photomasking and etching process of the insulating film and the second poly film. It features.

In addition, the present invention is characterized in that after forming the first poly film using an undoped poly, by implanting ions corresponding to each subsequent pattern to form each pattern by one deposition process and etching process do.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. The embodiments described below may be modified in many different forms, and the scope of the present invention is not limited to the embodiments described below.

2A to 2F are cross-sectional views sequentially illustrating a method for manufacturing a flash epipyrom cell according to a preferred embodiment of the present invention.

As shown in FIG. 2A, a semiconductor substrate 10 having a predetermined substructure having an EPROM0 forming region A, a capacitor forming region B, and a high resistance R-poly forming region C separated therefrom. The first poly film 20 is formed by depositing the undoped poly on the entire surface of the upper surface of the undoped first poly film 20, depending on the ions implanted by subsequent ion implantation.

As shown in FIG. 2B, an ion implantation process of injecting a low concentration of R-poly forming ions into the entire upper surface of the first poly film 20 is performed to the R-poly forming region C having high resistance. Allow to be low doped.

Subsequently, as shown in FIG. 2C, only the upper portion of the R-poly forming region C having a high resistance is covered on the first poly film 20 implanted with the low concentration of R-poly forming ions. A selective photomasking process is performed to form a photoresist pattern 30. Thereafter, the photoresist pattern 30 is used as an ion implantation mask to form an epitaxial formation region A except for an R-poly formation region C. An ion implantation process of implanting ions for capacitance poly into the capacitor formation region B is performed. After the ion implantation process, the annealing process is performed on the entire product obtained by ion implantation for activation.

In addition, since the floating gate of the epipyrome is also used as a capacitance, the ion for the capacitance poly is ion-implanted together with the pyromide forming region A and the capacitor forming region B as described above.

As shown in FIG. 2D, a floating gate, a capacitor, and an R-poly are formed on the first poly film 20 doped with ions for forming R-poly or ions for capacitance poly by a selective photo process. A photoresist pattern (not shown) is formed as possible. In addition, by using the photoresist pattern (not shown) as an etch mask, the floating gate 22 of pyrom implanted with the ions for capacitance poly, the lower electrode 24 of the capacitor, and the ions for R-poly are implanted. -poly (26) is formed.

Next, as shown in FIG. 2E, the insulating film 30 and the second poly film (not shown) are formed on the floating gate 22 of the pyrom, the lower electrode 24 of the capacitor, and the R-poly 26. Shown) to deposit sequentially. Then, the insulating film 30 and the second poly film (not shown) are selectively photomasked and etched to control the control gate 42 of the pyrom, the upper electrode 44 of the capacitor, and the protective layer of R-poly. To form 46.

As shown in FIG. 2F, the interlayer insulating film 50 is deposited on the entire product of the control gate 42 of the pyrom, the upper electrode 44 of the capacitor, and the protective layer 46 of R-poly. After forming the plug 60 in the interlayer insulating layer 50 by performing a contact hole forming process, a metal wire 70 is formed on the plug 60 so that the semiconductor devices are connected to each other.

As described above, although described with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and modified within the scope of the present invention without departing from the spirit and scope of the invention described in the claims below. It will be appreciated that it can be changed.

Therefore, as described above, the high resistance (R-poly) pattern of the flash pyromium cell according to the present invention is deposited polysilicon for forming the floating gate using the undoped polysilicon and the R-poly pattern is formed Low doping is performed by performing low concentration ion implantation process in the area to be made, and then selective photomasking process is performed to carry out ion implantation process for capacitance poly in the portion used as the capacitance and the portion used as the floating gate of epipyrom. Since the R-poly pattern can be formed without the photo process and the etching process, the manufacturing process of the semiconductor device can be simplified, and thus the manufacturing yield of the semiconductor device can be improved.

Claims (2)

Forming a first poly film on an upper surface of a semiconductor substrate having a predetermined substructure; Ion implanting ions for forming a low concentration of R-poly into the entire upper surface of the first poly film; Performing a selective photomasking process so as to cover only an upper portion of the R-poly forming region of the semiconductor substrate to form a photoresist pattern, and then performing an ion implantation process for capacitance poly in the floating gate and capacitor forming region of pyrom; Selectively patterning a first poly film doped with the ions for forming R-poly or ions for capacitance poly by an etching process to form a floating gate of pyrom, a lower electrode of a capacitor, and an R-poly; Sequentially depositing an insulating film and a second poly film on the floating gate of the pyrom, the lower electrode of the capacitor, and the R-poly formed product; And forming a protective layer of epitaxial, capacitance, and R-poly by the selective photomasking and etching process of the insulating film and the second polyfilm. The method of claim 1, wherein the first poly film is formed using an undoped poly.