KR20040017553A - Monochrome to Color Real Time Converter - Google Patents

Abstract

PURPOSE: A device for converting black and white into color in real time is provided to convert mono data into color data in a text mode by using a hardware method in real time. CONSTITUTION: Color information of all pictures are recorded in a color palette ROM(Read Only Memory). A page select address deciding one picture is combined with an address deciding an absolute position of the picture, so the color palette ROM outputs colors of foreground color and background color. The foreground color and background color are divided to make colors according to an output value of a barrel shifter. According to a signal of a mono writer, a page capture, a data capture and an address capture of the picture are temporarily stored. At the same time, a counter is operated and the barrel shifter is driven according to a signal of the counter, thereby transmitting the temporarily stored mono data to a multiplexer according to signals S0,S1,S2 of the barrel shifter. The multiplexer dividedly transmits foreground color and background color to a color video controller for converting mono data into color data in real time. An address reduction ROM removes duplicated addresses for reducing the capacity of the color palette ROM.

Description

Monochrome to Color Real Time Converter}

Recently, display devices of many industrial devices are becoming color in black and white. Even small devices such as scientific calculators and mobile phones have introduced color display devices. Colorizing monochrome-based devices that have been developed in the past requires the replacement of video devices and many advanced programming tasks. Programming color tasks with color information increases the source code and slows down the overall system. And as with black and white, fast-paced screen scrolling can't be expected. The whole system needs to be upgraded, but the speed problem can be overcome. As the system is upgraded, the price increases and the development period is long. In contrast, there is a need for the development of a device capable of colorizing at high speeds with a simple combining operation with little modification to programs already developed in the existing black and white devices.

In the present invention, the color of the existing black and white display device is left as it is, and implemented to be easily applicable in any system. You can also have a Color palette ROM to easily change the color of the screen whenever you want. Since all operations are handled in hardware, there is almost no delay due to input / output, and the time delay between ROM and Complex Programmable Logic Device (CPLD) has become the dominant speed. The current implementation is limited to using 16 colors out of text mode, 640x400 resolution, and 65535 colors, but larger resolutions and more colors are available depending on the application.

No matter how fast and convenient, in many industries, rising prices often make the device obsolete. In consideration of this, in order to minimize the capacity of the color palette ROM in which the color information is embedded, an address reduction ROM was installed to analyze the color overlap of the text screen and to colorize it with the minimum color information. Based on the result of the algorithm, it is possible to reduce the capacity of the color palette ROM to 1/16 when it is configured as an address translator by writing to the ROM.

1 is a block diagram of a black and white screen.

2 is a configuration diagram of a color screen.

3 is a block diagram of the monochrome controller.

4 is a configuration diagram of a color controller.

5 is a process of converting colors to palettes in a 1: 1 manner.

6 is a process of converting to color by minimizing the capacity of the color palette in the proposed manner.

7 is a proposed algorithm for reducing the structure of the text mode and the capacity of the color palette ROM.

8 shows the result of applying the proposed algorithm.

9 is an actual configuration diagram of an address reduction ROM and a color palette ROM.

10 is a configuration diagram of a color palette ROM.

All the contents below are explained based on 640 × 400 resolution and 16 colors for easy understanding.

Referring to FIG. 1, the black and white screen is composed of 80 columns and 400 lines in 8 pixel units. Each time the address is incremented, eight pixels appear on the screen. To display all one screen, address 32000 (80 Column × 400 Line) should be increased. When 8 pixels are decomposed, it is an 8-bit data value. The bits are arranged in the order of D0 to D7 rather than the order of D7 to D0.

In FIG. 2, one pixel appears on the screen and has a defined color every time the address increases in the color screen configuration. Each time the address is increased, the screen is composed of one pixel unit. Therefore, to display all the screens, the address 256000 (640 Pixel × 400 Line) needs to be counted. As a result, the color screen needs eight times the address increase than the black and white screen. Therefore, it can be seen that three more address lines are needed.

Referring to FIG. 3, the structure of the monochrome controller includes 15 address lines and 8 data lines. The area that can be controlled by 15 addresses Up to address can be controlled. Since the screen is composed of 8 pixel units at a time in the black and white screen, the address corresponding to 32000 (80 × 400) needs to be increased in the 640 × 400 resolution, and thus 15 address lines can be configured.

Referring to FIG. 4, the structure of the color controller includes 18 address lines and 16 data lines. As shown in FIG. 2, the color screen can represent only one pixel each time one address is increased, so the total number of address lines is 18 (640 * 400 = 256000, ) Is required. The 16 data buses have a color of 65535 colors (one pixel). ). In the present invention, since 16 colors are used, 16 colors desired by a user can be arbitrarily selected from 65535 colors.

Once again, with the third and fourth Figures, in 640 * 400 mode, eight pixels appear on the screen every time one address is increased in the black and white controller, and one every time an address is increased in the color controller. As pixels appear on the screen, you can select 16 colors from 65535 colors.

In Figure 5, the letters 'A', 'B' and 'C' are converted to color after passing through the Color palette ROM. Color information corresponding to one character in the color palette ROM has 16 vertical areas in 8-bit units. As shown in the figure, the lower 4 bits of the 16 8 bits have the background color, and the upper 4 bits have the background color. There are 16 colors that 4 bits can represent. Currently color palette ROM is represented in color, but in reality, it consists of a form in which numeric information is written in ROM in 8-bit units. As an example of color conversion, in order to convert the letter 'A' from black and white to color, the color palette goes through 8 horizontally and 16 vertically. If you look at the color palette ROM corresponding to the letter 'A', you can see that the foreground color is blue and the background color is pink. The black and white data goes through the Color Palette ROM, with each bit representing one of the foreground and background colors in color, depending on the 'H' and 'L'. In FIG. 5, since the color palette ROM should be configured in the same size as all black and white information, the capacity becomes large when used in practice, which increases the cost.

In FIG. 6, the capacity of the color palette ROM can be greatly reduced by adding one address reduction ROM. For example, when converting the letter 'A' from black and white to color, the Color palette ROM can convert one color to one color instead of using all 16 8-bit data. One possible reason for this is that the color information of 16 times in 8-bit units is the same as in FIG. That is, the palette corresponding to 0x00, 0x50, 0xa0, 0xf0, 0x140, 0x190, 0x1e0, 0x230, 0x280, 0x2d0, 0x320, 0x370, 0x3c0, 0x410, 0x460 and 0x4b0 is the same as the palette information of 0x00 and 16 times. This is it. In consideration of this, it is possible to reduce the capacity of the color palette ROM to 1/16 by placing the Address reduction ROM in the middle and replacing 16 overlapping colors with one address.

7 is an algorithm for reducing the capacity of the color palette ROM to 1/16 by placing an address reduction ROM. Referring to the figure of the drawing, X and Y are the number of horizontal and vertical letters in the text mode, and Z is the number of vertical pixels for one letter. Here, X = 80, Y = 25 and Z = 16 were substituted.

FIG. 8 cuts the algorithm of FIG. 7 into 80 units and sorts them 16 vertically. By writing the data of FIG. 8 to the ROM, an address translator can be made. If the address is specified among 0x00, 0x50, 0xa0, 0xf0, 0x140, 0x190, 0x1e0, 0x230, 0x280, 0x2d0, 0x320, 0x370, 0x3c0, 0x410, 0x460, 0x4b0 in 80 (0x50) units, the output data becomes 0x00. Format.

In FIG. 9, the address reduction ROM records data values listed in FIG. When a black and white address is input, the recorded data value is output. The data value itself becomes a reduced address excluding redundancy, and becomes a part of the address of the color palette ROM again. And part of the address of the Color palette ROM is combined with Page select. With eight lines of Page select, a total of 256 pages of colors can be embedded in the Color palette ROM as shown in FIG. In FIG. 9, the output data bus of the color palette ROM is 8 bits and is composed of lower 4 bits and upper 4 bits. Contains color information corresponding to foreground and background colors, respectively. There are 16 colors that can be combined in 4 bits.

If you go through two relatively slow ROMs, you will expect some delays, making it difficult to process in real time. However, considering the recent trend in ROM, the speed has improved to about 35ns from 120ns of delay. In addition, using NV Volatile Read Only Memory (NV RAM) can significantly speed up access time by as much as 15 ns. Combining two ROMs is about 70ns. When the delay time is calculated on a screen having a 640 × 400 resolution, black and white data is recorded in units of 8 pixels, and thus an address change of 80 × 400 is required to configure one screen. The time delay of ROM is theoretically the time for one screen It takes as long as It can be seen that the screen is short enough to be almost ignored.

Representative diagrams form the entire system. Mono data, mono address, and mono WR signals, which are the left side of the entire drawing, are connected to the signals used in the conventional black and white controller. In the right part, black and white data is converted into color data and transmitted to the color controller. Comparing the left mono address [00:14] (10) with the right color address [03:17] (11), both consist of 15 lines but differ only in address. In order to colorize, the black and white data must go through eight changes each time, so three S0, S1, and S2 are increased through Counter (8), and the data is changed according to S0, S1, S2 in Barrel shifter (7). One of the eight data stored in Capture (6) is selected and sent to Multiplex (3). In the multiplex (3), foreground color and background color are selected and color information is transmitted to the color decoder 4. In the color decoder 4, four inputs and 16 outputs are configured so that 16 colors can be arbitrarily selected from 65535 colors. In the address reduction ROM 1, the capacity of the color palette ROM 2 is reduced to 1/16. The output is reduced to 11, compared to 15 input addresses. This is for optimizing overlapping color information in the color palette ROM (2). In the color palette ROM (2), the lower 11 and the upper 8 of the 19 input addresses are combined. The lower address is an absolute address constituting one screen, and the upper eight addresses are relative addresses corresponding to 256 pages. In the process of converting black and white data to color data, the page information must be sent first to display the screen. Prior to sending black and white data, page capture (5) is sent to page information in advance and stored temporarily. Data capture (6) and address capture (9) temporarily store information necessary for screen processing in accordance with the Mono WR control, and then store the next data and address after eight processes. The actual hardware configuration uses multiple D flip-flops (D-FF) to store pages, addresses, and data. The counter (8) starts to operate when the Mono WR (15) signal is detected. After the counts of S0, S1, and S2 have all been counted, the counter (8) stops operation and returns to the standby state. The barrel shifter 7 selects one of eight data stored in the data capture 6 and sends it to the Multiplex 3 according to the counter 8.

In the present invention, in order to change the black and white data to color data in real time in the text mode, all operations are performed using a hardware method CPLD, and color conversion is possible in real time.

The algorithm that reduces the duplicated color values and writes them to the ROM results in an address translator that can reduce the capacity of the color palette ROM to 1/16 and significantly reduce the price of the product.

The current implementation is limited to text mode by selecting 16 colors among 640 × 400 resolution and 65535 colors, but higher resolutions and colors can be used depending on the application.

Claims (3)

In converting black and white data to color data, after recording the color information of all screens in the color palette ROM (2) in the representative diagram, the page select address 13 for determining one screen and the address for determining the absolute position of the screen ( 14) is combined to output the color color of the foreground color and background color from the color palette ROM (2), and to create the color color by dividing the foreground color and the background color according to the output value of the barrel shifter (7) in the Multiplex (3). The counter (8) is operated at the same time as the page 5 of the screen, the data (6), the address (9) is temporarily stored in accordance with the signal of the Mono WR (15) in the representative diagram with claim 1, and the counter (8) The Barrel shifter (7) is driven in response to the signal of, and the black and white data temporarily stored in Data (6) is transferred to the Multiplex (3) according to the signals of S0, S1 and S2 of the Barrel shifter (7) one by one. Convertible to color Based on the algorithm shown in Fig. 7, the solution is arranged as shown in Fig. 8, and then recorded in the Address reduction ROM shown in Fig. 9, and a new address is created to exclude duplicated colors. How to significantly reduce the capacity of the Color palette ROM in Figure 9