JPS6329794A - Color development system - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a color development system, and relates to a technique that is effective when applied to, for example, a bitmap type image display system.

[Prior Art] CRT (cathode ray tube) display devices are widely used as man-machine interfaces for personal computers and data terminals. In particular, the bitmap method 8 expresses characters and figures in pixels, stores the images as they are in a bitmap memory such as frame buffer memory, and reads them sequentially to display free patterns. When adopted in an image display system, font data needs to be stored pixel by pixel, requiring a large capacity frame buffer memory; however, the correspondence between display content and memory becomes direct. Therefore, compared to a system that displays characters and symbols corresponding to a predetermined code via a pattern generator, it is easier to operate, and
Multicolor display and high resolution can be achieved very easily. An example of a document describing an image display system that applies the bitmap method is
There are "rLSI Handbook" P2S5 to P2S5 published by Ohmsha.

By the way, in the image display system in which the bitmap method is adopted, the frame buffer memory is
Basically, it is required to be able to supply a video signal as serial display data to a display device at a predetermined speed according to its display cycle. For such a request, C.
Since the display cycle of an RT display device is usually faster than the memory cycle of the frame buffer memory, the number of bits of data that can be input/output in parallel to the frame buffer memory is smaller than the number of bits of data that can be input/output in parallel to the display controller. This can be multiplied by multiple times, thereby satisfying the above requirements. For example, if the data bus coupled to the data input/output terminals of the display controller has a 16-bit configuration, the frame buffer memory and the parallel-to-serial conversion register for supplying video signals to the CRT display device are:
They are coupled by a 64-bit display data bus.

If such basic requirements are satisfied, it is necessary to efficiently rewrite display data in the frame buffer memory, in other words, to perform drawing operations efficiently in order to improve system efficiency. However, in the configuration illustrated above, only 16 bits of the data read out from the frame buffer memory to the 64-bit display data bus in one memory read cycle for drawing is passed through the selector, etc. It can only be supplied to a display controller. Similarly, in the memory write cycle for drawing, only 16 bits of data modified by the display controller can be written to the frame buffer memory in one memory write cycle.

[Problems that the invention attempts to solve]

Here, the present inventor studied the drawing function of the display controller, especially the color development process that modifies and changes monochrome font data to color font data8.For example, if one pixel of color font data If a 4-bit configuration corresponding to
The color font data that can be output at a time is theoretically limited to a maximum of 4 pixels. Therefore, if monochrome font data is stored in the frame buffer memory, 64-bit monochrome font data, that is, 64 pixels worth of monochrome font data, will be output from the frame buffer memory in one color development drawing cycle. However, the color font data that can be written to the frame buffer memory by the color development drawing cycle is theoretically limited to a maximum of 4 pixels (16 bits), and in practice, the color font data is written by changing the color for each pixel. Since it is also necessary to develop the color, in that case it is limited to one pixel, and it has been revealed that the color development efficiency is extremely low. In particular, when the addresses of data corresponding to pixels that have substantial meaning in forming a display pattern are adjacent to each other, such as text such as characters or symbols, the number of accesses to the frame buffer memory increases. , such problems will become even more prominent.

An object of the present invention is to provide a color development system that can improve color development efficiency.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for solving problems]

A brief overview of typical inventions disclosed in this application is as follows.

That is, the monochrome font data supplied via the display controller is colored based on the color data storage means capable of storing color data and the color data read from the color data storage means based on the address control of the display controller. and a color development means for supplying the resulting color font data to a frame buffer memory.

[For production]

According to the above means, the monochrome font data output from the display controller in synchronization with the write cycle to the frame buffer memory is colored according to the bit configuration of data that can be input and output in parallel from the frame buffer memory. By writing the resulting color font data to the frame buffer memory, one memory write cycle to the frame buffer memory allows all of the data that can be input/output to the frame buffer memory at one time. Color font data is supplied in correspondence with the bits of , thereby achieving improvement in color development efficiency.

〔Example〕

FIG. 1 is a block diagram showing one embodiment of the color development system of the present invention. The system shown in the figure is applied to a bitmap type image display system.

The system shown in Figure 1 includes a Rusk scan type CR.
T display equipment! Dcrt is provided. In the figure, FBM is a rewritable frame buffer memory as a bitmap memory, and font data set in pixel units is stored on a CRT display device Dc.
It is stored corresponding to one frame worth of display image at rt. This frame buffer memory FB
Although not particularly limited, M can simultaneously input and output 64-bit font data in parallel, and the data input/output terminal connects the parallel to serial conversion register P/S via a 64-bit display data bus DDB. Connected to the input terminal.

This parallel/serial conversion register P/S serially supplies the display font data supplied thereto to the CRT display device in synchronization with the serial clock signal SC. Here, the serial clock signal SC is
It corresponds to the display cycle determined by the hardware configuration of the CRT display device. Note that the write and read operations for the frame buffer memory FBM are controlled based on the read/write control signal R/W, and although not particularly limited, its high level instructs a read operation, and its low level instructs a write operation. is instructed.

Address control for the frame buffer memory FBM is performed by the display controller C0NT, and its address signal output terminal is connected to the frame buffer memory FBM via the address bus AB.
It is coupled to the address signal input terminal of BM.

The display controller C0NT outputs the read/write control signal R/W and also outputs the read/write control signal R/W to the CRT.
A horizontal synchronizing signal H3YNC is applied to the display device Dcrt.
and a vertical synchronization signal VSYNC. According to this embodiment, it also has a drawing function for the phono 1 data stored in the frame buffer memory FBM. In particular, among the drawing functions, color development processing that modifies and changes monochrome font data to color font data is performed by selecting the functions of the color register CR as a color data storage means and the color development section CD, the details of which will be described later. It is now possible to do so.

Next, a configuration for color development via the color register CR1 and color development section CD will be explained.

The number of data input/output terminals of the display controller C0NT is not particularly limited, but is limited to one due to the number of external terminals.
It has a 6-bit configuration, and the external terminal is coupled to a 16-bit local data bus LDB. This local data bus LDB may be coupled to a main memory (not shown) or a system bus of a microprocessor that controls the entire system. Such local data bus LDB
and the display data bus DDB are interfaced via a data selector DS that includes a bidirectional data buffer circuit (not shown) which is coupled to each of them. That is, the data selector DS is enabled to operate when the selection signal 5ELL output from the display controller C0NT is set to a selection level such as a high level. When the read/write control signal R/W is set to a high level to instruct the frame buffer memory FBM to perform a read operation, 64-bit data can be input via the display data bus DDB, and the input data Of these, predetermined 16 bits are local data bus LD.
It is possible to output to B.

Furthermore, when the read/write control signal R/W is set to low level and a write operation is instructed to the frame buffer memory FBM, 16-bit data can be input via the local data bus DB, and the input data is , can be output to the display data bus DDB in correspondence with a predetermined 16-bit signal line on the display data bus DDB. Therefore, color register CR and color development section C
When drawing processing that does not use D is selected, data is transmitted and received between the local data bus LDB and the display data bus DDB via the data selector DS.

The color register CR is connected to the local data bus L.
Color data is input and output via the DB, and is also under address control from the display controller C0NT.
In addition, it is constituted by a memory such as a RAM (Random Access Memory) having an output latch circuit. This color register CR is made operable by setting the selection signal 5EL2 outputted from the display controller C0NT to a selection level such as a high level. The writing and reading operations for the color register CR are controlled by the display ray controller C, similar to the frame buffer memory FBM described above.
This is performed based on the read/write control signal R/W output from 0NT.

Here, the color font data in this embodiment is not particularly limited, but for each pixel, red, green,
It has a 4-bit configuration corresponding to blue and brightness. Furthermore, the monochrome font data is 1-bit data corresponding to luminance, that is, black and white. The above color data is various data corresponding to colors obtained by a combination of red, green, and blue. Such color data is
They are stored at respective predetermined addresses in the color register CR.

The color development section CD transfers 16-bit monochrome font data corresponding to 16 pixels supplied via the local data bus LDB to the color register CR.
Based on the color data supplied from the display data bus DDB, the data is developed into 64-bit color font data corresponding to 16 pixels and output to the display data bus DDB.

The color development process in the color development section CD selects and deselects the color data supplied from the color register CR according to the content of each 16-bit monochrome font data, in other words, the black and white. This process modifies monochrome font data of 1 pixel and 1 bit into color font data of 4 bits per pixel. Therefore, the circuit is
By combining gate circuits such as AND gate circuits,
Further, it can be configured using a multiplexer or the like. Note that the color development section CD is connected to the display data bus DD.
Converts the 64-bit color font data supplied via B to 16-bit monochrome font data,
It can be output to the local data bus LDB. In order to accomplish such conversion processing, a discrimination circuit may be configured by a combination of gate circuits such as an OR gate circuit that discriminates whether color font data corresponds to black or data other than black.

As described above, the color development section CD is also capable of monochrome compression, and for this purpose, the input and output directions of data are bidirectional. In such a case, data input/output direction control is performed based on the read/write control signal R/W in response to read/write operations of the frame buffer memory FBM. That is, when the read/write control signal R/W is set to high level and the frame buffer memory FBM is read, the read data is transferred to the color development section C.
The input/output direction of data is controlled so that it can be supplied to D, and
The frame buffer memory FBM depends on its low level.
When a write operation is performed, the data input/output direction is controlled in response to the write operation so that color-developed color font data can be supplied to the frame buffer memory FBM. The color developing section CD is made operable by setting the selection signal 5EL3 outputted from the display controller C0NT to a selection level such as a high level.

Next, the color development operation in the above embodiment will be explained with reference to the timing chart of FIG.

First, it is assumed that monochrome font data is stored frame by frame in the monochrome font data storage area of the frame buffer memory FBM. When developing such monochrome font data in color, in memory cycle 5MC1 of FIG. An address signal Acrr is supplied, and a read operation is further instructed by a read/write control signal R/W at a high level. Thereby, the color register CR supplies color data Dcr corresponding to the input address signal to the color development section CD. According to this embodiment, the color data obtained by addressing the color register CR once corresponds to one color.

Next, in memory cycle 5YC2, the frame buffer memory FBM is connected to the display controller C0NT.
A chip is selected based on the control operation of , and a predetermined address signal Af bmr is supplied thereto, and a read operation is further instructed by a read/write control signal R/W at a high level.

As a result, 64-bit monochrome font data Dm corresponding to 64 pixels is transferred to the display data bus DDB.
f is output. At this time, the data selector DS
is supplied with the selection signal 5ELL at the selection level and the read/write control signal R/W at the high level from the display controller C0NT, and thereby selects one of the 64-bit monochrome font data Dmf read out to the display data bus DDB. Predetermined 16-bit monochrome font data Dmf is supplied to the local data bus LDB, and the data is sent to the display controller C0NT.
be taken in. If the Dmf is located in the system memory space of the microprocessor, the read operation is not necessarily necessary.

In the next memory cycle 5YC3, the frame buffer memory FBM is subjected to a write operation under the control of the display controller. That is, the display controller C0NT chips-selects the frame buffer memory FBM, instructs a write operation using a low-level read/write control signal R/W, and further outputs a predetermined address signal Afbmw to the address bus AB.
Furthermore, the 16-bit monochrome font data is output to the local data bus LDB. At this time, the color developing section CD is made operable by the selection signal S3 of the selection level output from the display controller, and the input/output direction of data is set according to the read/write control signal R/W. It is controlled in the direction of taking in data from the local data bus LDB and outputting it to the display data bus DDB. Therefore, memory cycle 5YC, which is the write cycle of frame buffer memory FBM.
3, the 16-bit monochrome font data Dmf output from the display controller C0NT is first supplied to the color development section CD. As a result, the color development area CD is 16 pixels, which corresponds to 16 pixels.
Developing the bit monochrome font data Dmf into 64-bit color font data, that is, color font data Dcf corresponding to 16 pixels, based on the color data Dcr supplied from the color register CR,
Output to the display data bus DDB. As a result, the frame buffer memory FBM has one memory
The write cycle causes 6 pixels, which corresponds to 16 pixels.
4-bit color font data Dcf is written. That is, a display data bus DD with a 64-bit configuration is configured for a local data bus LDB with a 16-bit configuration.
B is also utilized to the fullest in drawing operations such as color development. Suppose that the display controller C0N is used without using the color register CR and color development section CD.
If color development is performed inside T, monochrome font data and color font data must be sent and received between the local data bus LDB and display data bus DDB via the data selector DS, which corresponds to 16 pixels. In order to write 64-bit color font data to the frame buffer memory, four memory write cycles are required even if 4-bit monochrome font data is internally developed in color at the same time. Furthermore, if color development is performed for each pixel, as is commonly done, 16 memory write cycles are required.

Therefore, when one character, one window, or one screen is colored in the same color, data corresponding to pixels that have a substantial meaning in forming a display pattern, such as text such as characters or symbols, For monochrome font data whose addresses are adjacent to each other, color development can be performed extremely efficiently.

As is clear from the above description, this embodiment provides the following effects.

(1) In one memory write cycle to the frame buffer memory FBM, the color development section CD outputs 1 output from the display controller C0NT.
The 16-bit monochrome font data corresponding to 6 pixels is developed into 64-bit color font data corresponding to 16 pixels based on the color data supplied from the color register CR, and the data is sent via the display data bus DDB. Since the data is supplied to the frame buffer memory FBM, a 16-bit local data bus LD
The 64-bit grooved display data bus DDB configured for B is utilized to the fullest in drawing operations such as color development.

Color development processing efficiency can be improved.

(2) Particularly, as is usually the case, when one character, one window, or one screen is developed in the same color, the display pattern is substantially For monochrome font data in which addresses of data corresponding to meaningful pixels are adjacent to each other, color development can be performed extremely efficiently.

(3) From the above effects (1) and (2), the color development efficiency can be improved without increasing the number of data input/output terminals of the display controller, and at least,
Color development efficiency can be made comparable to the drawing processing speed for monochrome font data.

(4) From the effects (1) and (2) above, the bit configuration of the display data bus can be utilized to the fullest without depending on the color gradation.

(5) By improving the drawing efficiency from the above-mentioned effects, it is possible to improve the processing efficiency of the image display system itself.

Although the invention achieved by the present inventor has been specifically described above based on examples, the present invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof.

For example, in this embodiment, a system including a display controller as a dedicated peripheral device has been described.
The present invention is not limited thereto, and the display controller can be replaced with a microprocessor or processor.

Moreover, the color register of the above embodiment has one
Although the explanation has been made assuming that the output color data obtained by multiple addressing corresponds to one color, it is also possible to output color data by making each bit correspond to each bit of the monochrome font data supplied to the color development section. . In this case, it becomes possible to develop colors in different colors for each pixel. Note that the bit configurations of the local data bus and display data bus described in the above embodiments are not limited to those described above, and can be changed as appropriate.

In the above description, the invention made by the present inventor has been applied to an image display system including a CRT display device, which is the background of the invention, but the present invention is not limited thereto. It can also be used in systems that include laser printers that form images by scanning the same way as display devices, and can be widely applied to personal computers and office workstations.
The present invention can be applied at least to conditions where monochrome font data is developed into color font data.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

That is, the monochrome font data supplied via the display controller is colored based on the color data storage means in which color data is stored and the color data read out from the color data storage means based on the address control of the display controller. Since the color development system includes a color development means for developing color font data and supplying the resulting color font data to the frame buffer memory, one write cycle to the frame buffer memory can cause the color font data to be In addition, color font data is supplied corresponding to all bits of data that can be input/output at once, thereby improving efficiency on the color layer side.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the color development system of the present invention, and FIG. 2 is a time chart for explaining the color development operation. Dcrt...CRT display device, FBM...
Frame buffer memory, DDB...display data bus, P/S...parallel/serial conversion register, C0
NT...Display controller, LDB...Local data bus, CR...Color register, CD/
...Color development section, DS...Data selector, Dmf
... Monochrome font data, [)cf... Color font data.

Claims (1)

[Claims] 1. Monochrome font data is developed into colors according to the bit configuration of data that can be input and output in parallel from the frame buffer memory, and the resulting color font data is supplied to the frame buffer memory. The color development system includes a color data storage means capable of storing color data, and a monochrome color development system that is supplied via the controller based on the color data read out from the color data storage means based on address control of the controller. A color development system comprising: a color development means for color development of font data. 2. The color development means color development the monochrome font data output from the controller in synchronization with the write cycle to the frame buffer memory,
2. A color development system according to claim 1, wherein the color font data obtained thereby is supplied to a frame buffer memory in a writable manner. 3. The color development system according to claim 1 or 2, wherein the frame buffer memory is a bitmap memory for a CRT display device. 4. The color development system according to claim 3, wherein the controller is a display controller that controls addresses of a frame buffer memory.