KR20040005920A - Layered stacks and methods of production thereof - Google Patents

Abstract

The present invention provides a low dielectric constant laminated material, and a) a surface layer, b) spinning a dielectric material on the surface layer, c) curing the dielectric material to form a dielectric layer, d) a low dielectric constant material in the dielectric layer Spinning and e) curing the low dielectric constant material to form a low dielectric constant layer. Each layer can be spun on to the stacking device and subsequently cured before additional layers are added, or all layers are spun on to the stacking device to cure the entire stack at once.

Description

Laminated Structure and Method of Manufacturing the Same {LAYERED STACKS AND METHODS OF PRODUCTION THEREOF}

Technical Field

The field of the invention is semiconductor and electronic materials, devices and applications. More preferably, the field of the invention is laminate materials and devices for semiconductor and electronic applications.

Background

As the interconnectivity of integrated circuits increases and the size of functional elements decreases, the dielectric constants of insulating and other materials surrounding the metallic conductor lines in integrated circuits are increasingly important factors that affect the performance and dielectric capability of integrated circuits. It is becoming. Insulating materials having a low dielectric constant (less than 3.0, for example) are particularly preferred, as they typically allow for faster signal transfer, reduce capacitive effects and crosstalk between conductor lines, and drive the integrated circuit. To lower.

One way to achieve low dielectric constants in insulating materials is to use materials that have essentially low dielectric constants. In general, two different classes of materials having low dielectric constants, inorganic oxides and organic polymers, have recently been used. Inorganic oxides that can be applied by chemical vapor deposition or spin-on techniques have a dielectric constant of about 3 to 4 and have been widely used in wiring using design rules wider than 0.25 μm. However, as the dimensions of the wiring continue to shrink, materials with lower dielectric constants become more desirable.

One problem in incorporating low dielectric constant materials with other materials is that the effective dielectric constant of the device can be increased if the dielectric constant of another material is somewhat higher than the low dielectric constant material. In order to rectify this problem, a stacked device can be manufactured in which each layer or at least one or more layers is designed to have a low dielectric constant. (Added references). However, with the added advantage of lowering the effective dielectric constant of the device, it is difficult to manufacture the device efficiently. For example, the dielectric layer may be applied by spinning a dielectric material on a surface or substrate, and additional layers, such as hardmask layers or etch stop layers, may be applied by chemical vapor deposition (CVD) processes. .

Although various methods of making low dielectric constant materials and laminated materials are known in the art, all or almost all of them have disadvantages when incorporating them into the manufacture and assembly of laminated devices and laminated structures. . Thus, there is still a) an improved composition and method for lowering the dielectric constant of the material, b) efficient introduction of the low dielectric constant material on the surface layer or substrate, and c) a low dielectric constant material while maintaining an effective dielectric constant low. There is a need to manufacture and / or stack efficiently and cost-effectively.

Summary of the Invention

To produce a low dielectric constant lamination material that is relatively easy to manufacture and cost effective, the individual layers will be spun on a surface layer or other layer (or other multiple layers) that have been previously spun on the surface layer. In general, it is preferred that both the low dielectric constant layer of a particular laminate material or laminate device is applied by spinning a material or multiple materials onto a surface layer or substrate. Although all of the layers of the device are applied by spinning the material onto the device, it is preferred that there may be additional layers or additional multiple layers applied by other means. Most of the time, the low dielectric constant stacked device will have at least two low dielectric constant layers spin-on to be part of the device regardless of any other additional layers or materials applied.

a) a surface layer or substrate, b) one or more spin-on dielectric layers bonded to the surface layer; And c) one or more additional spin-on low dielectric constant layers coupled to one or more spin-on dielectric layers, described herein. Barrier / Cu seed layers may also be added to all such spin-on configurations with copper or metal via fills. The one or more additional spin on low dielectric constant layers may include one or more spin on stop layers and / or one or more spin on cap layers. It is also contemplated that the one or more additional spin on low dielectric constant layers include two or more layers or two or more additional spin on layers.

A method of manufacturing a low dielectric constant lamination device comprising: a) providing a surface layer; b) spinning a dielectric material on the surface layer, c) curing the dielectric material to form a dielectric layer, d) spinning a low dielectric constant material on the dielectric layer, and e) curing the low dielectric constant material to form a low dielectric constant layer. It is described to include forming a. Each layer may be spun on and subsequently cured to a stacking element and then additional layers may be added or the entire stack may be cured simultaneously after all layers have been spun on to the stacking device.

Brief description of the drawings

1 shows a conventional form of a stacked structure / element.

2 shows a preferred embodiment of the stacked element.

3A illustrates a conventional method of making a stacked structure / device.

3B shows a preferred method of making a stacked structure / device.

4 is a graph showing the reproducibility of the TEL ACT 12 Coater.

5 is a schematic of several preferred stacked low k strategy.

6 shows a graph or table of k _eff of a two-layer stack.

Fig. 7 shows a preferred double wave pattern device and graph and table information related to the device.

8 is a schematic view of a preferred manufacturing apparatus.

Detailed description of the invention

In order to produce a relatively easy to manufacture and cost effective low dielectric constant laminate material, it is contemplated that the individual layers are spun on the surface layer or on other layers (or multiple layers) previously spin-on to the surface layer. In general, it is preferred that both the low dielectric constant layers of a particular laminate material or laminate device be applied by spinning a material or multiple materials onto a surface layer or substrate. Although all of the layers of the device are preferably applied by spinning the material onto the device, there may be additional layers or multiple layers applied by other means. Most of the time, a low dielectric constant stacked device will have two or more low dielectric constant layers that are spun on and become part of the device, regardless of other additional layers or materials applied (see Michael E. Thomas, "Spin-On Stacked Films for Low"). k _eff Dielectrics ". Solid State Technology (July 2001), incorporated herein by reference.

1 shows a standard interlayer / interline dielectric that combines a chemical vapor deposition (CVD) dielectric as an etch stop 15 and cap layer 25 with a spin-on low dielectric constant (low k) dielectric material 20. (ILD) An integration diagram 10 is shown. Interlayer dielectric 10 is integrated with dielectric layer 30, CVD barrier layer 40, barrier / Cu seed layer 50 and copper or metal through fill 60. All of these additional devices may or may not be applied by spinning them on the surface layer.

a) surface layer or substrate 110 (shown in FIG. 2 as a dielectric / CVD barrier combination); b) one or more spin-on dielectric layers 120 coupled to the surface layer; And c) one or more additional spin-on low dielectric constant layers 130 coupled to the one or more spin-on dielectric layers described herein and shown in FIG. 2. Barrier / Cu seed layer 140 may also be added to all such spin-on configurations with copper or metal via fill 150. The one or more additional spin on low dielectric constant layers may include one or more spin on stop layers and / or one or more spin on cap layers. It is further contemplated that the one or more additional spin-on low dielectric constant layers comprise two or more layers or two or more additional spin-on layers.

Surfaces contemplated herein may include any desired substantially solid material, such as a substrate, wafer, or other suitable surface layer. Particularly preferred the substrate layer will comprise a film, glass, ceramic, plastic, metal or coated metal, or composite material. In a preferred embodiment, the substrate comprises a packaging surface layer, circuit board or package wiring trace, such as found in silicon or germanium arsenide dye or wafer surface layers, copper, silver, nickel, or gold plated leadframes, Copper surface layers found in via walls or hardener interfaces ("copper" includes bare copper and oxides thereof), polymer based packaging or board interfaces found in polyimide based flex packages Glass and polymers such as lead, or other rapid alloy solder ball surface layers, polyimides, BT, and FR4. In a more preferred embodiment, the substrate comprises materials common in the packaging and circuit board industry, such as silicon, copper, glass and other polymers. Suitable surface layers contemplated herein also include preformed laminate structures, other stacked devices, or both. This example may be the case where the dielectric material and the CVD barrier layer are initially laid down as a stacked structure, where the stacked structure is considered as the “surface layer” for subsequent spin-on stacked elements.

One or more spin-on dielectric layers are bonded to the surface layer or substrate. As used herein, the term "coupled" means that the surface layer and the layer or two layers are physically attached to each other, or bond forces such as covalent and ionic bonds, van der Waals forces, electrostatic forces between two parts of a material or device By physical attraction, including non-binding forces such as attraction, coulomb attraction, hydrogen bonding, and / or magnetic attraction. Also, as used herein, the term "coupled" refers to a state in which the surface layer and the spin-on layer or two layers are directly attached to each other, but the term refers to the surface layer and the spin-on layer or two layers. This also means that the state of being indirectly attached to each other, such as the presence of an adhesion promoting layer between the surface layer and the spin-on layer or another layer between the surface layer and the spin-on layer or two spin-on layers.

The spin-on dielectric layer may comprise any material that satisfies the following two requirements: a) the dielectric material should be able to be spun against the surface or other layer, and b) the dielectric material may be after curing or other final treatment. A low dielectric constant layer or low dielectric constant element is formed. As used herein, the term "low dielectric constant" means a dielectric constant of 1 MHZ to 2 GHZ, consistent with the text. Dielectric constants of low dielectric constant materials or layers are considered to be less than 3.0. In a preferred embodiment, the dielectric constant value of the low dielectric constant material or layer is less than 2.0.

The spin-on low-k dielectric materials include inorganic compounds such as silicon based, gallium based, germanium based, arsenic based, boron based compounds or combinations thereof, and polyethers, polyallyl ethers (Honeywell Electronic Materials). Compounds such as FLARE ^™ ), polyimides, polyesters, and organic compounds such as adamantane or cage compounds.

As used herein, "spinon material", "spinon organic material" (the composition is substantially organic), "spinon composition" and "spinon inorganic composition" (the composition is substantially inorganic) Expressions such as refer to solutions and compositions that can be used interchangeably and can be spun on a surface layer or substrate. In addition, since the spin-on glass material represents a spin-on material comprising a silicon based compound and / or a polymer, the expression "spin-on glass material" is considered to be included in the category of "spin-on inorganic material". Examples of silicone group compounds include siloxane compounds such as methylsiloxane, methylsilsesquioxane, phenylsiloxane, phenylsilsesquioxane, methylphenylsiloxane, methylphenylsilsesquioxane, silazane polymers, silicate polymers and mixtures thereof. The silazane polymer is a perhydrosilazan having a "transparent" polymer backbone to which chromophores can be attached. An example of a spin-on glass composition is NANOGLASS ^™ E, a nanoporous silicone based composition manufactured by Honeywell Electronics Materials. SILK ^™ manufactured by Dow is another example of a porous silicon-based dielectric material suitable for use as a spin-on dielectric material.

As used herein, the expression “spin-on free material” also includes siloxane polymers and block polymers, hydrogensiloxane polymers whose general formula is (H _0-1.0 SiO _1.5-2.0 ) _x , wherein the general formula ( HSiO _1.5 ) _x phosphorus hydrogenssesquioxane polymer. Where x is greater than about four. Also included are copolymers of hydrogensilsesquioxane and alkoxyhydridosiloxanes or hydroxyhydridosiloxanes. Spin-on glass materials additionally have organohydridosiloxane polymers of the general formula (H _0-1.0 SiO _1.5-2.0 ) _n (R _0-1.0 SiO _1.5-2.0 ) _m and of the general formula (HSiO _1.5 ) _n (RSiO _1.5 ) _m phosphorus organohydridosilsesquioxane polymer. Wherein m is greater than 0 and the sum of n and m is greater than about 4 and R is an alkyl group or an aryl group. Some useful organohydridosiloxane polymers have a sum of n and m in the range of about 4 to about 5000, where R is a C ₁ -C ₂₀ alkyl group or a C ₆ -C ₁₂ aryl group. Organohydridosiloxanes and organohydridosilsesquioxane polymers are represented as spin-on polymers. Some specific examples include alkylhydridosiloxanes such as methylhydridosiloxane, ethylhydridosiloxane, propylhydridosiloxane, t-butylhydridosiloxane, phenylhydridosiloxane; And alkylhydridosilsesquis such as methylhydridosilsesquioxane, ethylhydridosilsesquioxane, propylhydridosilsesquioxane, t-butylhydridosilsesquioxane, phenylhydridosilsesquioxane Oxane, and combinations thereof. Some of these spin-on materials are described in registered patents or patent applications hereby incorporated by reference in their entirety (PCT / US00 / 15772, filed June 8, 2000; US application 09, filed June 10, 1999). / 330248; US Application 09/491166, filed June 10, 1999; US Patent 6,365,765, registered April 2, 2002; US Patent 6,268,457, registered July 31, 2001; November 10, 2001 US application 10/001143 filed; US application 09/491166 filed January 26, 2000; PCT / US00 / 00523 filed January 7, 1999; US patent registered January 23, 2001 6,177,199; US Patent 6,358,559, registered March 19, 2002; US Patent 6,218,020, registered April 17, 2001; US Patent 6,361,820, registered March 26, 2002; April 17, 2001 US Patent 6,218,497; US Patent 6,359,099, registered March 19, 2002; US Patent 6,143,855, registered November 7, 2000; and issued March 20, 1998 Original US application 09/611528).

The organohydridosiloxane and organosiloxane resin solutions include various electronic devices, microelectronic devices, in particular semiconductor integrated circuits and electronic and semiconductors, including hardmask layers, dielectric layers, etch stop layers, and embedded etch stop layers contemplated herein. It can be utilized to form caged siloxane polymer films useful for the fabrication of various laminate materials for devices. Such organohydridosiloxane resins and the like have very affinity with other materials that should be used for lamination materials and devices, such as adamantane based compounds, diaadamantane based compounds, silicon core compounds, organic dielectrics, and nanoporous dielectrics. . Compounds having considerable affinity for the organohydridosiloxane resins and the like contemplated herein are described in PCT Application PCT / US01 / 32569, filed October 17, 2001, PCT Application PCT / US01 /, filed December 31, 2001. 50812, US Application 09/538276, US Application 09/544504, US Application 09/587851, US Patent 6,214,746, US Patent 6,171,687, US Patent 6,172,128, US Patent 6,156,812 , US application 60/350187, filed January 15, 2002, and US application 60/347195, filed January 8, 2002, all of which are hereby incorporated by reference in their entirety. .

As used herein, an organohydridosiloxane resin has the formula:

[H-Si _1.5 ] _n [R-SiO _1.5 ] _m Formula (1)

[H _0.5 -Si _1.5-1.8 ] _n [R _0.5-1.0 -SiO _1.5-1.8 ] _m Formula (2)

[H _0-1.0 -Si _1.5 ] _n [R-SiO _1.5 ] _m Formula (3)

[H-Si _1.5 ] _x [R-SiO _1.5 ] _y [SiO ₂ ] _z Formula (4)

Where

The sum of n and m, the sum of x, y, and z is from about 8 to about 5000, and m or y is less than about 40% (low organic matter = LOSP) or greater than about 40% (inorganic content = HOSP); R is substituted or unsubstituted, standard and branched alkyl (methyl, ethyl, butyl, propyl, pentyl), alkenyl groups (vinyl, allyl, isopropenyl), cycloalkyl, cycloalkenyl groups, aryl (phenyl groups , Benzyl groups, naphthalenyl groups, anthracenyl groups and phenanthrenyl groups) and mixtures thereof, wherein the specific mole percent of carbon containing substituents is a function of the proportion of the amount of starting material. In some LOSP embodiments, particularly advantageous results are obtained in mole% of carbon containing substituents ranging from about 15 mole% to about 25 mole%. In some HOSP embodiments, advantageous results are obtained in mole% of carbon containing substituents ranging from about 55 mole% to about 75 mole%.

Nanoporous silica dielectric films having dielectric constants ranging from 1.5 to about 3.8 can also be one or more spin-on layers. Nanoporous silica compounds contemplated herein are described in U.S. Pat. And 6,3119,855. Films of this type are laid down, matured, condensed in the presence of water, heated sufficiently to remove substantially all porogens and form voids in the film as silicon based precursors. The silicone based precursor composition comprises a monomer or prepolymer having the formula R _x -Si-L _y , wherein R is independently selected from alkyl groups, aryl groups, hydrogen, and combinations thereof, and L is Negatively charged residues such as alkoxy, carboxy, amino, amido, halides, isocyanato and combinations thereof, x is an integer from 0 to about 2, and y is an integer from about 2 to about 4.

The terms “cage structure”, “cage molecule” and “cage compound” are used interchangeably and have molecules of 10 or more atoms in which one or more cross bonds are covalently arranged to connect two or more atoms of a ring system. Means. In other words, a cage structure, cage molecule, or cage compound comprises a plurality of rings formed by covalently bonded atoms, wherein the structure, molecule, or compound defines a volume so that a point located at that volume does not pass through the ring It cannot escape its volume. The alternating bond and / or ring system may comprise one or more heteroatoms and may be aromatic, partially saturated or unsaturated. For example, within the scope of the definition above, adamantane or diaadamantane are considered to be cage structures while naphthalene or aromatic spiro compounds are not considered to be cage structures, in which the naphthalene or aromatic spiro compound is one cyclic bond or one or more Because they do not have a sympathetic bond.

The cage compound contemplated is not necessarily limited to being composed solely of carbon atoms, and may also include heteroatoms such as N, S, O, P and the like. Heteroatoms may advantageously introduce non-rectangle bond angular forms. With regard to the substituents and derivatives of the cage compounds under consideration, it should be recognized that many substituents and derivatives are suitable. For example, when the cage compound is relatively hydrophobic, a hydrophilic substituent may be introduced to increase the solubility in the hydrophilic solvent, or when the cage compound is relatively hydrophilic, the hydrophobic substituent may be introduced and solubility in the hydrophobic solvent. Can be increased. Alternatively, if polarity is desired, polar side groups can be added to the cage compound. It is further contemplated that suitable substituents may also include thermolabile groups, nucleophilic groups, and electron affinity groups. It should also be appreciated that functional groups can be applied to cage compounds (eg, to facilitate crosslinking reactions, derivatization reactions, and the like). Where cage compounds are derived, it is further contemplated that derivatization comprises halogenation of cage compounds and that the particularly preferred halogen is fluorine.

The cage molecules or compounds described in detail herein may also be groups attached to the polymer backbone, such that the cage compounds form one type of space (in the molecule) and crosslink with one or more parts of the backbone with itself or another backbone. Bonds can form nanoporous materials that form different types of spaces (molecules). Additional cage molecules, cage compounds, and variants of these molecules and compounds are described in detail in PCT / US01 / 32569, filed Oct. 18, 2001, the contents of which are incorporated herein by reference.

Polymers contemplated may also include a wide range of functional or structural moieties and halogenated groups, including aromatic systems. Suitable polymers can also take many forms, including homopolymers and heteropolymers. Moreover, alternative polymers may have various forms such as linear, branched, hyperbranched, or three-dimensional forms. The molecular weights of the polymers considered range over a wide range and are typically between 400 Daltons and 400000 Daltons or more.

The organic and inorganic materials described herein are similar in many respects to those described in US Pat. No. 5,874,516 to Burgoyne et al., Incorporated herein by reference, and may be used in substantially the same manner as set forth in this patent. have. For example, the organic and inorganic materials described herein can be applied to manufacture electronic chips, chips, and multi-chip modules, interlayer dielectrics, protective coatings, and can be applied as substrates in circuit boards or printed wire boards. Moreover, films or coatings of organic and inorganic materials described herein can be formed by solution techniques such as spraying, spin coating, or casting, with spin coating being preferred. Preferred solvents are 2-ethoxyethyl ether, cyclohexanone, cyclopentanone, toluene, xylene, chlorobenzene, N-methyl pyrrolidinone, N, N-dimethylformamide, N, N-dimethylacetamide, methyl Isobutyl ketone, 2-methoxyethyl ether, 5-methyl-2-hexanone, γ-butyrolactone, and mixtures thereof. Typically, the coating thickness is about 0.1 to about 15 microns. As the dielectric interlayer, the film thickness is less than 2 microns. Additives may also be used, including stabilizers, flame retardants, pigments, plasticizers, surfactants, and the like, to add or enhance specific target properties as is commonly known in the polymer art. Affinity or non-affinity polymers can be blended to impart the desired properties. Adhesion promoters may also be used. One such promoter is hexamethyidisilazan, which can be used to interact with possible hydroxyl functional groups that may be present in the surface layer, such as silicon dioxide, exposed to moisture or moisture. Polymers for microelectronic applications preferably contain low levels of ionic impurities (generally less than 1 ppm, preferably less than 10 ppb), especially for dielectric interlayers.

As used herein, the term "crosslinking" refers to the process by which two portions of at least two molecules or long molecules are joined together by chemical interaction. Such interactions can occur in a number of different ways, including the formation of covalent bonds, the formation of hydrogen bonds, the formation of hydrophobic, hydrophilic, ionic or electrostatic interactions. In addition, molecular interactions may be characterized by at least temporary physical connections between the molecules themselves or between two or more molecules.

As mentioned above, some preferred embodiments include multiple spaces in one or both of the spin-on dielectric layer or the spin-on low dielectric constant layer. These multiple spaces can also be expressed using the term "nanoporous layer". As used herein, the term “nanoporous layer” means any suitable low dielectric constant material (eg, 3.0 or less) consisting of a number of spatial and nonvolatile components. As used herein, the term “significantly” means that the desired component is present in the layer in more than 51% by weight.

As used herein, the term “space” means the volume at which a solid is replaced with a gas. The composition of the gas is generally not critical, but suitable gases include relatively pure gases containing air and mixtures thereof. Any one of the spin-on layers can include a number of spaces. The space can have any suitable shape. The spaces are typically spherical or may alternatively or additionally have tubular, lamella, disc or other models. It is also contemplated that the space may have any suitable diameter. It is also contemplated that the space may be somewhat connected with adjacent space to create a structure having a significant amount of connected or "open" porosity. In a preferred embodiment, the space has an average diameter of less than 1 micrometer. In a more preferred embodiment, the space has an average diameter of less than 10 nanometers. It is also contemplated that the space may be uniformly or randomly distributed within either spin-on layer. In a preferred embodiment, the space is uniformly dispersed in any spin-on layer.

The materials and layers described herein can be designed or designed in several ways such that the resulting solution can be solvated or dissolved in any suitable solvent as long as it can spin on the substrate, surface layer, wafer, or laminate material. Conventional solvents are also solvents capable of solvating monomers, isomer monomer mixtures and polymers. Solvents contemplated include any suitable pure organic, organometallic, or inorganic molecule or mixtures thereof that evaporate at the desired temperature, such as critical temperature. The solvent may also include any suitable pure polar and nonpolar compounds and mixtures thereof. In a preferred embodiment, the solvent includes water, ethanol, propanol, acetone, ethylene oxide, benzene, toluene, ether, cyclohexanone, butyrolactone, methylethylketone, and anisole. In a preferred embodiment, no solvent is used and at least one liquid monomer is selected to form a solvent free formulation.

As used herein, "pure" means a component having a constant composition. For example, pure water consists only of H ₂ O. As used herein, the term “mixture” means a component that is not pure, including brine. As used herein, the term "polar" means a property of a molecule or compound that produces an uneven charge distribution in one portion of the molecule or compound, or an uneven charge distribution made along them. As used herein, the term "nonpolar" refers to a property of a molecule or compound that produces an even charge distribution in one portion of the molecule or compound, or an even charge distribution made along them.

It is further contemplated that alternative low dielectric constant materials may also include additional components. For example, softeners or other protective agents may be added when the low dielectric constant material is exposed to mechanical forces. In other cases where the dielectric material is located on a flat surface layer, an adhesion promoter may be advantageously applied. In other cases, detergents or antifoams may be desired.

One or more spin-on low dielectric constant layers are coupled to one or more spin-on dielectric layers. Any material already described herein can be used to form additional spin on low dielectric constant layers. It is particularly important to understand that the material used for the dielectric layer bonded to the surface layer may be completely different from one or more spin-on low-k dielectric layers. For example, the first spin-on layer may comprise an organic cage-based compound such as GX-3 ^™ (adamantane-based compound) and the second spin-on layer may be an organosiloxane or organohydride such as HOSP ^™ (organosiloxane polymer). Lidosiloxane compounds may be included. In another example, the first spinon layer may comprise an organosiloxane compound and the second spinon layer may comprise an adamantane based compound, the third spinon layer may comprise another organosiloxane compound, and the fourth layer May comprise a spin-on glass material such as NANOGLASS E ^™ . As mentioned above, several contemplated compounds are shown in Table 1 along with their many measurable physical properties. Film properties of GX-3 are also shown in FIG. 2. Additional properties of some of the materials made by Honeywell Electronic Materials are shown in Table 3.

Once one or more spin-on dielectric layers are bonded to the surface layer, the effective dielectric constant can be measured for the stack comprising the surface layer and layers. The effective dielectric constant (k _ef ) must remain the same or be lowered somewhat with each additional spin-on low dielectric constant layer. In a preferred embodiment, the effective dielectric constant will be lowered into each additional spin on low dielectric constant layer. In a preferred embodiment, the effective dielectric constant of the stacked device is less than 3.0. In a more preferred embodiment, the effective dielectric constant of the stacked device is less than 2.5.

Additional spin on low dielectric constant layers can include layers such as etch stop layers, cap layers, hardmask layers, and the like. It is contemplated that this additional spin-on low dielectric constant layer will have an effective dielectric constant of less than 3.0. It is further contemplated that additional spin-on low dielectric constant layers will have an effective dielectric constant of less than 2.5.

Additional layers of one or more materials may be added to the stack structure or stack device. An additional layer of material is a layer of material or multiple materials designed to be added to a low dielectric constant stacked device, but need not necessarily be spin on to the stacked device. Additional layers of material should be used to form metals (eg, via fills or printed circuits, these are included in US Pat. Nos. 5,780,755, 6,113,781, 6,348,139, and 6,332,233, all of which are entire) Incorporated herein), metal diffusion layers, mask layers, antireflective coating layers, adhesion promoter layers, and the like.

As used herein, the term "metal" refers to elements in the d-block and f-block of the periodic table of the elements together with elements having metal-like properties such as silicon and germanium. As used herein, the term “d-block” refers to an element having electrons filling the 3d, 4d, 5d and 6d orbitals surrounding the nucleus of the element. As used herein, the term “f-block” refers to an element having an electron filling the 4f and 5f orbitals surrounding the nucleus of the element, including lanthanide and actinide. Preferred metals include titanium, silicon, cobalt, copper, nickel, zinc, vanadium, aluminum, chromium, platinum, gold, silver, tungsten, molybdenum, cerium, promethium, and thorium. More preferred metals include titanium, silicon, copper, nickel, platinum, gold, silver and tungsten. Most preferred metals include titanium, silicon, copper, and nickel. The term “metal” also includes alloys, metal / metal compositions, metal ceramic compositions, metal polymer compositions, as well as other metal compositions.

Laminating materials or layers of cladding materials may also be considered as additional layers of material, which may be bonded to the stacking device according to the specifications required by the device. Laminates are generally considered to be fibrous reinforced resin dielectric materials. Cladding materials are a subset of laminates produced when metals and other materials, such as copper, are incorporated into the laminate (see Harper, Charles A., Electronic Packaging and Interconnection Handbook, Second Edition, McGraw-Hill, New York, 1997).

As shown generally in FIG. 3B, a method of manufacturing a low dielectric constant stacked device comprises a) providing a surface layer, b) spinning a dielectric material on the surface layer, c) curing the dielectric material to form a dielectric layer, d) spinning a low dielectric constant material on the dielectric layer, and e) curing the low dielectric constant material to cure the low dielectric constant layer. Specifically in FIG. 3B (which is a preferred embodiment), the NANOGLASS ^™ E layer is spun on and baked 200 to the surface layer; The etch stop layer is spun on and baked 210 on the NANOGLASS ^™ E layer; Another NANOGLASS ^™ E layer is spun on and baked (220); The cap layer is spun on and baked 230 on the NANOGLASS ^™ E layer; Finally, the stacked structure or stacked device is cured (240). In one preferred embodiment, each layer is cured following deposition. In another preferred embodiment shown in FIG. 3B, each layer is spun on a stacking device and then the entire stack is cured simultaneously. Also, a conventional method of manufacturing a laminated device is shown in the prior art of FIG. 3A. Specifically, the prior art of FIG. 3A shows that a NANOGLASS ^™ E layer is spin-on and baked 310 to the surface layer; The NANOGLASS ^™ E layer is then cured (320); A CVD etch stop layer is added to the NANOGLASS ^™ E layer (330); Another NANOGLASS ^™ E layer is spun on and baked 340 into the CVD applied layer; The NANOGLASS ^™ E layer is cured (350); A CVD applied cap is added 360 to the laminate structure or device.

Any suitable coating mechanism or device can be used to apply the spin-on layer and material. Examples of suitable coating devices include FSI 300 mm coaters or TEL ACT 12 coaters. Suitable coating mechanisms or devices must: a) be capable of dispensing spin-on material in a reliably reproducible thickness; b) be able to reliably distribute several different types of spin-on materials; c) be easily integrated into existing manufacturing methods; d) be easy to use and operate. 4 shows a graph of a typical wafer to wafer spin-on uniformity measurement for a FLARE (polyarylene ether) coating using a TEL ACT 12 coater.

5 illustrates several embodiments of the present invention. 5A shows a stacked device comprising a layer 510 of GX-3 ^™ coupled to a spin-on barrier / etch stop layer 520, wherein the spin-on / barrier etch stop layer 520 is an ELK-HOSP ^™. Or bonded to layer 530 of NANOGLASS ^™ E, which in turn is bonded to layer 540 of GX-3 ^™ , which is in turn capped off by spin-on cap layer 550. Copper is used as the via fill 560 for this particular laminate structure. 5B illustrates a stacked device comprising an ELK-HOSP ^™ or NANOGLASS ^™ E layer 505 coupled to a spin-on barrier / etch stop layer 515, wherein the ELK-HOSP ^™ or NANOGLASS ^™ E layer is a GX− layer. 3 ^™ layer 525, which in turn is bonded to ELK-HOSP ^™ or NANOGLASS ^™ E layer 535, which in turn is capped by spin-on cap layer 545. Copper is used as the via fill 555 for this particular laminate structure. Figure 5C illustrates a laminated element comprising a GX-3 ^TM layer 565 coupled to the spin-on copper barrier layer 570, the spin-on copper barrier layer is coupled to the GX-3 ^TM layer 575 and , Which in turn is bonded to ELK-HOSP ^™ or NANOGLASS ^™ E layer 580, which in turn is bonded to GX-3 ^™ layer 585, which in turn is connected to ELK-HOSP ^™ or NANOGLASS ^™ E layer 590. It is capped by. Copper is used as via fill 595 for this particular laminate structure.

Devices, electronic devices, and semiconductor devices contemplated herein are generally considered to include any single or stacked devices that can be used in electronic substrate products. The term "laminated electronic structure" may be used interchangeably with the terms "electronic element", "laminated element" or "laminated structure" when the electronic element is a laminated element. Electronic components contemplated include circuit boards, chip packaging, dielectric elements of circuit boards, printed wiring boards, and other elements of circuit boards such as capacitors, inductors, and resistors.

As used herein, the term “electronic device” also means any device or component that can be used in a circuit to achieve some desired electronic action. Electronic devices contemplated herein may be classified in a number of ways, including classification into active devices and passive devices. Active devices are electronic devices capable of some dynamic function, such as amplification, vibration, or signal control, which generally require a power source for operation. Examples are bipolar transistors, field effect transistors, and integrated circuits. Passive elements, for example, are basically idle at operation and can generally amplify or vibrate and typically do not require power for their characteristic operation. Examples are conventional resistors, capacitors, inductors, diodes, rectifiers and fuses.

Electronic devices contemplated herein may also be classified as conductors, semiconductors, or insulators. Here, conductors are devices that make charge carriers (eg electrons) easily move between atoms as in current. Examples of conductor elements are vias that include circuit traces and metals. Insulators are devices whose function is related to the ability of the material to extremely prevent current conduction, such as, for example, a material that is applied to electrically separate other devices, and semiconductors are essentially a natural resistive force between the conductor and insulator of a material. This device has a function related to the ability to conduct current. Examples of semiconductor components are transistors, diodes, some lasers, rectifiers, thyristors, photosensors.

Electronic devices contemplated herein may also be classified as power supplies or power consumers. Power supply elements are typically used to provide power to other elements and include batteries, capacitors, coils, and fuel cells. Power consumption sources include resistors, transistors, ICs, sensors, and the like.

In addition, electronic devices contemplated herein may also be classified as isolated and integrated. Separation elements are devices that provide one particular electrical characteristic concentrated at a point in a circuit. Examples are resistors, capacitors, diodes, and transistors. Integrated devices are combinations of devices that can provide multiple electrical characteristics at one point in a circuit. An example is an IC, an integrated circuit in which multiple devices and connection traces are combined to perform multiple or complex functions such as logic.

As used herein, the various forms of the term “laminated” or “multilayered” as used in a device mean that the device's functionality results from having parallel layers of different materials. For example, conventional P-N-P transistors are considered herein as multiple stacked devices because their function arises from the parallel arrangement of P and N-added semiconductor layers. On the other hand, conductive traces on circuit boards generally increase the current having only a capacitance rather than alter the functionality of the traces, so that the traces are generally produced even by the continuous deposition of conductive material. It will not be considered multi-layered on its own.

Electronic substrate products may be "final" in the sense that they are readily used in the industry or by other consumers. Examples of final consumer products are televisions, computers, mobile phones, pagers, palm organizers, portable radios, car stereos, and remote controls. There are also "middle" products such as circuit boards, chip packaging, and keyboards that will be used in future end products.

The electronic product may also include a sample device at any stage of development from a conceptual model to a full scale model of the final increase in scale. The sample may or may not contain all the actual devices intended for the final product, and the sample may have some devices made of the constituent material to negate the initial impact on other devices during the initial testing process.

Electronics and devices can include laminated materials, stacked devices, and devices laminated during manufacture for use in devices or articles. The layer comprising or consisting of electronic devices may constitute the final stacked device or article.

Example

FIG. 6 shows effective dielectric constants measured for a two layer stack structure comprising a silicon layer 600, a spin-on layer structure 610 of NANOGLASS ^™ E, a spin-on cap layer 620, and an aluminum layer 630. Illustrated. Graph 640 shows the effective dielectric constants of three different cap layers, CVD, FLARE ^™ , and NANOGLASS ^™ E.

7 shows the line effective dielectric constant measurement for a dual damascene process. The stack structure 700 includes a CVD barrier 710, a spin on layer 720 of NANOGLASS ^TM E, a spin on etch stop layer 730, another spin on layer 740 of NANOGLASS ^TM E, a spin on cap layer 750 ), Spin-on CVD barrier 760, and other spin-on NANOGLASS ^™ E layer 770. The etch stop layer and the cap layer include CVD, FLARE ^™ , and NANOGLASS ^™ E for the purpose of measuring the interline effective dielectric constant shown in graph 780.

8 shows a schematic of a Spin-on Dielectric Bulk Delivery System for Manufacturing. Spin-on material (SOM) 810 is sent to reservoir 830 via pump 820, filter 830. This first process 840 is frozen and chem. Supervised by Chem. Managing Software 850. SOM 810 is transferred from reservoir 830 to another reservoir 860 where SOM 810 is surface layer 890 through second pump 870, second filter 880 by a spin-on process. Delivered to the award.

As such, certain embodiments and applications of low dielectric constant lamination materials and compositions and methods for making devices comprising such materials have been disclosed. However, it will be apparent that various modifications may be made without departing from the concept of the present invention in addition to those already described. Accordingly, the subject matter of the present invention will not be limited except as by the appended claims. Moreover, in interpreting both the specification and the claims, all terms should be interpreted as broadly as possible in a context consistently. In particular, the terms “comprises” or “comprising” are to be construed with respect to elements, elements or steps in a non-exclusive manner, which means that any element, element or step in which a recited element, element or step is not explicitly recited. Means that it can be present, utilized or combined with.

GX-3 dielectric film characteristics Film properties GX-3 experiment GX-3P Experiment Low k film requirements Curing Conditions (furnace Curing in N ₂ ) 400 ℃ / 60min 350-400 ℃ / 60min400-425 ℃ / 30min Thickness (μm) 0.1, 0.4, 0.6, 1.0, 1.6 0.3, 0.6 0.2-1.5 n _Baking (@ 633nm) 1.665 1.59-1.61 n _{Hardening a} (@ 633nm) 1.60 1.39-1.53 K (@ 1MHz) Before baking 2.752.68 2.32 1.90 T _g (2 cycles: room temperature to 475 ° C.) 1st cycle 2nd cycle 400> 475 > 400 E _mod 6.40 GPa (1.6 μm) 7.12 GPa (1.0 μm) 8.76 GPa (0.6 μm) 6.3 GPa (0.4 μm) > 6 GPa Hardness 0.65 GPa (1.6 μm) 0.72 GPa (1.0 μm) 0.83 GPa (0.6 μm) 0.5 GPa (0.4 μm) TBD ITGA (% loss @ 425C) 1.95 <1 wt% no loss gas

FLARE? GX-3 GX-3P HOSP NG E Substance Type-Foundation Backbone Organic / solid Organic / solid Organic / porous Weapon / Solid Weapon / Porosity Electrical Properties Dielectric Constant Voltage, MV / cm 2.85> 2 2.6> 2 2.3 TBD 2.5> 2 2.2> 2 Thermal Properties Reduction,%, 400C / 10hr Reduction,%, 425C / 10hr ITGA% Weight Loss @ 425C / hr 1.2440.8 120.38 12 TBD No discernible change No discernible change <12 Mechanical Properties Tg, ℃ Modulus, GPa Hardness, Residual Stress (MPa) Stud Tensile Strength Tape Test of Film After GPa Hardening 4004.8-5.10.35-0.4> 11 pass > 4506.3-7.10.79-0.8411 Pass TBD6.3 (0.4um) 0.50 (0.4um) No Tg 3.4-4.40.37-0.4340 Pass No Tg 5.8-6.20.7-0.920 Pass Other Properties of Refractive Index (633nm) Solvent Affinity 1.675 available 1.627 with 1.39-1.53 Yes 1.36 available 1.265 Yes

Claims (31)

A low dielectric constant stacked device comprising a surface layer, one or more spin-on dielectric layers bonded to the surface layer, and one or more low-k dielectric layers coupled to one or more spin-on dielectric layers. 2. The low dielectric constant stacked device of claim 1, wherein the at least one spin on low dielectric constant layer comprises at least one spin on stop layer. 2. The low dielectric constant stacked device of claim 1, wherein the at least one spin on low dielectric constant layer comprises at least one spin on cap layer. The low dielectric constant stacked device of claim 1, wherein the at least one spin-on low dielectric constant layer comprises at least two layers. The low dielectric constant stacked device of claim 1, wherein the at least one spin on dielectric layer or the at least one spin on low dielectric constant layer comprises a dielectric constant of less than 3.0. 6. The low dielectric constant stacked device of claim 5 wherein at least one spin-on dielectric layer or at least one spin-on low dielectric constant layer comprises a dielectric constant of less than 2.5. The low dielectric constant lamination device of claim 1 wherein the laminated material has an effective dielectric constant of less than 3.0. The low dielectric constant lamination device of claim 1 wherein the laminate material has an effective dielectric constant of less than 2.5. 2. The low dielectric constant stacked device of claim 1 wherein at least one spin-on dielectric layer or at least one spin-on low dielectric constant layer comprises at least one organic compound. 10. The device of claim 9 wherein at least one organic compound comprises a cage based compound. The low dielectric constant lamination device according to claim 10, wherein the cage based compound comprises adamantane based molecules. 10. The device of claim 9 wherein at least one organic compound comprises a polymer based compound. 13. The low dielectric constant lamination device of claim 12 wherein the polymer based compound comprises polyarylene ether. 2. The low dielectric constant lamination device of claim 1 wherein at least one spin-on dielectric layer or at least one spin-on low dielectric constant layer comprises at least one inorganic compound. 15. The low dielectric constant lamination device of claim 14 wherein at least one inorganic compound comprises at least one silicon atom. 15. The low dielectric constant lamination device of claim 14 wherein at least one inorganic compound comprises an organosiloxane compound. 15. The device of claim 14 wherein at least one inorganic compound comprises a hydridosiloxane compound. The low dielectric constant stacked device of claim 1, wherein the at least one spin-on dielectric layer or the at least one spin-on low dielectric constant layer comprises a plurality of voids. The low dielectric constant lamination device of claim 1 further comprising at least one additional layer of material. 20. The low dielectric constant lamination device of claim 19 wherein at least one additional layer of material comprises a metal diffusion layer. 20. The low dielectric constant lamination device of claim 19 wherein at least one additional layer of material comprises a metal layer. 20. The device of claim 19, wherein at least one additional layer of material comprises an adhesion promoter layer. Providing a surface layer; Spinning a dielectric material on the surface layer; Curing the dielectric material to form a dielectric layer; Spinning a low dielectric constant material on the dielectric layer; Forming a low dielectric constant stacked element comprising curing the low dielectric constant material to form a low dielectric constant layer. 24. The method of claim 23, wherein the dielectric material and low dielectric constant material comprise a dielectric constant of less than 3.0. 24. The method of claim 23 wherein the dielectric material and low dielectric constant material comprise a dielectric constant of less than 2.5. Providing a surface layer; Spinning a dielectric material on the surface layer; Spinning the low dielectric constant material on the dielectric layer to form a laminate structure; Hardening the laminate structure to form a low dielectric constant laminating device. 24. The method of claim 23, wherein curing the dielectric material and curing the low dielectric constant material comprise using an extended curing source. 28. The method of claim 27, wherein the expanded curing source comprises a heat source. 24. The method of claim 23, wherein curing the dielectric material and curing the low dielectric constant material comprise forming a plurality of spaces. A laminated device manufactured by the method of claim 23. A laminated element manufactured by the method of claim 26.