KR20040001538A - Method for forming self aligned contact in semicodnductor device - Google Patents

Abstract

PURPOSE: A method for forming a self-alignment contact of a semiconductor device is provided to be capable of preventing the failure of the device due to the shortage phenomenon of a metal line by protecting the metal line using a polysilicon layer. CONSTITUTION: After sequentially forming a conductive layer(120a) and an etching stop layer(140a) at the upper portion of a semiconductor substrate(100), a metal line(150) is formed by selectively removing the etching stop layer and the conductive layer. A spacer(160) is formed at both sidewalls of the metal line. An insulating layer(180a) is formed on the entire surface of the resultant structure. After forming a contact hole(220a) by selectively removing the insulating layer using a self-alignment etching process, a polysilicon layer(240) is formed along the upper surface of the resultant structure.

Description

METHOD FOR FORMING SELF ALIGNED CONTACT IN SEMICODNDUCTOR DEVICE}

The present invention relates to a method of forming a self-aligned contact of a semiconductor device, and more particularly, to a method of forming a self-aligned contact of a semiconductor device capable of preventing a defect of a device due to the loss of an etch barrier during etching of the self-aligned contact. .

In general, as the degree of integration of semiconductor devices increases, the multilayering of semiconductor devices becomes an essential matter, and the miniaturization of various patterns constituting each layer is also accelerating. Here, as a general lithography process, it is difficult to ensure accurate overlapping accuracy between layers, and thus a self aligned contact (SAC) forming method that can alleviate the alignment error problem of the mask process during contact formation is provided. Developed.

A method of forming a self-aligned contact of a semiconductor device according to the prior art will now be described with reference to FIGS. 1A to 1D.

In the method of forming a self-aligned contact of a semiconductor device according to the prior art, as shown in FIG.

Subsequently, as illustrated in FIG. 1B, a predetermined conductive line 15 including the etch stop layer 14a and the conductive layer 12a is formed by patterning the etch stop layer 14 and the conductive layer 12 in a predetermined form. To form. Then, spacers 16 are formed on both sides of the conductive line 15.

Next, as shown in FIG. 1C, an insulating layer 18 is coated on the entire surface of the substrate 10 on which the conductive line 15 is formed, and then a mask 20 for self alignment etching on the insulating layer 18. To form.

Subsequently, as shown in FIG. 1D, the insulating film 18 is selectively removed using the mask 20 to complete the self-aligning contact 22.

However, the method of forming a self-aligned contact of a semiconductor device according to the prior art has the following problems.

In the related art, as illustrated in FIG. 1D, a portion of the anti-etching layer 14a is damaged during the self-aligned contact etching, and thus, the etching stop layer may not be sufficiently functioned. As such, as a portion of the etch stop layer 14a is lost, the conductive layer 12a is exposed to the outside, and the exposed conductive layer 12a forms an unwanted connection with a conductor (not shown) that is subsequently deposited. do. Therefore, the semiconductor device has a problem in that it cannot be operated as the device due to electrical failure due to unnecessary connection.

Accordingly, the present invention has been made to solve the above-described problems in the prior art, an object of the present invention is to protect the exposed portion of the conductor after the primary self-aligned contact with a polysilicon film defect of the device due to the short circuit of the conductor The present invention provides a method for forming a self-aligned contact of a semiconductor device capable of preventing the damage.

1A to 1D are cross-sectional views illustrating processes for forming a self-aligned contact of a semiconductor device according to the prior art.

2A to 2F are cross-sectional views illustrating processes for forming a self-aligned contact of a semiconductor device according to the present invention.

Explanation of symbols on the main parts of the drawings

100; Semiconductor substrates 120 and 120a; Conductive layer

140; Etching prevention layer 140a; Etch barrier

150; Conductive wire 160; Spacer

180,180a; Insulating layer 200; Self-aligned Contact Etch Mask

220; Contact holes 240; Polysilicon film

Self-aligned contact forming method of a semiconductor device according to the present invention for achieving the above object comprises the steps of forming a conductive layer and an etch stop layer on a semiconductor substrate; Selectively removing the etch stop layer and the conductive layer to form a conductive wire having an etch stop layer; Forming spacers on both sides of the conductive line; Forming an insulating layer on an entire surface of the substrate on which the conductive wire is formed; Selectively removing the insulating layer by self-aligned etching so that the substrate is not exposed to form contact holes between the conductive lines; Forming a polysilicon film on the inner surface of the contact hole and the insulating layer; And removing the insulating layer remaining on the inner surface of the contact hole by self-aligned etching using the polysilicon layer as a barrier.

According to the present invention, the anti-etching film and the spacer are protected from the etching process by the polysilicon film.

Hereinafter, a method of forming a self-aligned contact of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

2A through 2F are cross-sectional views illustrating processes of forming a self-aligned contact of a semiconductor device according to the present invention.

In the method of forming a self-aligned contact of the semiconductor device according to the present invention, as shown in FIG. 2A, the conductive layer 120 and the etch stop layer 140 are formed on the semiconductor substrate 100.

The conductive layer 120 is formed by depositing any one of W, WSi _X , TiSi _X , CoSi _X , Al, Cu, and the like.

The etch stop layer 140 is formed of a material having a selectivity in the subsequent etching of the insulating layer 180, which will be described later. On the other hand, the etch stop layer 140 is formed to a thickness of about 500 ~ 5,000Å in consideration of the role of the etch prevention and the insulating role of the conductive material.

Subsequently, as shown in FIG. 2B, the conductive layer 120a is patterned by selectively removing the etch stop layer 140 and the conductive layer 120, and the conductive line 120a includes an etch stop layer 140a thereon. 150). Next, spacers 160 may be formed on both side surfaces of the conductive line 150 to serve as side etch stop layers. At this time, the width of the spacer 160 is formed to about 100 ~ 1000Å in consideration of the gap between the two conductive wires (150).

Next, as shown in FIG. 2C, the insulating layer 180 is formed on the entire surface of the substrate 100 on which the conductive wire 150 is formed to have a thickness of about 500 mW to 10,000 mW. The insulating layer 180 may be formed of an oxide-based material or a polymeric low dielectric insulating material. Accordingly, the etch stop layer 140 may be formed by selecting a material as follows.

As described above, the etch stop layer 140 is formed of a material having a selectivity in the etching process of the insulating layer 180, when the insulating layer 180 is formed of an oxide-based material, the etching The prevention layer 140 is formed of a nitride film-based material. If the insulating layer 180 is formed of a polymeric low dielectric insulating material, the etch stop layer 140 is formed of an oxide-based material.

Subsequently, as shown in FIG. 2D, a hole type, a line type, a T type, or an I type self-aligned contact mask 200 is disposed on the insulating layer 180. To form. Then, a self aligned contact (SAC) using the mask 200 and a predetermined etching reactor, for example, a high density plasma etching reactor or a middle density plasma etching reactor. The insulating layer 180 is selectively removed by etching to form the contact hole 220 exposing the contact predetermined region.

The self-aligned contact etching proceeds under the condition that the insulating layer 180 can be selectively etched with respect to the etch stop layer 140a. Looking at the specific conditions, when the insulating layer 180 is an oxide-based material and the etch barrier 140a is a nitride-based material Ar / C ₄ F ₈ / CH ₂ F ₂ , Ar / C ₄ F ₈ / O ₂ 1 to 100 mTorr using any one gas selected from the group consisting of Ar / C ₄ F ₈ / CH ₃ F, Ar / C ₄ F ₈ / CH ₃ F, Ar / C ₅ F ₈ / O, and combinations thereof. Proceed under pressure.

In contrast, when the insulating layer 180 is a polymer low dielectric insulating material and the etch stop layer 140a is an oxide-based material, the self-aligned contact etching is Ar / O ₂ / N ₂ / H ₂ / CH ₄ / C. Proceed at a pressure of 1-100 mTorr using a gas consisting of ₂ H ₄ / C _X F _Y.

Next, as illustrated in FIG. 2E, a polysilicon layer 240 is formed on the inner surface of the contact hole 220 and the insulating layer 180a. The polysilicon layer 240 is naturally thicker on the insulating layer 180a and on the etch stop layer 140a of the conductive line 150 than the bottom of the contact hole 220. Therefore, the thickness of the polysilicon film 240 is formed to 50 ~ 1000Å thickness in consideration of the relative thickness according to the deposition position.

On the other hand, the polysilicon film 240 is the same range as the doping concentration of the conductor polysilicon is deposited later, for example, phosphorus (P) is doped at a concentration of 1 × 10 ¹⁰ ~ 1 × 10 ²⁵ ions / cm ² It will be preferable to use the present one to omit the removal process of the polysilicon film 240 in a subsequent process.

Next, as shown in FIG. 2F, the insulating layer 180a remaining on the inner surface of the contact hole 220 is removed by self-aligned etching using the polysilicon 240 as a barrier. As such, the etch stop layer 140a and the spacer 160 are protected by the polysilicon layer 240. Therefore, a conductor (not shown) such as polysilicon filling the contact hole 220 and the conductive layer 120a in the conductive wire 150 are not interconnected by the etch stop layer 140a and the spacer 160. Will not.

Meanwhile, if the conductor to be buried in the contact hole 220 is polysilicon (not shown), the polysilicon film 240 may be left without needing to be removed because the same material.

Various embodiments can be easily implemented as well as self-explanatory to those skilled in the art without departing from the principles and spirit of the present invention. Accordingly, the claims appended hereto are not limited to those already described above, and the following claims are intended to cover all of the novel and patented matters inherent in the invention, and are also common in the art to which the invention pertains. Includes all features that are processed evenly by the knowledgeable.

As described above, according to the method for forming a self-aligned contact of a semiconductor device according to the present invention, the conventional self-aligned contact etching process is improved, thereby minimizing defects of the device that may occur during etching and increasing the stability of the etching process. Therefore, the yield of the device is improved.

Claims (9)

Forming a conductive layer and an etch stop layer on the semiconductor substrate; Selectively removing the etch stop layer and the conductive layer to form a conductive wire having an etch stop layer; Forming spacers on both sides of the conductive line; Forming an insulating layer on an entire surface of the substrate on which the conductive wire is formed; Selectively removing the insulating layer by self-aligned etching so that the substrate is not exposed to form contact holes between the conductive lines; Forming a polysilicon film on the inner surface of the contact hole and the insulating layer; And Removing the insulating layer remaining on the inner surface of the contact hole by a self-aligned etching using the polysilicon layer as a barrier. The method of claim 1, And the etch stop layer is a material capable of having an etch selectivity with the insulating layer. The method of claim 2, And the insulating layer is an oxide-based material and the etch stop layer is a nitride-based material. The method of claim 2, The insulating layer is a polymeric low dielectric insulating material, and the etch stop layer is a method of forming a self-aligned contact of a semiconductor device, characterized in that the oxide-based material. The method of claim 1, The self-aligned etching method of forming a self-aligned contact of the semiconductor device, characterized in that to proceed to the condition that can selectively etch the insulating layer with respect to the etch barrier. The method of claim 5, The self-aligned etching may include Ar / C ₄ F ₈ / CH ₂ F ₂ , Ar / C ₄ F ₈ / O ₂ , Ar / C ₄ F when the insulating layer is an oxide-based material and the etch stop layer is a nitride-based material. ₈ / CH ₃ F, Ar / C ₄ F ₈ / CH ₃ F, Ar / C ₅ F ₈ / O and any one selected from the group consisting of a combination of these characterized in that it proceeds at 1 ~ 100mTorr pressure A method of forming a self-aligned contact of a semiconductor device. The method of claim 5, The self-aligned etching is Ar / O ₂ / N ₂ / H ₂ / CH ₄ / C ₂ H ₄ / C _X F _Y when the insulating layer is a polymeric low dielectric insulating material and the etch stop layer is an oxide-based material. Method for forming a self-aligned contact of a semiconductor device, characterized in that for proceeding at a pressure of 1 ~ 100mTorr using the gas made up. The method of claim 1, The polysilicon film is 50 Å ~ 1,000 Å thickness of the self-aligned contact forming method of a semiconductor device. The method of claim 1, The polysilicon film has a phosphorus (P) doped at a concentration of 1 × 10 ¹⁰ ~ 1 × 10 ²⁵ ions / cm ² The self-aligned contact forming method of a semiconductor device.