KR20030073206A - Method for manufacturing semiconductor laser diode array - Google Patents
Method for manufacturing semiconductor laser diode array Download PDFInfo
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- KR20030073206A KR20030073206A KR1020020012639A KR20020012639A KR20030073206A KR 20030073206 A KR20030073206 A KR 20030073206A KR 1020020012639 A KR1020020012639 A KR 1020020012639A KR 20020012639 A KR20020012639 A KR 20020012639A KR 20030073206 A KR20030073206 A KR 20030073206A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/2205—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers
- H01S5/2206—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers based on III-V materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S3/00—Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range
- H01S3/09—Processes or apparatus for excitation, e.g. pumping
- H01S3/091—Processes or apparatus for excitation, e.g. pumping using optical pumping
- H01S3/094—Processes or apparatus for excitation, e.g. pumping using optical pumping by coherent light
- H01S3/0941—Processes or apparatus for excitation, e.g. pumping using optical pumping by coherent light of a laser diode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
- H01S5/0421—Electrical excitation ; Circuits therefor characterised by the semiconducting contacting layers
- H01S5/0422—Electrical excitation ; Circuits therefor characterised by the semiconducting contacting layers with n- and p-contacts on the same side of the active layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/2205—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers
- H01S5/2222—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers having special electric properties
- H01S5/2227—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers having special electric properties special thin layer sequence
- H01S5/2228—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers having special electric properties special thin layer sequence quantum wells
Abstract
Description
본 발명은 반도체 레이저 다이오드 어레이의 제조방법에 관한 것으로, 보다 상세하게는 비발광 재결합(Auger recombination)으로 인한 벽개면 근처에서의 열의 발생을 줄이고, 벽개면에 전류를 흐르지 못하도록 하여, 벽개면의 손상을 방지하여 고출력 및 긴수명을 갖는 반도체 레이저 다이오드 어레이의 제조방법에 관한 것이다.The present invention relates to a method for manufacturing a semiconductor laser diode array, and more particularly, to reduce the generation of heat near the cleaved surface due to auger recombination, to prevent the current flow to the cleaved surface, to prevent damage to the cleaved surface The present invention relates to a method for manufacturing a semiconductor laser diode array having high power and long life.
일반적으로, 고출력 에지 방출(Edge-emitting) 반도체 레이저 다이오드는 고체 상태(Solid-state) 레이저 펌핑용, 자유 공간 광 통신(Free-space optical communication), 의료용, 디스플레이용 등 다양한 분야에 사용되고 있다.In general, high-power edge-emitting semiconductor laser diodes are used in various fields such as for solid-state laser pumping, free-space optical communication, medical, and display.
도 1은 일반적인 반도체 레이저 다이오드 어레이의 사시도로서, 레이저광을 방출하는 활성층(5)이 구비된 반도체 레이저 다이오드 어레이(10)의 상부에는 상호 분리된 복수의 리지(Ridge)(7)들이 형성되어 있어, 리지(7)로 유입되는 전류에 의해서 활성층(5)은 레이저광을 방출한다.1 is a perspective view of a general semiconductor laser diode array, in which a plurality of ridges 7 are separated from each other and formed on an upper portion of the semiconductor laser diode array 10 having an active layer 5 that emits laser light. By the current flowing into the ridge 7, the active layer 5 emits laser light.
보통 하나의 반도체 레이저 다이오드 어레이에 20 ~ 30개 정도의 리지가 형성되어 있으며, 반도체 레이저 다이오드 어레이(10)의 폭(W)은 1㎝이며, 리지폭은 대략 10㎛ ~ 150㎛이다.Usually, about 20 to 30 ridges are formed in one semiconductor laser diode array. The width W of the semiconductor laser diode array 10 is 1 cm, and the ridge width is about 10 μm to 150 μm.
이런 반도체 레이저 다이오드 어레이가 고출력을 얻기 위해서는 광 이득을 얻는 활성층의 면적이 확장되어야만 하고, 이런 활성층의 면적이 확장되기 위해서는 어레이 형태로 배열된 리지(Ridge)들의 폭이 각각 증가되어야 한다.In order to obtain a high output of such a semiconductor laser diode array, the area of an active layer that obtains optical gain must be enlarged, and in order to enlarge the area of the active layer, the widths of the ridges arranged in an array form must be increased.
이 경우, 리지들의 폭이 반도체 레이저 다이오드의 어레이의 광출력 벽개면 또는 그 반대면까지 확장되어, 리지들을 통한 전류 주입시 벽개면으로 전류가 흘러서 바람직하지 않은 비발광 재결합(Auger recombination)으로 벽개면에 열이 발생되어, 벽개면에 손상을 주게 된다.In this case, the width of the ridges extends to the light output cleavage plane or vice versa of the array of semiconductor laser diodes, such that current flows to the cleavage plane during the injection of current through the ridges, causing heat on the cleavage surface due to undesirable auger recombination. To damage the cleaved surface.
한편, 고출력 반도체 레이저 다이오드 어레이는 비 발광 재결합과 결함(Defect)들에 의한 산란들로 많은 열이 발생한다. 발생된 열은 반도체 레이저 다이오드 어레이의 특성을 저하시키는 주된 요인이 된다.On the other hand, the high power semiconductor laser diode array generates a lot of heat due to non-luminescence recombination and scattering due to defects. The generated heat is a major factor that degrades the characteristics of the semiconductor laser diode array.
그리고, 레이저광을 방출시키는 벽개면(Facet)에서 온도가 상승되면, 벽개면의 에너지 밴드갭을 감소시키고, 이는 벽개면에서 레이저광을 더욱 많이 흡수하게 하여 온도를 더욱 증가시키게 된다.In addition, when the temperature rises at the cleavage surface (Facet) for emitting the laser light, the energy band gap of the cleavage surface is reduced, which increases the temperature by further absorbing the laser light in the cleavage surface.
이로 인해 반도체 레이저 다이오드 어레이는 광출력이 감소되며, 레이저광을 방출시키는 벽개면이 손상됨으로 인해 수명이 감소하게 된다.This reduces the light output of the semiconductor laser diode array, and the lifespan is reduced by damaging the cleavage surface for emitting the laser light.
특히, 650㎚대역의 파장을 갖는 반도체 레이저 다이오드 어레이를 개발하기 위해서는 활성층으로 InGaAsP를 사용하는데, 이 화합물 반도체는 광출력이 높아질수록 벽개면이 쉽게 손상되어 높은 광출력과 긴 수명을 얻기가 힘들다.In particular, InGaAsP is used as an active layer to develop a semiconductor laser diode array having a wavelength in the 650 nm band. As the light output increases, the compound semiconductor is easily damaged by cleavage surfaces, which makes it difficult to obtain high light output and long lifetime.
이를 해결하기 위한 기존의 방법을 보면, 벽개면에 Zn등의 원소를 확산 또는 이온 주입하여, 벽개면의 에너지 갭을 증가시키고, 에너지 캡이 증가된 벽개면은 흡수되는 레이저광이 줄어들어 열의 발생을 감소시켜서 결국, 반도체 레이저 다이오드 어레이의 고 출력을 가능하게 하였다.Conventional methods to solve this problem are to diffuse or ion implant elements such as Zn into the cleaved surface to increase the energy gap of the cleaved surface, and the cleaved surface with the increased energy cap reduces the laser light absorbed, thus reducing the generation of heat. The high power of the semiconductor laser diode array is enabled.
그러나, 이런 Zn등의 원소를 확산시키기 위한 공정은 복잡하고, 정밀하게 조절하기 어려운 문제점들이 있었다.However, such a process for diffusing an element such as Zn has a problem that is complicated and difficult to control precisely.
이에 본 발명은 상기한 바와 같은 문제점을 해결하기 위하여 안출된 것으로, 비발광 재결합(Auger recombination)으로 인한 벽개면 근처에서의 열 발생을 줄이고, 벽개면에 전류를 흐르지 못하도록 하여, 벽개면의 손상을 방지하여 고출력 및 긴수명을 갖는 반도체 레이저 다이오드 어레이를 제조할 수 있는 반도체 레이저 다이오드 어레이 제조 방법을 제공하는 데 그 목적이 있다.Accordingly, the present invention has been made to solve the problems described above, to reduce the generation of heat near the cleavage surface due to auger recombination, to prevent the current flow to the cleavage surface, to prevent damage to the cleavage surface, high output And a semiconductor laser diode array manufacturing method capable of manufacturing a semiconductor laser diode array having a long lifetime.
상기한 본 발명의 목적을 달성하기 위한 바람직한 양태(樣態)는, GaAs기판의 상부에 n-클래드층, n-웨이브 가이드층, 활성층, p-웨이브 가이드층, 에칭방지층, p-클래드층, p-버퍼층과 p-캡층을 순차적으로 적층하는 제 1 단계와;Preferred embodiments for achieving the above object of the present invention, the n- clad layer, n-wave guide layer, active layer, p-wave guide layer, anti-etching layer, p- clad layer, on the GaAs substrate firstly stacking the p-buffer layer and the p-cap layer;
상기 p-캡층을 식각하여, 상기 p-캡층 상면에서 관찰된 상기 p-버퍼층의 각 측면들로부터 이격되고, 상호 분리된 복수의 p-캡층들을 형성하는 제 2 단계와;Etching the p-cap layer to form a plurality of p-cap layers spaced apart from each side of the p-buffer layer as viewed from the top of the p-cap layer;
상기 복수의 p-캡층들의 주변의 p-버퍼층과 p-클래드층을 식각하여, 상기 p-캡층 상면에서 관찰된 p-캡층의 넓이보다 크고, p-클래드층과 p-버퍼층이 적층된 복수의 리지들을 에칭방지층의 상부에 형성하는 제 3 단계와;Etching the p-buffer layer and the p-clad layer around the plurality of p-cap layers, which is larger than the width of the p-cap layer observed on the upper surface of the p-cap layer, and the p-clad layer and the p-buffer layer are stacked Forming a ridge on top of the anti-etching layer;
상기 에칭방지층의 상부면, 상기 복수의 리지들의 측면 및 상면, 상기 p-캡층들의 측면에 절연막을 증착하는 제 4 단계와;Depositing an insulating film on an upper surface of the anti-etching layer, side and top surfaces of the plurality of ridges, and side surfaces of the p-cap layers;
상기 절연막에 의해 노출된 각 p-캡층들의 상부에 p-전극을 증착하고, 상기GaAs 기판의 하부에 n-전극을 증착하는 제 5 단계로 구성된 반도체 레이저 다이오드 어레이 제조 방법이 제공된다.A method of manufacturing a semiconductor laser diode array comprising a fifth step of depositing a p-electrode on top of each p-cap layer exposed by the insulating film and depositing an n-electrode on the bottom of the GaAs substrate is provided.
도 1은 일반적인 반도체 레이저 다이오드 어레이의 사시도이다.1 is a perspective view of a general semiconductor laser diode array.
도 2a 내지 2e는 본 발명에 따른 반도체 레이저 다이오드 어레이의 제조공정도이다.2A to 2E are manufacturing process diagrams of a semiconductor laser diode array according to the present invention.
도 3은 도 2b의 평면도이다.3 is a plan view of FIG. 2B.
도 4는 도 2c의 평면도이다.4 is a plan view of FIG. 2C.
<도면의 주요부분에 대한 부호의 설명><Description of the symbols for the main parts of the drawings>
20 : GaAs기판 21 : n-클래드층20: GaAs substrate 21: n- clad layer
22 : n-웨이브 가이드층 23 : 활성층22: n-wave guide layer 23: active layer
24 : p-웨이브 가이드층 25 : 에칭방지층24: p-wave guide layer 25: etching prevention layer
26 : p-클래드층 27 : p-버퍼층26: p-clad layer 27: p- buffer layer
28 : p-캡층 29 : p-전극28: p-cap layer 29: p-electrode
30 : n-전극30 n-electrode
이하, 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 설명하면 다음과 같다.Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.
도 2a 내지 2e는 본 발명에 따른 반도체 레이저 다이오드 어레이의 제조공정도로서, GaAs기판(20)의 상부에 n-클래드층(21), n-웨이브 가이드층(22), 활성층(23), p-웨이브 가이드층(24), 에칭방지층(25), p-클래드층(26), p-버퍼층(27)과 p-캡층(28)을 순차적으로 적층한다.(도 2a)2A to 2E are manufacturing process diagrams of a semiconductor laser diode array according to the present invention, wherein an n-clad layer 21, an n-wave guide layer 22, an active layer 23, and a p-wave are formed on a GaAs substrate 20. The guide layer 24, the etching prevention layer 25, the p-clad layer 26, the p-buffer layer 27 and the p-cap layer 28 are sequentially stacked (FIG. 2A).
여기서, 상기 활성층(23)은 양자우물(Quantum well)로서, 주입된 전자와 정공이 재결하여 레이저광을 방출한다. 그리고, 상기 클래드층들(21,26)은 양자우물인 활성층(23)을 중심으로 일측에는 p-타입, 타측에는 n-타입 도핑되어 정공과 전자가 양자우물로 주입되도록 하는 역할을 수행하고, 상기 웨이브 가이드층들(22,24)은 활성층과의 굴절율 차에 의해 활성층에서 방출되는 레이저광을 양자우물에 잘 가두는 역할을 수행한다.In this case, the active layer 23 is a quantum well, and the injected electrons and holes recombine to emit laser light. The clad layers 21 and 26 are p-type doped on one side and n-type doped on the other side of the active layer 23 serving as a quantum well to inject holes and electrons into the quantum well. The wave guide layers 22 and 24 confine the laser light emitted from the active layer to the quantum well by the difference in refractive index with the active layer.
다시, 본 발명의 반도체 레이저 다이오드의 어레이를 제조하는 공정으로, 도 2b에 도시된 바와 같이, 상기 p-캡층(28)을 식각하여, 상기 p-캡층(28) 상면에서 관찰된 p-버퍼층(27)의 각 측면들로부터 이격되고, 상호 분리된 복수의 p-캡층(28')들을 형성한다.(도 2b, 도3)Again, in the process of manufacturing the array of the semiconductor laser diode of the present invention, as shown in Figure 2b, by etching the p-cap layer 28, the p- buffer layer (observed on the upper surface of the p-cap layer 28 ( A plurality of p-cap layers 28 'spaced apart from each side of the substrate 27 and separated from each other is formed (FIGS. 2B and 3).
이 때, 도 3에 도시된 바와 같이, 상기 p-캡층(28') 상면에서 관찰할 때, 상기 복수의 p-캡층(28')들은 상기 p-버퍼층(27)의 대향되는 양측면에서 제 1 폭 및 2 폭(Wa,Wb)만큼 각각 이격되고, 또 다른 대향되는 양측면으로부터 제 3 폭 및 4 폭(Wc,Wd)만큼 각각 이격되어 있다.In this case, as shown in FIG. 3, when viewed from the upper surface of the p-cap layer 28 ′, the plurality of p-cap layers 28 ′ may be formed on the first side at opposite sides of the p-buffer layer 27. It is spaced apart by a width and two widths (W a , W b ), respectively, and is spaced apart by another third and fourth widths (W c , W d ) from two opposing opposite sides, respectively.
여기서, Lcav는 공진기 길이로 양자우물에서 발생된 레이저광이 이 사이를 반복하면서, 증폭되어 광출력 벽개면을 통해 방출된다.Here, L cav is a laser beam generated in the quantum well with a resonator length is repeated between them, amplified and emitted through the light output cleavage surface.
그리고, 제 1과 2 폭(Wa,Wb)은 광 출력 및 그 반대 벽개면으로 전류가 흐르는 것을 방지하기 위해 식각되는 부분의 폭이고, 제 1과 2 폭(Wa,Wb)은 각각 10㎛ ~ 50㎛가 바람직하며, 필요에 따라 제 1 폭(Wa)이 제 2 폭(Wb)보다 클 수도 있고, 작을 수도 있다.The first and second widths W a and W b are the widths of portions that are etched to prevent current from flowing to the light output and the opposite cleavage surface, and the first and second widths W a and W b are respectively. 10 micrometers-50 micrometers are preferable, and the 1st width W a may be larger than the 2nd width W b as needed, and may be small.
그 후에, 상기 복수의 p-캡층(28')들의 주변의 p-버퍼층(27)과 p-클래드층(26)을 식각하여, 상면에서 볼때, 상기 p-캡층(28')보다 넓이가 큰 p-클래드층(26')과 p-버퍼층(27')이 적층된 복수의 리지(30)들을 에칭방지층(25)의 상부에 형성한다.(도 2c 및 도 4)Thereafter, the p-buffer layer 27 and the p-clad layer 26 around the plurality of p-cap layers 28 'are etched to have a larger area than the p-cap layer 28' when viewed from the top. A plurality of ridges 30 in which the p-clad layer 26 'and the p-buffer layer 27' are stacked are formed on the etch stop layer 25 (FIGS. 2C and 4).
여기서, 도 4에 도시된 바와 같이, 상면에서 볼 때, p-클래드층(26')과 p-버퍼층(27')의 넓이는 상기 p-캡층(28')보다 넓이가 크다.Here, as shown in FIG. 4, when viewed from the top, the width of the p-clad layer 26 'and the p-buffer layer 27' is larger than that of the p-cap layer 28 '.
이는, 활성층에서 방출되는 레이저광이 리지부근에 도파되는 경우에 레이저광이 리지의 에지(Edge)에 영향을 미치지 못하도록 하여, 리지의 손상을 방지할 수있게 된다.This prevents the laser light from affecting the edge of the ridge when the laser light emitted from the active layer is waved near the ridge, thereby preventing damage to the ridge.
도 4에 도시된 제 5 폭(We), 즉, 상기 p-캡층(28') 상면에서 관찰된 상기 리지(30)의 각 측면으로부터 상기 p-캡층의 각 측면까지 거리는 5㎛ ~ 10㎛가 바람직하다.The fifth width W e shown in FIG. 4, that is, the distance from each side of the ridge 30 observed from the upper surface of the p-cap layer 28 ′ to each side of the p-cap layer is 5 μm to 10 μm. Is preferred.
그 다음, 상기 에칭방지층(25)의 상부면, 상기 복수의 리지(30)들의 측면 및 상면, 상기 p-캡층(28')들의 측면에 SiO2또는 SiN과 같은 절연막(29)을 50㎚ ~ 200㎚의 두께로 플라즈마 화학 기상 증착(PECVD)을 이용하여 증착한다.(도 2d)Next, an insulating film 29 such as SiO 2 or SiN is formed on the top surface of the anti-etching layer 25, the side and top surfaces of the plurality of ridges 30, and the side surfaces of the p-cap layers 28 ′. Deposited using plasma chemical vapor deposition (PECVD) at a thickness of 200 nm (FIG. 2D).
물론, 상기 절연막(29)은 p-캡층(28')들의 상부면을 제외하고, 증착시킬 수 있다.Of course, the insulating layer 29 may be deposited except for the upper surfaces of the p-cap layers 28 ′.
마지막으로, 상기 절연막(29)에 의해 노출된 각 p-캡층(28')들의 상부에 p-전극(30)을 증착하고, 상기 GaAs 기판(20)의 하부에 n-전극(31)을 증착한다.(도 2e)Finally, the p-electrode 30 is deposited on each of the p-cap layers 28 ′ exposed by the insulating layer 29, and the n-electrode 31 is deposited on the lower portion of the GaAs substrate 20. (FIG. 2E)
따라서, 본 발명의 반도체 레이저 다이오드 어레이는 벽개면에 전류를 흐르지 않게 된다.Therefore, the semiconductor laser diode array of the present invention does not flow current on the cleaved surface.
이상에서 상세히 설명한 바와 같이 본 발명은 비발광 재결합(Auger recombination)으로 인한 벽개면 근처에서 열 발생을 줄이고, 벽개면에 전류를 흐르지 못하도록 하여, 벽개면의 손상을 방지하여 고출력 및 긴수명을 갖는 반도체레이저 다이오드 어레이를 제조할 수 있는 효과가 있다.As described in detail above, the present invention reduces the generation of heat near the cleaved surface due to auger recombination and prevents current from flowing through the cleaved surface, thereby preventing damage to the cleaved surface, thereby having a high output and a long lifetime. There is an effect that can be prepared.
본 발명은 구체적인 예에 대해서만 상세히 설명되었지만 본 발명의 기술사상 범위 내에서 다양한 변형 및 수정이 가능함은 당업자에게 있어서 명백한 것이며, 이러한 변형 및 수정이 첨부된 특허청구범위에 속함은 당연한 것이다.Although the invention has been described in detail only with respect to specific examples, it will be apparent to those skilled in the art that various modifications and variations are possible within the spirit of the invention, and such modifications and variations belong to the appended claims.
Claims (5)
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100752715B1 (en) | 2005-03-10 | 2007-08-29 | 삼성전기주식회사 | Method of manufacturing ridge type laser diode |
| KR101136230B1 (en) * | 2006-01-20 | 2012-04-17 | 엘지전자 주식회사 | Semiconductor laser diode and Fabricating method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0697596A (en) * | 1992-07-30 | 1994-04-08 | Sharp Corp | Semiconductor laser element |
| JPH11340558A (en) * | 1998-05-21 | 1999-12-10 | Nec Corp | Ridge waveguide semiconductor laser and its manufacture |
| JP2001144380A (en) * | 1999-11-17 | 2001-05-25 | Mitsubishi Electric Corp | Semiconductor laser element, semiconductor laser divce, and semiconductor laser module |
-
2002
- 2002-03-09 KR KR1020020012639A patent/KR20030073206A/en not_active Application Discontinuation
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0697596A (en) * | 1992-07-30 | 1994-04-08 | Sharp Corp | Semiconductor laser element |
| JPH11340558A (en) * | 1998-05-21 | 1999-12-10 | Nec Corp | Ridge waveguide semiconductor laser and its manufacture |
| JP2001144380A (en) * | 1999-11-17 | 2001-05-25 | Mitsubishi Electric Corp | Semiconductor laser element, semiconductor laser divce, and semiconductor laser module |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100752715B1 (en) | 2005-03-10 | 2007-08-29 | 삼성전기주식회사 | Method of manufacturing ridge type laser diode |
| KR101136230B1 (en) * | 2006-01-20 | 2012-04-17 | 엘지전자 주식회사 | Semiconductor laser diode and Fabricating method thereof |
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