KR20030066422A - Driver Circuit and Power Supply for Plasma Display Penel(PDP) - Google Patents

Abstract

PURPOSE: A driving circuit and a power supply unit for plasma display panel are provided to drive a sustain voltage for the plasma display panel and reduce a manufacturing costs of the plasma display panel by using a full bridge type inverter circuit having a simple structure. CONSTITUTION: A plasma display panel includes a panel capacitance(221). A driving circuit for plasma display panel includes the first and the second freewheeling diodes(215,216), the third and the fourth freewheeling diodes(217,218), the first and the second inductors(219,220), the first and the fourth power switches(203,212), and the second and the third power switches(206,209). The first and the second freewheeling diodes are connected between an X electrode, a Y electrode, and a sustain voltage source. The third and the fourth freewheeling diodes are connected between the X electrode, the Y electrode, and a ground portion. The first and the second inductors are connected to the X electrode and the Y electrode, respectively. The first and the fourth power switches are used for applying the first voltage between the first and the second inductors. The second and the third power switches are used for applying the second voltage between the first and the second inductors.

Description

Driver Circuit and Power Supply for Plasma Display Panel {PDP}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to improvements in plasma display panels (PDPs) and address drive circuits and sustain drive circuits in plasma display panels.

In general, a plasma display panel has a structure including a pair of substrates. Row and column electrodes are supported and formed on the substrate, respectively, and the row and column electrodes are each applied by a dielectric layer. The row and column electrodes are also arranged parallel to each other with a gap between them, and ionizing gas is injected into the gap between both electrodes.

The row and column electrodes are disposed perpendicular to each other, and discharge cells are formed at the intersections of the row and column electrodes. By selectively discharging such discharge cells, a recording or display function can be realized.

The driving of the plasma display panel is accomplished by the application of an AC voltage. Traditionally, driving by the application of an AC voltage goes through two stages: discharge and sustain. In other words, a voltage exceeding the discharge voltage is applied to the desired discharge cells selected by the addressing of the rows and columns to discharge them. In the present specification, this is referred to as a discharge section. Subsequently, an AC sustain voltage is continuously applied to the discharge cells. In this specification, this is called a sustain period. The AC sustain voltage is short enough to cause a discharge, but is large enough to maintain a discharge state.

In the discharge section, a discharge voltage for generating an initial discharge is applied. As a discharge voltage, in the case of the mixed gas of He-Xe and Ne-Xe which are used normally, the potential of 240V-280V is used. In general, a third electrode may be introduced. By introducing the third electrode, it is possible to adopt a driving method that reduces the high current caused by the sustain electrode in the surface discharge form and the parasitic capacitor caused by the dielectric, and separates the address operation from the sustain operation.

In the sustain section, the discharge is maintained by an AC sustain pulse having a voltage lower than the discharge voltage using the memory function characteristic of the gas discharge. Generally, the effect of memory function by wall charge is used.

In order to display the gray scale using the plasma display panel, brightness of each pixel of the screen is determined according to the number of sustain discharges. Therefore, a high frequency sustain pulse is needed. For example, when the PDP has 60 frames per second on 256 gray scales, a total of 61140 sustain pulses are applied when the light of one unit level is represented by four sustain pulses. Hereinafter, a circuit for generating and applying a sustain pulse will be referred to as a sustain driver.

Typically, the sustain driver drives all pixels constituting the plasma panel at one time. Therefore, it is common for the capacitance of the plasma panel seen from the sustain driver to have a very large value. For example, a 512 x 512 panel can be represented equivalently with a capacitance having a value of approximately 5 nF.

In order to drive such a high capacitance panel, a lot of power is inevitably consumed. In particular, more power is consumed to apply a sustain pulse for gray scale representation of the plasma display panel. As a measure to reduce such power consumption, an energy recovery type driving circuit may be used as the sustain driver.

As a circuit which is most widely used as an energy recovery type driving circuit for a sustain driver, there is a circuit called a weber circuit. Such weber circuits are well described in US Pat. No. 5,081,400, the same person registered as an inventor. 1 is a circuit diagram illustrating a typical weber circuit.

As shown in FIG. 1, panel 112 is equivalently represented by capacitance Cp. The weber circuit is provided at both sustain electrodes of the panel 112, that is, the X and Y electrodes. The X electrode side configuration includes a first power switch M1 102 connected between the X electrode of the panel and the sustain voltage power supply Vs, and a third power switch M3 104 connected between the X electrode of the panel and the ground. do. It also includes an inductor L1 (111) connected to the X electrode of the panel, and an auxiliary circuit connected between the other end of the inductor L1 (111) and ground. The auxiliary circuit comprises a first auxiliary switch Ma1, a first diode Da1, a second diode Da2, and a second auxiliary switch Ma2 connected in series. The other end of the inductor L1 111 is connected between the first diode Da1 and the second diode Da2. In addition, the other ends of the series connection ends of the first auxiliary switch Ma1 and the second auxiliary switch Ma2 are connected to each other and connected to the auxiliary capacitor C1, and the other end of the auxiliary capacitor C1 is grounded.

The Y end of the panel 112 is provided with the same circuit as the X end.

The operation of the weber circuit will be described below. FIG. 2 is a waveform diagram illustrating the operation of the circuit shown in FIG. 1.

Ideally, the capacitances of the capacitors C1, C2 are very large compared to the equivalent capacitor Cp of the panel, so that the voltage fluctuation rate of C1, C2 at the input and withdrawal is small. Therefore, C1 and C2 always maintain a constant voltage at Vs / 2 if the input and recovery are made at the same ratio.

First Mode (Mode 1):

The fourth power switch M4 105 is turned on, and turns on the X electrode side first auxiliary switch Ma1 106. The voltage Vs / 2 of the capacitor C1 110 is applied to the resonant circuit composed of L1 and Cp. After half period resonance, the panel voltage Vcp reaches the holding voltage Vs. However, in the actual circuit, energy consumption occurs in the parasitic resistance component of the circuit, so the panel voltage Vcp reaches a voltage slightly smaller than the sustain voltage Vs.

Second Mode (Mode 2):

The fourth power switch M4 105 is turned on, turns off the first auxiliary switch Ma1 106 on the X electrode side, and turns on the first power switch M1 102. The voltage Vcp across the panel 112 rises to the sustain power supply voltage Vs. That is, in a state where the voltage Vcp across the panel 112 has a voltage slightly smaller than the sustain power supply voltage Vs, an overcurrent flows from the input terminal to the panel equivalent capacitor Cp at the moment of turning on the first power switch M1 and the panel voltage Vcp momentarily Vs is reached. When the panel voltage Vcp reaches the sustain power supply voltage Vs, the panel starts discharging. This discharge current flows through the switches M1 and M2.

Mode 3

The fourth power switch M4 105 is turned on, turns off the first power switch M1 102 and turns on the X electrode side second auxiliary switch Ma2 109. The voltage Vcp of the panel capacitor Cp is applied to the resonant circuit composed of the panel capacitor Cp, the inductor L1 111 and the capacitor C1 110. After half period resonance, the panel capacitor voltage is reduced from Vs to zero.

Mode 4

The fourth power switch M4 105 is turned on, and when the third power switch M3 104 is turned on, the panel capacitor voltage Vcp maintains a zero voltage in a clamped state to zero.

The fifth mode (Mode 5) to the eighth mode (Mode 8) has a symmetrical operation with the first mode (Mode 1) to the fourth mode (Mode 4) as described above.

The weber circuit as described above requires an auxiliary circuit for energy recovery composed of first and second auxiliary switches, and the like, and by using independent switching elements and diodes, respectively, when constructing a plurality of driving circuits, There was a problem that the driving circuit became complicated and bulky.

In addition, a large amount of power is consumed to drive the plasma display panel, and various types of power converters have been developed to obtain a desired output voltage from an input voltage. Recently, among these power converters, a power converter using a switching method is frequently used.

In developing a power converter based on such a switching method, the key elements are miniaturization and high efficiency. As a method for miniaturizing a power converter by a switching method, there is a method of increasing the switching frequency. By increasing the switching frequency, the size of the filter and transformer can be reduced, which in turn can reduce the volume of the power converter. However, as the switching frequency is increased, more switching losses occur and a bulkier heat dissipation mechanism is required.

As a power converter operating at a high switching frequency but relatively low in switching loss, there is a power converter by a soft switching method. Also in such a soft switching system, an active clamp circuit is used most widely. An example of an active clamp soft switching power converter is Korean Patent No. 10-19837, entitled "Switching Power Supply."

The active clamp system includes a main switch and an auxiliary switch, and is configured to use the auxiliary switch to reflux the leakage and magnetizing inductance current of the transformer during the extinguishing period of the main switch. In the active-string clamp method, since the main switch performs zero voltage switching, switching losses are reduced and the efficiency is high. However, about twice the voltage of the input voltage is applied as voltage stress to the main switch and the auxiliary switch. Therefore, a high breakdown voltage main switch and an auxiliary switch should be used. High voltage breakdown switches have a small current capacity and are expensive.

It is an object of the present invention to provide a sustain driver circuit capable of energy recovery operation without an external auxiliary circuit, unlike a weber circuit.

Another object of the present invention is to provide a circuit for a sustain driver that enables all power switches included in the driver circuit to substantially switch to zero voltage.

Still another object of the present invention is to provide a sustain driver circuit in which an overcurrent problem in an input power supply is solved.

It is yet another object of the present invention to provide a switching power converter circuit having high efficiency, high power density and low voltage stress.

1 is a conventional weber-type holding section driving circuit diagram.

2 is a waveform diagram for explaining the operation of the conventional weber-type holding section driving circuit.

3 is a current-type sustaining section driving circuit diagram of a full-bridge inverter driving method according to the present invention.

Figure 4 is a waveform diagram for explaining the operation of the current type sustain period driving circuit of the full-bridge inverter drive system according to the present invention.

5 is a current-type sustaining section driving circuit diagram of a half-bridge inverter driving method according to the present invention.

Figure 6 is a waveform diagram for explaining the operation of the current-type holding section driving circuit of the half-bridge type inverter driving method according to the present invention.

Figure 7 is a sustain section driving circuit diagram of the half-bridge type energy recovery method according to the present invention.

8 is a waveform diagram for explaining the operation of the sustain section driving circuit of the half-bridge type energy recovery system according to the present invention;

9 is a circuit diagram in which a bi-directional switch is applied to an auxiliary switch of a half-bridge type energy recovery method holding section driving circuit according to the present invention;

10 is an embodiment of the bi-directional auxiliary switch of the sustain section driving circuit of the half-bridge type energy recovery method according to the present invention.

11 is a sustain period driving circuit diagram of a half-bridge type energy injection method according to the present invention.

12 is a waveform diagram for explaining the operation of the holding section driving circuit of the half-bridge type energy injection method according to the present invention;

FIG. 13 is a waveform diagram illustrating a link voltage operation of a sustain period driving circuit of a half bridge type energy injection method according to the present invention; FIG.

Fig. 14 is a circuit diagram in which a voltage adjusting circuit is added to a half bridge type sustain period driving circuit according to the present invention.

Fig. 15 is a waveform diagram for explaining the operation of the voltage adjusting circuit applied to the half-bridge type sustain period driving circuit according to the present invention.

Figure 16 is an embodiment of the voltage across the waveform using the conventional drive circuit and the power supply.

17 is an embodiment of a global voltage waveform using a half-bridge type sustain period driving circuit according to the present invention.

18 is an embodiment of a controller for explaining a control method of a voltage regulating circuit applied to a half-bridge type sustain period driving circuit according to the present invention.

Fig. 19 is a circuit diagram of a voltage regulating circuit added to a current type sustain period driving circuit of a half bridge inverter driving method according to the present invention;

20 is a circuit diagram in which a voltage adjusting circuit is added to a holding section driving circuit of a half-bridge type energy recovery system according to the present invention.

Fig. 21 is a circuit diagram of a voltage adjustment circuit added to a circuit to which an auxiliary switch of a half-bridge type energy recovery method holding section driving circuit according to the present invention is applied as a bidirectional switch.

Fig. 22 is a circuit diagram of adding a voltage regulating circuit to a half-bridge type energy injection method holding section driving circuit according to the present invention.

23 is an explanatory diagram of a circuit diagram and a controller of an active series compensation power supply device according to the present invention;

24 is a main waveform for explaining a circuit of an active series compensation power supply device according to the present invention;

25 is a circuit diagram of an active clamp forward converter with two secondary windings in accordance with the present invention.

Fig. 26 is a waveform diagram for explaining the operation of a circuit of an active clamp forward converter having two secondary windings according to the present invention;

27 is a circuit diagram showing a current source PDP driving circuit according to an embodiment of the present invention.

28 is a waveform diagram illustrating the operation of a current source PDP driving circuit according to an embodiment of the present invention;

29 is a circuit diagram showing a resonance type PDP driving circuit according to an embodiment of the present invention.

30 is a waveform diagram illustrating an operation of a resonance type PDP driving circuit according to an embodiment of the present invention.

FIG. 31 is a circuit diagram illustrating an operation of each mode of a resonance type PDP driving circuit according to an embodiment of the present invention. FIG.

32 is a circuit diagram for explaining operation of each mode of a resonant PDP driving circuit according to an embodiment of the present invention.

33 is a circuit diagram illustrating operation of each mode of the resonant PDP driving circuit according to the exemplary embodiment of the present invention.

34 is a circuit diagram for explaining operation of each mode of the resonant PDP driving circuit according to the exemplary embodiment of the present invention.

35 is a circuit diagram for explaining operation of each mode of the resonant PDP driving circuit according to the exemplary embodiment of the present invention.

36 is a circuit diagram for explaining operation of each mode of the resonance type PDP driving circuit according to the embodiment of the present invention.

37 is a circuit diagram for explaining operation of each mode of the resonant PDP driving circuit according to one embodiment of the present invention;

FIG. 38 is a circuit diagram for explaining operation of each mode of the resonant PDP driving circuit according to one embodiment of the present invention; FIG.

39 is a circuit diagram showing a current source PDP driving circuit according to another embodiment of the present invention.

40 is a waveform diagram illustrating the operation of a current source PDP driving circuit according to another embodiment of the present invention;

<Description of the symbols for the main parts of the drawings>

201: input terminal

202: ground terminal

203: first power switch

204: first power switch parallel diode

205: first power switch parallel capacitor

206: second power switch

207: second power switch parallel diode

208: second power switch parallel capacitor

209: third power switch

210: third power switch parallel diode

211: third power switch parallel capacitor

212: fourth power switch

213: fourth power switch parallel diode

214: fourth power switch parallel capacitor

215: first flyback diode

216: second flyback diode

217: third reflux diode

218: fourth freewheeling diode

219: first inductor

220: second inductor

221: PDP panel capacitance

In order to achieve the above object, a panel driving circuit according to an embodiment of the present invention, in the panel driving circuit connected between the X electrode and the Y electrode and driven from the X electrode and the Y electrode, the panel includes a panel capacitance, The panel driving circuit includes a first and a second reflux diode connected between the X electrode and the Y electrode of the panel and a sustain voltage power supply, respectively, and a third and fourth reflux diode connected between the X electrode and the Y electrode of the panel and the ground, respectively. Connected to the X electrode and the Y electrode, respectively, to the first and second inductors for charging and discharging the panel capacitance, respectively, and to the other ends of the first and second inductors, respectively, to be constant between the other ends of the first and second inductors for a period of time. First and fourth power switches for applying a voltage and connected to the other ends of the first and second inductors, respectively, to apply a constant voltage between the other ends of the first and second inductors for a period of time. And second and third power switches.

In a panel driving circuit according to another embodiment of the present invention, a panel driving circuit connected between an X electrode and a Y electrode and driven from an X electrode and a Y electrode, wherein the panel includes panel capacitance, and the panel driving circuit includes an X of the panel. A first reflux diode connected between one electrode of the electrode and the Y electrode and a sustain voltage power supply, a second reflux diode connected between one electrode of the panel and ground, an inductor connected to one electrode of the panel to charge and discharge the panel capacitance; A first power switch connected to the other end of the inductor for applying a constant voltage to the other end of the inductor, a second power switch connected to the other end of the inductor for applying a constant voltage to the other end of the inductor, the other electrode of the panel, and a sustain voltage power supply And a second capacitor connected between the other electrode of the panel and the ground.

In a panel driving circuit according to another embodiment of the present invention, a panel driving circuit connected between an X electrode and a Y electrode and driven from an X electrode and a Y electrode, wherein the panel includes panel capacitance, and the panel driving circuit includes an X of the panel. A first power switch connected between one of the electrodes and the Y electrode and the sustain voltage power supply, a second power switch connected between the one electrode of the panel and the ground, a first capacitor connected between the other electrode and the sustain voltage power supply of the panel, and A second capacitor connected between the other electrode and the ground, an inductor connected to the other electrode of the panel, and an auxiliary circuit connected between the other end of the inductor and one electrode of the panel to recover or inject charge charged in the panel capacitance. .

In a panel driving circuit according to another embodiment of the present invention, a panel driving circuit connected between an X electrode and a Y electrode and driven from an X electrode and a Y electrode, wherein the panel includes a panel capacitance, and the X electrode and the Y electrode of the panel. A first power switch connected between one electrode of the electrodes and the sustain voltage power supply to maintain a constant voltage between both electrodes of the panel at a first voltage, and one electrode of the panel and a ground connected between the one electrode of the panel and the second voltage. A second power switch for maintaining a constant voltage, a first capacitor connected between the other electrode of the panel and the sustain voltage power supply, a second capacitor connected between the other electrode of the panel and the ground, and one electrode of the panel to provide a panel capacitance. An inductor for charging and discharging, and connected between the other electrode of the inductor and the sustain voltage power supply, so that energy stored in the panel capacitance In this way, the voltage between the two electrodes of the panel capacitance is connected between the first auxiliary switch, the other end of the inductor, and the ground to induce the first voltage to inject energy into the panel capacitance, whereby the voltage between both electrodes of the panel capacitance is reduced. And a second auxiliary switch for causing a two voltage.

In a panel driving circuit according to another embodiment of the present invention, a panel driving circuit connected between an X electrode and a Y electrode and driven from an X electrode and a Y electrode, the panel includes a panel capacitance, and the driving circuit includes an X electrode of the panel. And first and second power switches connected between one of the Y electrodes, the sustain voltage power supply, and ground, respectively, and the first and second capacitors connected between the other electrode of the panel, the sustain voltage power supply, and the ground, and the other electrode of the panel, respectively. A voltage regulator connected to allow the first and second capacitors to flow a substantially equal amount of compensation current to the charge and discharge currents flowing through the first and second capacitors so that the voltages of the first and second capacitors are kept constant at all times. It includes.

A power supply apparatus according to an embodiment of the present invention, comprising: a first input and output capacitor connected in parallel to each other, and for supplying power to a load connected in parallel to an output capacitor, a first voltage for applying an output voltage across the input capacitor And a series compensator connected in series between the power supply, the input capacitor and the output capacitor to apply a desired constant voltage to the load by applying a series compensation voltage to the load.

In the power supply apparatus according to another embodiment of the present invention, in the power converter for converting the power of the DC input voltage applied between the first and second input terminals and outputs through the first and second output terminals, the first and second An input terminal charging unit connected between the second input terminals, a second capacitor and a first switch connected to each other in series with the first input terminal, a second switch connected between the other end of the first switch and ground, a first input terminal, and a first switch And a transformer having a secondary side first winding and a second winding insulated from the primary winding and the primary winding connected between the connection points of the second switch and connected in series with each other, the connection point of the secondary side first winding and the second winding. And an inductor connected between the first output terminals, and first and second rectifiers connected between the second side and the second output terminal of the secondary side first and second windings, respectively.

In a panel driving circuit according to an embodiment of the present invention, in a panel driving circuit connected between an X electrode and a Y electrode and driven from an X electrode and a Y electrode, the panel includes a panel capacitance, and the driving circuit includes an X electrode and First and second power switches respectively connected to the Y electrode for applying a first voltage between the X electrode and the Y electrode of the panel for a predetermined period, the X electrode of the panel for the predetermined period of time, respectively; First and second inductors, first and second, respectively connected to the third and fourth power switches for applying a second voltage between the Y electrodes, the X electrodes and the Y electrodes of the panel to charge and discharge the panel capacitance. Fifth and sixth power switches connected to the other end of the inductor to apply a constant voltage to the other ends of the first and second inductors so that the voltage between the X electrode and the Y electrode of the panel becomes the first voltage, and the first Is connected to the other end of the second inductor, the voltage between the X electrode and the Y electrode of the panel comprises seventh and eighth power switches for applying a respective constant voltage to the first and other end of the second inductor to the second voltage.

In the panel driving circuit according to an embodiment of the present invention, in the panel driving circuit connected between the X electrode and the Y electrode and driven from the X electrode and the Y electrode, the panel includes the panel capacitance, and the X electrode and the Y electrode of the panel. First and fourth power switches respectively connected between the electrode and the sustain voltage power supply, the X electrodes of the panel and the third and second power switches connected between the Y electrode and the ground, respectively; A fifth power switch, a first inductor, and a first capacitor, and a sixth power switch, a second inductor, and a second capacitor connected in series between the Y electrode and the sustain voltage power supply.

In the panel driving circuit according to an embodiment of the present invention, in the panel driving circuit connected between the X electrode and the Y electrode and driven from the X electrode and the Y electrode, the panel includes the panel capacitance, and the X electrode and the Y electrode of the panel. First and second power switches for applying a first voltage for a period of time between the electrodes, third and fourth power switches for applying a second voltage for a period of time between the X electrode and the Y electrode of the panel, the X electrode of the panel And first and second inductors respectively connected to the Y electrode and connected between the other end of the first inductor, a sustain voltage power supply, and ground, respectively, for recovering or injecting energy stored in the panel capacitance, and And fourth and second capacitors connected between the other end of the second inductor and the sustain voltage power supply and ground, respectively.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1. Full bridge type drive circuit

(1) Driving circuit using full bridge inverter circuit

FIG. 3 is a circuit diagram illustrating a sustain section driving circuit using a full bridge inverter circuit of the sustain driver circuit according to the present invention. The circuit shown in Fig. 3 uses a full bridge inverter circuit to control the drive circuit.

The panel 221 includes a panel capacitance Cp and is connected between the X electrode and the Y electrode to be driven from the X electrode and the Y electrode. Hereinafter, the voltage Vcp across the panel means a voltage between the X electrode and the Y electrode of the panel 221. The driving circuit according to the present invention is provided at both sustaining electrode ends of the panel 221, that is, the X electrode end and the Y electrode end. The X electrode terminal and the Y electrode terminal are provided with a driving circuit having substantially the same structure.

The driving circuit according to an embodiment of the present invention includes the first and second reflux diodes Df1 215 and Df2 216 connected between the X electrode and the Y electrode of the panel and the sustain voltage power supply Vs, respectively. First and fourth reflux diodes Df3 217 and Df4 218, respectively connected between the X electrode and the Y electrode and the ground, respectively; and a first electrode connected to the X electrode and the Y electrode of the panel to charge and discharge the panel capacitance, respectively. And second inductors L1 219, L2 220, and other ends of the first and second inductors L1 219 and L2 220, respectively, for a period of time. ), First and fourth power switches M1 203, M4 212, and the first and second inductors L1 219 for applying a first sustain voltage Vs between the other ends of the L2 220. Second and second terminals connected to the other ends of the L2 220, respectively, for applying a second sustain voltage (-Vs) between the other ends of the first and second inductors L1 219 and L2 220 for a period of time. Third power switch M2 ( 206, M3 209.

In the driving circuit according to an embodiment of the present invention, the first to fourth power switches may be equivalently represented by diodes and capacitors connected in parallel to the switches, respectively.

As shown in FIG. 3, the driving circuit using the full-bridge inverter circuit according to the present invention configured as described above includes the first power switch M1 203 and the third power switch M3 209 between the sustain voltage power supply Vs and ground. ) And the second power switch M2 206 and the fourth power switch M4 212 are connected in series to each other, thereby taking the structure of a so-called full bridge inverter circuit.

FIG. 4 is a waveform diagram illustrating the operation of the circuit shown in FIG. 3. Hereinafter, an operation of the sustain driver circuit according to the present invention will be described with reference to FIGS. 3 and 4.

First Mode (Mode 1):

The first mode is a period in which the voltage Vcp across the panel 221 is inverted from -Vs to + Vs.

The voltage across the panel, Vcp, has an initial value of -Vs. The first power switch M1 203 and the fourth power switch M4 212 are turned on substantially simultaneously. The parallel diode D1 204 of the first power switch M1 203 and the parallel diode D4 213 of the fourth power switch M4 212 are conducted.

At this time, the paths of the currents IL1 and IL2 flowing through the inductors L1 and L2 are as follows.

Path of current IL1 flowing through inductor L1 219:

L1-> D1-> Vs-> GND-> Df3-> L1

Path of current IL2 flowing through inductor L2 220:

L2-> Df2-> Vs-> GND-> D4-> L1

As described above, when the inductor currents IL1 and IL2 are inverted in the state where the parallel diodes D1 and D4 are conducted, the switches M1 and M4 are conducted under the zero voltage situation.

Accordingly, the inductors L1 219 and L2 220 resonate with the panel capacitor Cp. The inductor currents IL1, IL2 increase by resonance with the panel capacitor Cp and the panel voltage Vcp increases up to + Vs by LC resonance operation.

Second Mode (Mode 2):

In the second mode, the voltage Vcp across the panel is maintained at + Vs, which is the first sustain voltage.

The first power switch M1 203 and the fourth power switch M4 212 remain turned on. In the second mode, the voltage Vcp across the panel is maintained at + Vs until the first power switch M1 203 and the fourth power switch M4 212 are turned off.

At this time, the currents IL1 and IL2 flowing through the inductors L1 219 and L2 220 are refluxed, and the path thereof is as follows.

Path of current IL1 flowing through inductor L1 219:

M1-> L1-> Df1

Path of current IL2 flowing through inductor L2 220:

M4-> Df4-> L2

When the voltage across the panel Vcp becomes + Vs, the current flowing through the inductors L1 219 and L2 220 is refluxed through the first and fourth flyback diodes Df1 215 and Df4 218, respectively.

As the voltage across the panel Vcp becomes + Vs, the discharge current flows in the panel. This discharge current is supplied with energy from the sustain voltage power supply Vs. The current flowing through the inductors L1 219 and L2 220 is also supplied with energy from the sustain voltage power supply Vs.

Mode 3

The third mode is a period in which all of the first to fourth power switches M1 203 to M4 212 are turned off.

When the first power switch M1 203 and the fourth power switch M4 212 are turned off, the current flowing through the first and fourth power switches M1 203 and M4 212 decreases to zero. Accordingly, the voltages across the first and fourth power switches M1 203 and M4 212 increase to Vs.

Mode 4

The fourth mode is a period in which the voltage Vcp across the panel is inverted from + Vs to -Vs.

The voltage across the panel, Vcp, has an initial value of + Vs. Third power switch M3 209 and second power switch M2 206 are turned on substantially simultaneously.

Parallel diode D3 210 of third power switch M3 209 and parallel diode D2 207 of second power switch M2 206 are conductive. At this time, the paths of the currents IL1 and IL2 flowing through the inductors L1 219 and L2 220 are as follows.

Path of current IL1 flowing through inductor L1 219:

L1-> Df1-> Vs-> GND-> D3-> L1

Path of current IL2 flowing through inductor L2 220:

L2-> D2-> Vs-> GND-> Df4-> L1

As described above, when the inductor currents IL1 and IL2 are inverted under the condition that the parallel diodes D2 207 and D3 210 are conducted, the second and third power switches M2 206 and M3 209 are conducted under the zero voltage condition. Done.

Accordingly, the inductors L1 219 and L2 220 resonate with the panel capacitor Cp. The inductor currents IL1 and IL2 are reduced by resonance with the panel capacitor Cp and the panel voltage Vcp is reduced to -Vs by LC resonance operation.

Mode 5

The fifth mode is a period in which the voltage Vcp across the panel is maintained at −Vs, which is the second sustain voltage.

The third power switch M3 209 and the second power switch M2 206 remain turned on. In the second mode, the voltage across the panel Vcp is maintained at -Vs until the third power switch M3 209 and the second power switch M2 206 are turned off.

At this time, the currents IL1 and IL2 flowing through the inductors L1 219 and L2 220 are refluxed, and the path thereof is as follows.

Path of current IL1 flowing through inductor L1 219:

M2-> L2-> Df2

Path of current IL2 flowing through inductor L2 220:

M3-> Df3-> L1

When the voltage across the panel Vcp becomes -Vs, the current flowing through the inductors L1 and L2 is refluxed through the second and third flyback diodes Df2 216 and Df3 217, respectively.

As the voltage across the panel Vcp becomes -Vs, the discharge current flows in the panel. This discharge current is supplied with energy from the sustain voltage power supply Vs. The current flowing through the inductors L1 219 and L2 220 is also supplied with energy from the sustain voltage power supply Vs.

Mode 6

The sixth mode is a period in which all of the first to fourth power switches M1 203 to M4 212 are turned off.

When the third power switch M3 209 and the second power switch M2 206 are turned off, the current flowing through the second and third power switches M2 206 and M3 209 decreases to zero. Accordingly, the voltages across the second and third power switches M2 206 and M3 209 increase to Vs.

2. Half-Bridge Type Drive Circuit

(1) Driving circuit using half bridge type inverter circuit

FIG. 5 is a circuit diagram showing a driving circuit using a half bridge inverter circuit of the sustain driver circuit according to the present invention. The circuit shown in Fig. 5 uses a half bridge inverter circuit to control the drive circuit.

The present invention converts the driving circuit using the full bridge type inverter circuit as described above into a half bridge type.

The driving circuit using the half-bridge type inverter circuit according to the present invention is one of the X electrode or Y electrode of the panel 314 is the same as the driving circuit using the full bridge type inverter circuit according to the present invention as shown in FIG. Take the configuration. The other electrode of the X electrode or the Y electrode includes a first capacitor Cs1 312 and a second capacitor Cs2 313 connected between the electrode, the sustain voltage power supply Vs, and the ground, respectively. In the following description, the case where the Y electrode side configuration is the same as the Y electrode side configuration of the drive circuit using the full bridge inverter circuit as described above will be described with reference to FIG.

5 shows an embodiment of a driving circuit using a half-bridge inverter circuit according to the present invention, wherein a first capacitor is connected between an X electrode, a sustain voltage power supply (Vs), and the ground on the X electrode side, respectively. Cs1 312 and second capacitor Cs2 313.

The Y electrode side also includes a first flyback diode Df1 309 connected between the Y electrode of the panel and the sustain voltage power supply Vs, and a second flyback diode Df2 310 connected between the Y electrode of the panel and ground. In addition, an inductor L1 311 for charging and discharging the panel capacitance is connected to the Y electrode of the panel, and a first input voltage Vh and the other end of the inductor L1 311 are connected to the other end of the inductor L1 311. The first power switch M1 303 and the second power switch M2 306 for applying the second input voltage GND are connected, respectively.

In the panel driving circuit according to the exemplary embodiment of the present invention, the other ends of the first and second power switches M1 303 and M2 306 are connected to the sustain voltage power source Vh and the ground, respectively. Further, the first power switch M1 303 and the second power switch M2 306 are equivalently represented by diodes D1 and D2 and capacitors C1 and C2 connected in parallel to the switches M1 and M2, respectively. Can be.

As shown in FIG. 5, the driving circuit using the half-bridge inverter circuit according to the present invention includes a first power switch M1 303 and a second power switch M2 306 between a sustain voltage power source Vh and a ground; The first capacitor Cs1 312 and the second capacitor Cs2 313 are connected in series, respectively, to take the structure of a so-called half bridge inverter circuit.

FIG. 6 is a waveform diagram illustrating the operation of the circuit shown in FIG. 5. Hereinafter, the operation of the sustain driver circuit according to the present invention will be described with reference to FIGS. 5 and 6.

First mode (Mode1):

The first mode is a period in which the voltage Vcp across the panel is inverted from -Vs to + Vs.

The voltage across the panel Vcp has an initial value of -Vs. The second power switch M2 306 is turned on. Parallel diode D2 307 of second power switch M2 306 is conductive. At this time, the path of the current IL1 flowing through the inductor L1 311 is as follows.

L1-> Df1-> Vh-> GND-> D2-> L1

As described above, when the inductor current IL1 is inverted in the state where the parallel diode D2 is conducted, the second power switch M2 306 becomes conductive under the zero voltage situation.

Accordingly, the inductor L1 311 resonates with the panel capacitor Cp. Inductor current IL1 is increased by resonance with panel capacitor Cp and panel voltage Vcp is increased to + Vs by LC resonance operation.

Second Mode (Mode 2):

In the second mode, the voltage Vcp across the panel is maintained at + Vs.

The second power switch M2 306 remains turned on. In the second mode, the voltage across the panel is maintained at + Vs until the second power switch M2 306 is turned off.

At this time, the current IL1 flowing through the inductor L1 311 is refluxed, and the path thereof is as follows.

M2-> L1-> Df2

When the voltage across the panel Vcp becomes + Vs, the current flowing in the inductor L1 311 is refluxed through the second freewheeling diode Df2 310.

As the voltage across the panel Vcp becomes + Vs, the discharge current flows in the panel. This discharge current is supplied with energy from the sustain voltage power supply Vh. The current flowing through the inductor L1 311 is also supplied with energy from the sustain voltage power supply Vh.

Mode 3

The third mode is a period in which all the switches are turned off.

When the second power switch M2 306 is turned off, the current flowing in the second power switch M2 306 decreases to zero. Accordingly, the voltage across the second power switch M2 306 increases to 2Vs.

In the driving circuit using the half bridge circuit, the number of switches is reduced by half compared to the driving circuit using the full bridge circuit as shown in FIG. 3, but the voltage stress of the switch is twice as high as that of the driving circuit using the full bridge circuit. All. Therefore, preferably in the case of a drive circuit using a half bridge circuit, it is desired to use a switch having twice the breakdown voltage as that used in a full bridge circuit as a power switch.

Mode 4

The fourth mode is a period in which the voltage Vcp across the panel is inverted from + Vs to -Vs.

The voltage across the panel, Vcp, has an initial value of + Vs. The first power switch M1 303 is turned on.

Parallel diode D1 304 of first power switch M1 303 is conductive. At this time, the path of the current IL1 flowing through the inductor L1 311 is as follows.

L1-> D1-> Vh-> GND-> Df2-> L1

As described above, when the inductor current IL1 is reversed in polarity under the condition that the parallel diode D1 304 is conductive, the first power switch M1 303 becomes conductive under the zero voltage condition.

Accordingly, the inductor L1 311 resonates with the panel capacitor Cp. Inductor current IL1 is reduced by resonance with panel capacitor Cp and panel voltage Vcp is reduced to -Vs by LC resonance operation.

Mode 5

The fifth mode is a period in which the voltage Vcp across the panel is maintained at -Vs.

The first power switch M1 303 remains turned on. In the fifth mode, the voltage across the panel Vcp is maintained at −Vs until the Y first power switch M1 303 is turned off.

At this time, the current IL1 flowing through the inductor L1 311 is refluxed, and the path thereof is as follows.

M1-> L1-> Df1

When the voltage across the panel Vcp becomes -Vs, the current flowing in the inductor L1 311 is refluxed through the first freewheeling diode Df1 309.

As the voltage across the panel Vcp becomes -Vs, the discharge current flows in the panel. This discharge current is supplied with energy from the sustain voltage power supply Vs. The current flowing through the inductor L1 311 is also supplied with energy from the sustain voltage power supply Vs.

Mode 6

The sixth mode is a period in which all the switches are turned off.

When the first power switch M1 303 is turned off, the current flowing through the first power switch M1 303 decreases to zero. As a result, the voltage across the first power switch M1 303 increases to 2Vs.

The driving circuit using the half-bridge type inverter circuit according to the present invention can enjoy the same effects as the embodiment of the driving circuit using the full bridge type inverter circuit described above.

(2) Half-bridge type energy recovery drive circuit

FIG. 7 is a circuit diagram illustrating a half bridge energy recovery driving circuit of the sustain driver circuit according to the present invention. The circuit shown in Fig. 7 uses a half bridge type circuit to control the driving circuit in an energy recovery manner.

An energy recovery driving circuit using a half bridge circuit according to the present invention includes a first power switch M1 405 connected between one of an X electrode or a Y electrode of the panel 412, a sustain voltage power supply Vh, and a ground, respectively. And a second power switch M2 406, and a first capacitor Cs1 403 and a second capacitor Cs2 404 connected between the other end and the sustain voltage power supply Vh and ground, respectively. In the following description, the case where the first power switch M1 405 and the second power switch M2 406 are connected to the Y electrode side will be described with reference to FIG. 7.

As shown in FIG. 7, the driving circuit according to the present invention includes a first power switch M1 405 and a second power connected to the X electrode of the panel 412 between the X electrode, the sustain voltage power supply Vh, and the ground, respectively. Switch M2 (406). Further, the driving circuit according to the present invention is provided between the first power switch M1 405 connected between the Y electrode of the panel 412 and the sustain voltage power supply Vh on the Y electrode side, and between the Y electrode of the panel 412 and ground. A second power switch M2 406 is connected.

In addition, the driving circuit according to the present invention includes an inductor L1 411 connected to an X electrode and one end thereof, and an auxiliary circuit connected between the other end of the inductor L1 411 and the Y electrode. The auxiliary circuit is connected in series between the first auxiliary switch Ma1 407 and the first auxiliary diode Da1 408 connected in series between the other end of the inductor L1 411 and the Y electrode, and also between the other end of the inductor L1 411 and the Y electrode. A second auxiliary switch Ma2 410 and a second auxiliary diode Da2 409.

The first power switch M1 405 and the second power switch M2 406 may be equivalently represented by diodes D1 and D2 connected in parallel to the switches M1 and M2, respectively. In addition, the first auxiliary switch Ma1 407 and the second auxiliary switch Ma2 410 may also be equivalently represented by diodes Da1 and Da2 connected in parallel to the switches Ma1 and Ma2, respectively.

As shown in FIG. 7, the driving circuit of the energy recovery method using the half bridge circuit according to the present invention includes the first power switch M1 405 and the second power switch M2 406 between the sustain voltage power supply Vs and ground. And the first capacitor Cs1 403 and the second capacitor Cs2 404 are connected in series, respectively, thereby taking the structure of a so-called half bridge inverter circuit.

FIG. 8 is a waveform diagram illustrating the operation of the circuit shown in FIG. 7. Hereinafter, the operation of the sustain driver circuit according to the present invention will be described with reference to FIGS. 7 and 8.

First Mode (Mode 1):

The first mode is a period in which the voltage Vcp across the panel is inverted from -Vs to + Vs.

The voltage across the panel Vcp has an initial value of -Vsd1 (= -Vs). The second auxiliary switch Ma2 410 is turned on. The second auxiliary diode Da2 409 is conductive. At this time, the path of the current IL1 flowing through the inductor L1 411 is as follows.

Cp-> Da2-> Ma2-> L1-> Cp

As the second auxiliary switch Ma2 410 of the auxiliary circuit is turned on, the panel capacitor is in LC resonance with the inductor L1 411. Due to the LC resonance, the inductor current IL1 increases and then decreases back to zero. On the other hand, the voltage across the panel capacitor Cp gradually increases from the state where it is clamped at -Vs, and has the maximum voltage value when the inductor current IL1 becomes substantially zero.

When the inductor current IL1 becomes substantially zero, the second auxiliary switch Ma2 410 of the auxiliary circuit is turned off at zero current.

Second Mode (Mode 2):

In the second mode, the voltage Vcp across the panel is maintained at + Vs.

Substantially at the same time that the second auxiliary switch Ma2 410 of the auxiliary circuit is turned off, the second power switch M2 406 is turned on. As the second power switch M2 406 is turned on, a voltage of + Vsd2 (= + Vs) is applied across the panel. The voltage across the panel is maintained at + Vsd2 (= + Vs) until the second power switch M2 406 is turned off.

At this time, the path of the current IL1 flowing through the inductor L1 is as follows.

Cs2-> Cp-> M2

When the voltage Vcp across the panel becomes + Vs, a discharge current flows through the panel. This discharge current is supplied with energy from the link capacitor voltage source Vs2 across the second capacitor Cs2 404.

Accordingly, the voltage Vs2 across the second capacitor Cs2 404 decreases from Vsu2 to Vsd2, and the voltage Vs1 across the first capacitor Cs1 increases from Vsd1 to Vsu1.

Mode 3

The third mode is a section in which the voltage across the panel is maintained at + Vsd2 (= + Vs).

The second power switch M2 406 remains turned on.

At this time, the path of the current IL1 flowing through the inductor L1 411 is as follows.

Cs2-> Cp-> M2

After the discharge current of the panel capacitor Cp becomes substantially zero, the link capacitor voltage Vsd2 at the second capacitor Cs2 404 is applied across the panel. By the link capacitor voltage Vsd2, the voltage across the panel is maintained at + Vsd2 (= + Vs) until the second power switch M2 406 is turned off.

Mode 4

The fourth mode is a period in which the voltage Vcp across the panel is inverted from + Vsd2 (= + Vs) to -Vsd1 (= -Vs).

The second power switch M2 406 is turned off and at the same time the first auxiliary switch Ma1 407 is turned on. At this time, the path of the current IL1 flowing through the inductor L1 411 is as follows.

Cp-> L1-> Ma1-> Da1-> Cp

As the first auxiliary switch Ma1 407 of the auxiliary circuit is turned on, the panel capacitor Cp is in LC resonance with the inductor L1 411. By LC resonance, the inductor current IL1 increases in resonance and then decreases back to zero. On the other hand, the voltage across the panel capacitor Cp gradually decreases from the clamped state at + Vs, and has a minimum voltage value when the inductor current IL1 becomes substantially zero.

When the inductor current IL1 becomes substantially zero, the first auxiliary switch Ma1 407 of the auxiliary circuit is turned off at zero current.

Mode 5

In the fifth mode, the voltage Vcp across the panel is maintained at −Vsd1 (= −Vs).

Substantially simultaneously with the first auxiliary switch Ma1 407 of the auxiliary circuit being turned off, the first power switch M1 405 is turned on. As the first power switch M1 405 is turned on, a voltage of -Vsd1 (= -Vs) is applied across the panel. The voltage across the panel Vcp is maintained at -Vsd1 (= -Vs) until the first power switch M1 407 is turned off.

At this time, the path of the current IL1 flowing through the inductor L1 is as follows.

Cs1-> M1-> Cp

When the voltage across the panel Vcp becomes -Vs, the discharge current flows through the panel. This discharge current is supplied with energy from the link capacitor voltage source Vs1 across the first capacitor Cs1.

Accordingly, the voltage Vs1 across the first capacitor Cs1 403 decreases from Vsu1 to Vsd1, and the voltage Vs2 across the second capacitor Cs2 404 increases from Vsd2 to Vsu2.

Mode 6

The sixth mode is a section in which the voltage across the panel is maintained at -Vsd1 (= -Vs).

The first power switch M1 405 remains turned on.

At this time, the path of the current IL1 flowing through the inductor L1 411 is as follows.

Cs1-> M1-> Cp

After the discharge current of the panel capacitor Cp becomes substantially zero, the link capacitor voltage Vsd1 in the first capacitor Cs1 403 is applied across the panel. By the link capacitor voltage Vsd1, the voltage across the panel is maintained at -Vsd1 (= -Vs) until the first power switch M1 405 is turned off.

According to the present embodiment, the voltage across the panel is kept constant using the first and second power switches M1 and M2 in the form of a half bridge, and the first and second auxiliary switches Ma1 and Ma2 of the auxiliary circuit are used. Allow the panel to recover or inject energy.

(3) Modified Embodiment of Driving Circuit of Half-Bridge Type Energy Recovery System

9 is a circuit diagram illustrating a modified embodiment of a half-bridge type energy recovery driving circuit according to the present invention. FIG. 10 is a circuit diagram conceptually illustrating a bidirectional switch element used as an auxiliary circuit among the illustrated circuits of FIG. 9.

This modified embodiment uses the bidirectional switch as shown in Fig. 10 as an auxiliary circuit in the driving circuit of the half bridge type energy recovery method as described above.

It is preferable that the driving circuit according to the present modified embodiment have substantially the same configuration as the driving circuit of the half bridge type energy recovery system as described above except for the auxiliary circuit portion.

However, the driving circuit according to the modified embodiment includes an auxiliary circuit connected between the Y electrode of the panel 429 and the other end of the inductor L1 427 rather than the X electrode side connecting terminal. The auxiliary circuit also includes a first auxiliary switch and a second auxiliary switch connected in series with each other.

Since the operation of the driving circuit according to the modified embodiment is substantially the same as the operation of the driving circuit of the half-bridge type energy recovery method described above, a detailed description thereof will be omitted.

By configuring the auxiliary circuit using a bidirectional switch as shown in FIG. 10, it is possible to omit the weber circuit and the auxiliary diodes Da1 408 and Da2 409 as used in the embodiment shown in FIG. .

In the auxiliary circuit shown in FIG. 10, the first switch Ma1 and the second switch Ma2 may be driven using one gate driving circuit.

(4) Half-bridge type energy injection drive circuit

FIG. 11 is a circuit diagram illustrating a half bridge energy injection method of the sustain driver circuit according to the present invention. The circuit shown in Fig. 11 uses a half bridge type circuit to control the driving circuit in an energy injection manner.

The driving circuit of the energy injection method using the half bridge type circuit according to the present invention is connected between one electrode of the X electrode or the Y electrode of the panel 460 and the sustain voltage power supply, so that the voltage between both electrodes of the panel 460 is the first. The first power switch M1 455 for maintaining the holding voltage (-Vs) and the one electrode of the panel 460 and the ground are connected to each other so that the voltage between the two electrodes of the panel 460 is changed to the second holding voltage (V). Second power switch M2 456 to be maintained at Vs). In addition, the driving circuit according to an embodiment of the present invention, the first capacitor Cs1 (453) and the second capacitor Cs2 (454) connected between the other electrode of the panel 460, the sustain voltage power supply (Vh) and the ground, respectively, Include. In the following description, the case where the first switch M1 455 and the second switch M2 456 are connected to the Y electrode side will be described with reference to FIG.

As shown in FIG. 11, in the driving circuit according to the present invention, the first capacitor Cs1 453 and the second capacitor Cs2 connected to the X electrode side of the panel 460 between the X electrode, the sustain voltage power supply Vh, and the ground, respectively. 454. Further, the driving circuit according to the present invention has a first power switch M1 455 connected between the Y electrode of the panel and the sustain voltage power supply Vh on the Y electrode side, and a second power switch connected between the Y electrode of the panel and ground. M2 456.

In addition, the driving circuit according to the present invention is connected to the Y electrode of the panel, and is connected between the inductor L1 459 for charging and discharging the panel capacitance Cp, the other end of the inductor L1 459 and the sustain voltage power supply Vh. A first auxiliary switch Ma1 457 for recovering energy stored in the panel capacitance Cp such that the voltage between both electrodes of the panel capacitance Cp becomes the first sustain voltage (-Vs), and the inductor L1 459. The second auxiliary switch Ma2 458 is connected between the other end of the terminal and ground to inject energy into the panel capacitance Cp so that the voltage between both electrodes of the panel capacitance Cp becomes the second sustain voltage Vs. do.

In the driving circuit according to an embodiment of the present invention, the first power switch M1 455 and the second power switch M2 456 are each connected by diodes D1 and D2 connected in parallel to the switches M1 and M2, respectively. It can be expressed equivalently. In addition, the first auxiliary switch Ma1 457 and the second auxiliary switch Ma2 458 may also be equivalently represented by diodes Da1 and Da2 connected in parallel to the switches Ma1 and Ma2, respectively.

As shown in FIG. 11, the driving circuit of the energy injection method using the half bridge circuit according to the present invention includes the first switch M1 455 and the second switch M2 456 on the Y electrode side between the sustain voltage power source Vh and ground. ) And the X electrode side first capacitor Cs1 453 and the second capacitor Cs2 454 are connected in series to each other, thereby taking the structure of a so-called half bridge inverter circuit.

FIG. 12 is a waveform diagram illustrating the operation of the circuit shown in FIG. 11. Hereinafter, the operation of the sustain driver circuit according to the present invention will be described with reference to FIGS. 11 and 12.

First Mode (Mode 1):

The first mode is a period in which the second auxiliary switch Ma2 458 is turned on, and the voltage Vcp across the panel is inverted from Vsd1 (= -Vs) to + Vsd2 (= + Vs).

The voltage across the panel Vcp has an initial value of Vsd1 (= −Vs). When the second auxiliary switch Ma2 458 is turned on, the path of the current IL1 flowing in the inductor L1 is as follows.

Cp-> L1-> Ma2-> Cs2-> Cp

In the driving circuit according to the exemplary embodiment of the present invention, in the first mode, as the second auxiliary switch Ma2 458 of the auxiliary circuit is turned on, the panel capacitor Cp performs LC resonance with the inductor L1 459. Due to the LC resonance, the inductor current IL1 increases and the voltage across panel 460 increases from -Vsd1 (= -Vs) to + Vsd2 (= + Vs). When the voltage across the panel reaches + Vs, the second auxiliary switch Ma2 of the auxiliary circuit is turned off. At this time, the voltage V _M2 of both ends of the second switch _M2 becomes zero.

Second Mode (Mode 2):

The second mode is a period in which the second power switch M2 456 is turned on, and the voltage Vcp across the panel is maintained at + Vs.

When the second auxiliary switch Ma2 458 of the auxiliary circuit is turned off and the second power switch M2 456 of the Y electrode is turned on, a voltage of + Vsd2 (= + Vs) is applied across the panel.

At this time, the path of the current IL1 flowing through the inductor L1 is as follows.

Cs2-> Cp-> M2

When the voltage Vcp across the panel 460 becomes + Vs, a discharge current flows through the panel 460. This discharge current is supplied with energy from the link capacitor voltage source Vs2 across the second capacitor Cs2 454.

Accordingly, the voltage Vs2 across the second capacitor Cs2 454 decreases from the initial voltage Vsu2 to Vsd2, and the voltage Vs1 across the first capacitor Cs1 453 increases from Vsd1 to Vsu1.

At this time, the current IL1 flowing in the inductor L1 flows along the following path.

L1-> Ma1 parallel diode-> Vh-> GND-> M2 parallel diode

Therefore, the current flowing through the second power switch M2 456 includes the discharge current component and the inductor current IL1 component.

At this time, since the current component of the inductor L1 is superior to the discharge current component at the start of the second mode, the second power switch M2 456 is turned on after conducting the parallel diode of the second power switch M2 456. Accordingly, the second power switch M2 456 performs zero voltage turn-on switching.

In addition, since the current flows as much as the difference between the discharge current component and the inductor current component, the second power switch M2 456 flows only a part of the current without any discharge current. Thus, the conductive loss is drastically reduced.

Mode 3

The third mode is a period in which the second power switch M2 456 is kept turned on. The voltage across the panel is maintained at + Vsd2 (= + Vs) and the inductor current is zero.

At this time, the path of the current IL1 flowing through the inductor L1 459 is as follows.

Cs2-> Cp-> M2

After the discharge current of the panel capacitor Cp becomes substantially zero, the link capacitor voltage Vsd2 at the second capacitor Cs2 454 is applied across the panel. By the link capacitor voltage Vsd2, the voltage across the panel is maintained at + Vsd2 (= + Vs) until the second power switch M2 456 is turned off.

In addition, the inductor current IL1 flowing in the second mode (Mode 2) continues to flow in the following current path until it becomes substantially zero value.

L1-> Ma1 parallel diode-> Vh-> GND-> M2 parallel diode

The third mode (Mode 3) is a period in which the inductor current IL1 becomes 0. The inductor current IL1 flows through the parallel diode of the second power switch M2 456, and then becomes 0.

Mode 4

The fourth mode is a section maintained at the voltage across the panel + Vsd2 (= + Vs).

After the discharge current of the panel capacitor becomes substantially zero, the link capacitor voltage Vsd2 that was in the second capacitor is applied across the panel. By the link capacitor voltage Vsd2, the voltage across the panel is maintained at + Vsd2 (= + Vs) until the second power switch M2 456 is turned off.

The fourth mode Mode 4 ends when the second power switch M2 456 is turned off.

Since the turn-off of the second power switch M2 456 is performed while the current is 0, the value of zero is switched. Therefore, the second power switch M2 456 is capable of zero voltage turn on and zero current turn off. Therefore, according to this embodiment, switching losses hardly occur.

Mode 5

The fifth mode is a period in which the first auxiliary switch Ma1 457 is turned on, and the voltage Vcp across the panel is inverted from + Vsd2 (= + Vs) to -Vsd1 (= -Vs).

The second power switch M2 456 is turned off and at the same time the first auxiliary switch Ma1 457 is turned on. At this time, the path of the current IL1 flowing through the inductor L1 is as follows.

Cp-> Cs1-> Ma1-> L1-> Cp

As the first auxiliary switch Ma1 457 of the auxiliary circuit is turned on, the panel capacitor Cp is in LC resonance with the inductor L1 459. The energy used for the LC resonance comes from the voltage on the link capacitor, Vs1, clamped to + Vs. By LC resonance, the inductor current IL1 decreases in the form of resonance. On the other hand, the voltage across the panel capacitor is reduced from + Vsd2 (= + Vs) to -Vsd1 (= -Vs).

When the voltage across the panel becomes -Vs, the second auxiliary switch Ma2 458 of the auxiliary circuit is turned off. At this time, the voltage V _M1 at both ends of the first power switch M1 455 becomes substantially zero.

Mode 6

The sixth mode is a period in which the first power switch M1 455 is turned on, and the voltage Vcp across the panel is maintained at -Vs.

At the same time as the first auxiliary switch Ma1 457 of the auxiliary circuit is turned off, the first power switch M1 455 is turned on. As the first power switch M1 455 is turned on, a voltage of -Vsd1 (= -Vs) is applied across the panel.

At this time, the path of the current IL1 flowing through the inductor L1 is as follows.

Cs1-> M1-> Cp

When the voltage Vcp across the panel reaches a value of -Vs, a discharge current flows through the panel. This discharge current is supplied with energy from the link capacitor voltage source Vs1 across the first capacitor Cs1 453.

Accordingly, the voltage across the first capacitor Cs1 453 decreases from Vsu1 to Vsd1, and the voltage Vs2 across the second capacitor Cs2 454 increases from Vsd2 to Vsu2.

In addition, the inductor current IL1 flowing in the fifth mode (Mode 5) flows in the following current path.

L1-> M1 parallel diode-> Vh-> GND-> Ma2 parallel diode

Thus, the current flowing through the first power switch M1 455 includes a discharge current component and an inductor current component IL1.

At this time, since the inductor current component IL1 is superior to the discharge current component at the start of the sixth mode (Mode 6), the first power switch M1 455 is turned on after the parallel diode of the first power switch M1 455 is turned on. do.

Accordingly, the first power switch M1 455 performs zero voltage turn-on switching. In addition, the current flowing through the first power switch M1 455 flows as much as the difference between the discharge current component and the inductor current component. That is, since only a part of the discharge current component does not flow in the first power switch M1 455, the conductive loss may be drastically reduced.

Mode 7

The seventh mode is a period in which the first power switch M1 455 is turned on. The voltage Vcp across the panel is maintained at -Vsd1 (= -Vs), and the inductor current is zero. The seventh mode is a section in which the inductor current IL1 becomes substantially zero, and flows through the parallel diode of the first switch M1 455 to zero.

At this time, the path of the current IL1 flowing through the inductor L1 459 is as follows.

Cs1-> M1-> Cp

After the discharge current component of the panel capacitor Cp becomes substantially zero, the link capacitor voltage Vsd1 at the first capacitor Cs1 453 is applied across the panel. Due to the link capacitor voltage, the voltage across the panel Vcp is maintained at -Vsd1 (= -Vs) until the first power switch M1 455 is turned off.

In addition, the inductor current IL1 flowing in the sixth mode (Mode 6) continues to flow in the following current path until it becomes zero value.

L1-> M1 parallel diode-> Vh-> GND-> Ma2 parallel diode

Mode 8

The eighth mode is a mode in which the voltage Vcp across the panel is maintained at -Vsd1 (= -Vs).

The first power switch M1 455 remains turned on.

At this time, the path of the current flowing through the inductor is as follows.

Cs1-> M1-> Cp

After the discharge current becomes zero, the link capacitor voltage Vsd1 in the first capacitor Cs1 453 is applied to the panel. By the link capacitor voltage, the voltage across the panel Vcp is maintained at -Vsd1 (= -Vs) until the first power switch M1 455 is turned off.

The eighth mode Mode 8 ends when the first power switch M1 455 is turned off.

Since the turn-off of the first power switch M1 455 is performed in the state where the current is 0, zero current switching is possible. Therefore, the first power switch M1 455 is capable of zero voltage turn-on and zero current turn-off, and accordingly the switching loss hardly occurs according to this embodiment.

According to the present embodiment, the first and second auxiliary switches Ma1 and Ma2 of the auxiliary circuit are kept constant while the voltage across the panel 460 is kept constant by using the first and second power switches M1 and M2 in the form of a half bridge. Use to recover or inject the energy of the panel.

(5) Example of adding voltage regulating circuit to half-bridge type driving circuit

FIG. 13 is a waveform diagram showing an operation waveform of the driving circuit of the half bridge type energy injection method as described above. As can be seen in FIG. 13, the energy injection from the auxiliary circuit switches the voltage across the panel.

In the panel, a discharge current flows, and this energy is supplied from the link capacitor. At this time, the voltage of the link capacitor for supplying energy decreases and the voltage of the other link capacitor increases, so that the sum of the two link capacitor voltages is always constant, Vs1 + Vs2 = Vh. Therefore, it is possible to supply a constant voltage Vs across the panel during the sustain period.

That is, unlike the conventional weber circuit, the half-bridge type sustain period driving circuit according to the present invention applies a link capacitor voltage rather than a power supply voltage to maintain the voltage across the panel. The present invention proposes two methods for maintaining a constant voltage across the panel in the sustain period.

First, as shown in FIG. 13, Vsd1 or Vsd2 is applied in a section in which the voltage across the panel is kept constant. At this time, the values of Vsd1 and Vsd2 are substantially the same as the sustain voltage Vs value required for the voltage across the panel. Therefore, the power supply voltage used in the driving circuit according to the present invention satisfies the following equation.

Vh = Vsd1 + Vsu2 = Vs + Vsu2> 2Vs

Vh = Vsu1 + Vsd2 = Vsu1 + Vs> 2Vs

Where Vsu1 and Vsu2 are greater than Vs, so Vh is greater than 2Vs. Of course, the voltage stress of the first and second power switches M1 and M2 increases due to the Vh voltage greater than 2Vs, but the increase of the voltage stress is small.

The second method is to use the voltage regulator power stage 479 as shown in FIG. In FIG. 13, the link capacitor current Ics1 discharges and the voltage decreases by switching the panel voltage across the panel from -Vs (=-Vsd2) to + Vs (= + Vsd1) and the discharge current of the panel. Charging to the size of increases the voltage. This requires a supply voltage Vh greater than 2Vs as in the first method above. The voltage regulator is a method in which a compensating current flows in the link capacitor with a current equal to the charge and discharge current, thereby preventing the link capacitor voltage from fluctuating and always maintaining the same voltage.

As shown in FIG. 15, when Ics1 discharges in the first mode and the second mode, and the sum of the discharge currents is “A”, the first mode and the second mode using the second power switch Ms2 482 of the voltage regulator. Injecting the current of "A" and the current direction opposite to Ics1 in the link capacitor Cs1 (473) to ensure that there is no variation in Vs1. That is, since Ics1 + IQSa = 0, there is no actual current to charge or discharge the link capacitor Cs1 (473) so that Vs1 is kept constant.

In addition, when Ics2 charges in the first mode and the second mode and the sum of the discharge currents is "A", the magnitude of the current in the first mode and the second mode is increased by using the second switch Ms2 482 of the voltage regulator. A current of "A" and a current direction opposite to Ics2 is injected into the link capacitor Cs2 474 so that there is no variation in Vs2. That is, since Ics2 + IQSb = 0, there is no actual current to charge or discharge the link capacitor Cs2 474, so that Vs2 is kept constant.

In the fifth mode and the sixth mode, only the directions of the currents are reversed, and the first switch Ms1 480 of the voltage regulator is controlled in such a manner so that the voltages of Vs1 and Vs2 are always constant Vsrk.

Using the voltage regulator as described above, it is possible to obtain the characteristics of the driving circuit required in the sustaining period with only the power supply voltage Vh (= 2Vs) having a size of 2Vs rather than the Vh (> 2Vs) power supply voltage greater than 2Vs. These voltage regulators are shown in Fig. 5 (current type sustaining section driving circuit of the half bridge type inverter driving method), Fig. 7 (holding section driving circuit of the half bridge type energy recovery method), and Fig. 9 (half bridge type energy recovering method holding section driving) The auxiliary switch of the circuit is applied to the bi-directional switch) and the half-bridge type sustaining section driving circuit as shown in FIG. 11 (holding section driving circuit of the half bridge type energy injection method) to maintain the link capacitor voltage at Vs. do.

(6) A novel driving scheme for the full span application of half-bridge type sustained period drive circuits with voltage regulators

FIG. 16 illustrates an example of the X electrode, Y electrode, and YX electrode voltages of a panel generally required for the overall operation of the PDP. The sustain period is a period described so far to generate a high frequency voltage pulse having a magnitude of + Vs and -Vs on the YX electrode of the panel. In addition, in the reset and address periods, as shown in FIG. 16, several voltages or voltage sources that increase or decrease linearly are required besides + Vs and -Vs. The conventional method receives some of these voltages (Vset, Ve, etc.) from a power supply, and connects these voltages to the panel's X or Y electrodes using an additional power switch to apply the desired voltage to the panel. to be. In order to apply a voltage other than Vs to the panel, a power switch that separates the existing sustain period driving circuit is required and an additional power switch for connecting is required. Such additional power switches generally require more switches than the power switch of the maintenance section driving circuit, and increase the volume and price of the global driving circuit due to heat generated by the control circuit and loss of the additional switch.

FIG. 17 illustrates an embodiment of a global voltage waveform using a half-bridge type sustained period driving circuit according to the present invention. In order to generate a voltage similar to the conventional method of the YX electrode voltage of a panel, the power switch M1 and When controlling the M2 together, the voltages required for the link capacitor voltages Vs1 and Vs2 at that time are Vs1ref and Vs2ref in FIG. Control of the first and second power switches M1 and M2 of the sustaining section driving circuit conducts the second power switch M2 in sections A and C and conducts the first power switch M1 in sections B and D. FIG. In the section where the voltage Vs2 is zero, the second switch Ms2 of the voltage regulator is turned on.

In the description of FIG. 15, the voltage regulator serves to keep the link capacitor voltages Vs1 and Vs2 constant at Vs. Here, Vs1 and Vs2 may be controlled to be Vs, which is a direct current value, or if Vs1 or Vs2 is controlled to be an arbitrary voltage if the voltage reference is set to an arbitrary voltage.

Therefore, as shown in FIG. 17, when the voltage regulators first and second switches Ms1 and Ms2 are controlled such that Vs1 and Vs2 become Vs1ref and Vs2ref, respectively, it is possible to generate the YX electrode voltage of the desired panel.

Next, the operation principle of the reset and the address section of the voltage regulator will be described with reference to FIG. 17.

Section A: Since the second power switch M2 476 is on, Vcp = Vs2. (Vs2 voltage is applied across the panel.) Also, in the section (T0-T1), the second switch Ms2 482 of the voltage regulator is opened. As it continues to turn on, Vs2 maintains its zero voltage. In the section (T1-T2), only Vs1 follows Vs1ref. When the voltage regulator controls only Vs1, Vs2 always satisfies Vs1 + Vs2 = Vh, so Vs2 automatically follows Vs2ref. Vs1ref drops from Vh to Vh-Ve and remains at Vh-Ve in the (T1-T2) section. Therefore, since the voltage of Vs1 needs to be discharged, only the voltage regulator first switch Ms1 480 is followed by Vs1 following Vs1ref by the pulse width modulation method.

Section B: Since the first power switch M1 475 is on, Vcp = −Vs1.

In section B, only Vs2 follows Vs2ref. When the voltage regulator controls only Vs2, Vs1 always satisfies Vs1 + Vs2 = Vh, so Vs1 automatically follows Vs1ref. Vs2ref remains constant at Vs in the (T2-T3) section, falls from Vs to Vh-Vset in the (T3-T4) section, and remains constant at Vh-Vset in the (T4-T5) section. Therefore, since the voltage of Vs2 needs to be discharged, only Vs2 follows Vs2ref by the pulse width modulation method of the second switch Ms2 482 of the voltage regulator. In the (T5-T6) section, since Vs2ref is zero voltage, the second switch Ms2 482 of the voltage regulator is turned on to clamp Vs2 to zero voltage.

C section: Since the second power switch M2 476 is on, Vcp = Vs2.

At T6, Vs1ref drops from Vh to Vh-Va and in the (T6-T7) section Vs1ref linearly decreases from Vh-Va to Vh-Ve (T7-T8) and maintains the Vh-Ve value. . In section C, only Vs1 follows Vs1ref. When the voltage regulator controls only Vs1, Vs2 always satisfies Vs1 + Vs2 = Vh, so Vs2 automatically follows Vs2ref. In the C section, Vs1ref is a section in which the voltage is kept constant or decreased, so the voltage of Vs1 must be discharged. Therefore, only the voltage regulator switch Ms1 follows the pulse width modulation method so that Vs1 follows Vs1ref.

Section D: Since the first power switch M1 475 is on, Vcp = -Vs1.

In addition, since the second switch Ms2 482 of the voltage regulator is turned on in the section D, the voltage Vs2 is kept at zero.

Then, Cs1 is discharged using the first switch Ms1 480 of the voltage regulator so that the Vs1 value decreases instantaneously from Vh to Vh-Vs at the end of the D section. Then enter the maintenance mode.

The switches controlled by the pulse width modulation (PWM) method for each section are as follows.

Section A: Vs1 PWM Control

Section B: Vs2 PWM Control

Section C: Vs1 PWM Control

D section: Vs2 PWM control

18 illustrates a control algorithm of the voltage regulator in the reset and address periods. The upper part is the PWM controller of Vs1 and the lower part is the PWM controller of Vs2.

Upper description: Vs1-Vs1ref is the controller input and PWM. The output of the PWM is driven only by the logic circuit in the section where the VM2 signal, that is, the PWM output in the section A and C drives Ms1.

Sub description: Vs2-Vs2ref is the controller input and PWM. The output of the PWM drives the Ms2 in a state where only the PWM output in the section in which the VM1 signal is present, that is, the B and the D section, is combined by the VMs2 and the OR gate by the logic circuit.

19 to 22 are circuits in which the half-bridge type sustaining period driving circuit described above is combined with a voltage regulator to generate a desired voltage across the panel not only during the sustaining period but also throughout the entire panel.

That is, FIG. 19 shows a circuit in which a voltage adjusting circuit is added to a current-type sustaining section driving circuit of a half-bridge inverter driving method, and FIG. 20 shows a voltage adjusting circuit in a holding section driving circuit of a half-bridge type energy recovery method. It is a circuit diagram which shows the addition. FIG. 21 illustrates the addition of a voltage regulating circuit to a circuit in which an auxiliary switch of a half-bridge type energy recovery method holding section driving circuit is used as a bidirectional switch. FIG. It is a circuit diagram which shows the addition of a circuit.

The storage section driving circuit of the half bridge type shown in FIGS. 19 to 22 has been described with reference to FIGS. 5 to 13, and the method of applying the whole section of the maintenance section driving circuit in FIGS. 14 to 18 by adding a voltage regulator. As described above, the description of the operation of the circuit illustrated in FIGS. 19 to 22 will be omitted.

3. Power Supply Drive Circuit

(1) Power Supply Circuit

According to an embodiment of the present invention, when the difference between the input voltage and the output voltage is small, a method of replacing a general power converter is a method of obtaining a desired output voltage with a small capacity power converter.

1) Circuit and controller of active series compensation power supply

23 (a) to FIG. 24 are explanatory diagrams for explaining a power supply circuit and a controller of an active series compensation method according to an embodiment of the present invention.

In FIG. 23 (a), a capacitor Css 804 of a series compensator (Power Converter # 2: 807) that applies a series compensation voltage in series between an input and an output is connected. Here, the series compensator 807 uses a general flyback converter or a buck-boost converter. The output of the converter may be an input Vin or may be output to a third voltage source.

FIG. 23 (b) shows a circuit for generating a control signal Q for controlling the switching element 808 of the series compensator 807 shown in FIG. 23 (a) by the PWM method.

As shown in FIG. 23B, a value obtained by subtracting the input Vin from the desired output voltage Vsref becomes a reference compensation voltage Vcref, and a difference between the compensation voltage Vc and the reference compensation voltage Vcref that are voltages across the capacitor Css 804. Is input to the controller to generate the control signal Q as a PWM method.

That is, the power supply circuit according to an embodiment of the present invention further includes a series compensator 807 and applies the capacitor Css 804 by controlling the switching element 808 of the series compensator 807 in a PWM manner. Control the compensation voltage Vc +.

More specifically, as shown in FIG. 24, when the difference between the input voltage Vin and the output voltage Vs is small and there is a low frequency pulsation component in the input voltage Vin, the series compensator 807 may have a voltage equal to or greater than the desired output voltage Vsref. Serves to get rid of That is, as shown in FIGS. 23A and 23B, when the output voltage of the series compensator 807 is made Vc by the PWM control method, the output voltage is to obtain the desired adjusted DC output voltage Vs. It is possible. Expressed as an expression:

Vs = Vin-Vc

The power supply circuit and the controller according to an embodiment of the present invention are suitable for a high voltage power supply having a large output voltage. Unlike the conventional method, the power supply circuit and the controller deal with only the power (Vc Io) that compensates in series, thereby reducing the switching frequency due to the small capacity of the power converter. It is possible to increase and the volume of the filter is small. In addition, the low price of the series compensator enables low output voltage ripple, low volume, and low cost when used as a power supply for high voltage power supplies.

The application is suitable for power supplies with an output voltage of more than 300VDC and for all-over-powered power supplies in the PDP.

2) Active clamp forward converter with two secondary windings

25 is a circuit diagram illustrating an active clamp forward converter according to an exemplary embodiment of the present invention.

As shown in FIG. 25, in the active clamp type forward converter according to the exemplary embodiment, an input voltage Vin is applied between both input terminals, and a first capacitor Cin1 851 is connected between both input terminals.

Further, a second capacitor C2 852 and a clump switch Sc 853 and a main switch S1 856 connected in series with each other are connected between both input terminals. In the converter circuit according to an embodiment of the present invention, the clump switch Sc 853 may be equivalently represented by a diode Dc 854 connected in parallel to the switch Sc 853, and the main switch S 1 ( 856 may be equivalently represented by diode D1 857 and capacitor C1 858 connected in parallel to switch S1 856.

The active clamp type forward converter according to the present invention also includes a transformer TR 855 provided with two secondary windings. The dot terminal of the primary winding of the transformer TR 855 is connected to the + input terminal, and the non-dot terminal is connected to the connection point of one end of the clump switch Sc 853 and one end of the main switch S1 856. The cathodes of the first and second rectifying diodes Rec1 and Rec2 860 and 861 are connected to the dot side terminal of the first winding of the secondary winding of the transformer TR 855 and the non-dot side terminal of the second winding, respectively. Further, the non-dot side terminal of the first winding of the secondary side winding is connected to the dot side terminal of the second winding, and is connected to one end of the first inductor L1 862.

The other end of the first inductor L1 862 is connected to the positive terminal of the output terminal, and the anodes of the first and second rectifier diodes Rec1 and Rec2 860 and 861 are connected to each other to the negative terminal of the output terminal. Connected. On the other hand, the smoothing capacitor Cs 863 is connected between the positive terminal and the negative terminal of the output terminal. Subsequently, a load Road 864 is connected between the positive terminal and the negative terminal of the output terminal.

In an active clamp forward converter according to an embodiment of the present invention, one side of both input terminals may be grounded. Similarly, the negative terminal of the output terminal can be grounded.

Hereinafter, an operation of an active clamp forward converter as shown in FIG. 26 will be described with reference to the waveform diagram of FIG. 26.

Clamp switch Sc 853 and main switch S1 856 are controlled by a switching control signal. For example, when the clamp switch Sc 853 and the main switch S1 856 are implemented as MOSFET transistor elements, the on-off of the switch can be controlled by controlling the voltage supplied between the gate and the source of each transistor.

As shown in Fig. 26, the clamp switch Sc 853 and the main switch S1 856 are pulse signals that alternate with each other with a predetermined dead time. Hereinafter, the turns ratio of the primary winding and the secondary winding of the transformer 855 will be referred to as Np / Ns1, and the turns ratio of the primary winding and the secondary winding will be referred to as Np / Ns2.

An operation of an active clamp type forward converter according to an exemplary embodiment of the present invention is largely divided into a first mode and a sixth mode according to the on-off state of the clamp switch Sc 853 and the main switch S1 856. Hereinafter, the operation of the active clamp forward converter will be described for each mode.

First mode:

The first mode is a period before the main switch S1 856 is turned off and the clamp switch Sc 853 is conducted. The current path of the primary leakage and the magnetizing inductance and the secondary inductor current IL1 path are as follows.

Primary leakage and magnetizing inductance current path: Np-> Dc-> C2-> Np

o Secondary inductor current IL1 path: L1-> Cs // Rload-> (Rec1-> Ns1) // (Rec2-> Ns2)-> L1 * freewheeling

That is, at the moment the main switch S1 856 is turned off, the primary magnetizing inductance and leakage inductance current of the transformer TR 855 flows down through the clamp capacitor C2 852 through the parallel diode Dc 854 of the clamp switch. . The first mode ends as soon as the leakage inductance current equals the magnetizing inductance current.

During this period, the primary side voltage Vprim of the transformer is zero, and the secondary side voltage is also zero, and the secondary inductor current IL1 decreases with reflux.

Second mode:

The second mode is a section before the clamp switch Sc 853 is turned on and turned off again, and the primary side leakage and magnetizing inductance current path and the secondary side inductor current IL1 are as follows.

o Primary leakage and magnetizing inductance current path (Iprim> 0): Np-> Dc-> C2-> Np, leakage inductance current goes to zero immediately after the start of the second mode.

Primary magnetizing inductance current path (Iprim <0): Np-> C2-> Sc-> Np

Secondary inductor current IL1: L1-> Cs and Rload-> Rec1-> Ns1-> L1

That is, at the instant when the leakage inductance current is equal to the magnetizing inductance current, the voltage on the primary side of the transformer Vprim is applied with the clamp capacitor voltage to become -Vc. The rectified secondary voltage Vsec becomes (Ns2 / Np) Vc so that the secondary inductor current IL2 increases linearly. In the second mode, the magnetizing inductance current initially flows through the clamp switch parallel diode Dc 854. When the polarity of the current is reversed, a reverse current that increases linearly through the clamp switch Sc 853, to which the gate signal is already applied, Flow.

Third mode:

In the third mode, the clamp switch Sc 853 is turned off, and the magnetizing inductance current flowing in the reverse direction discharges the charge charged to Vin + Vc in the parallel capacitor of the main switch and flows to the input Vin. The primary side magnetizing inductance current path and the secondary side inductor current IL1 path are as follows.

Primary magnetizing inductance current path (Iprim <0): Np-> Cin1-> C1-> Np1

Secondary inductor current IL1 path: L1-> Cs and Rload-> (Rec1-> Ns1) and (Rec2-> Ns2)-> L1 (reflux)

4th mode:

The fourth mode is a zero voltage switching section, and the path of the primary magnetization inductance current Iprim and the path of the secondary side current IL1 are as follows.

Primary magnetizing inductance current path (Iprim <0): Np1-> Cin1-> D1-> Np1

Secondary inductor current IL1 path: L1-> Cs // Rload-> (Rec1-> Ns1) // (Rec2-> Ns2)-> L1 (reflux)

That is, when the voltage across the main switch becomes zero, the voltage flows through the main switch parallel diode D1 857 and the voltage across the main switch S1 856 maintains the zero voltage. In other words, the zero voltage switching at which the voltage across the main switch S1 856 becomes zero is possible before the main switch S1 856 conducts.

5th mode:

The fifth mode is a section in which the main switch S1 856 starts to conduct, and is a section from the moment when the primary current increases linearly rapidly and the output current reflected to the primary side is equal in magnitude. The paths of the primary side current path and secondary side inductor current IL1 are as follows.

Primary Side Current Path (Iprim> 0): Np-> S1-> Cin1-> Np

Secondary inductor current IL1 path: L1-> Cs // Rload-> (Rec1-> Ns1) // (Rec2-> Ns2)-> L1 (reflux)

6th mode:

The sixth mode is a period before the conducting main switch S1 856 is turned off, and the secondary inductor current IL1 increases linearly.

Primary Current Path (Iprim> 0): Np1-> S1-> Cin1-> Np1

o Secondary inductor current IL1 path: L1-> Cs // Rload-> Rec2-> Ns12-> L1

Iprim increases dramatically linearly From the moment when the output current reflected to the primary side is equal in magnitude, Vsec = (Ns2 / Np1) Vin is applied to the transformer secondary side to increase IL1 linearly.

(2) Current-fed Driving Ciruit for PDP

27 is a circuit diagram illustrating a current source panel driving circuit according to an embodiment of the present invention.

Hereinafter, a configuration and connection relationship of a panel driving circuit according to an embodiment of the present invention will be described with reference to FIG. 27.

As shown in FIG. 27, in the panel driving circuit according to an embodiment of the present invention, the panel 920 includes a panel capacitance Cp and is connected between the X electrode and the Y electrode to be driven from the X electrode and the Y electrode. .

The panel driving circuit according to the exemplary embodiment of the present invention may be connected to the X electrode and the Y electrode, respectively, so that the first sustain voltage is applied between the X electrode and the Y electrode of the panel 920 for a predetermined period of time. Third and fourth powers connected to the power switches M1 104, M2 107, X electrodes, and Y electrodes to apply a second sustain voltage between the X electrodes and the Y electrodes of the panel 920 for a period of time; Switch M3 905 and M4 906.

In addition, the panel driving circuit according to an embodiment of the present invention is connected to the X electrode and the Y electrode of the panel 920, respectively, and the first and second inductors L1 918 and L2 for charging and discharging the panel capacitance Cp. 919, connected to the other ends of the first and second inductors L1 918 and L2 919 so that the voltage between the X electrode and the Y electrode of the panel 920 is the first sustain voltage. Fifth and sixth power switches M5 902, M6 909, and first and second inductors L1 (1) that apply constant voltages to the other ends of the first and second inductors L1 918 and L2 919, respectively. 918 and L2 919, the first and second inductors L1 918 and L2 919 connected to the other ends of the L2 919 such that the voltage between the X electrode and the Y electrode of the panel 920 becomes the second sustain voltage. And the seventh and eighth power switches M7 903 and M8 908 for applying a constant voltage to the other ends of the respective circuits.

Furthermore, the panel driving circuit according to an embodiment of the present invention, the first and second inductor L1 (918), the other end of the L2 (919) and the first connected between the fifth to eighth power switch M5 to M8, respectively The fifth rectifier Da (911), Db 913, De (914), Dh (916), the fifth rectifier connected between the connection point and ground of the rectifier Da (911) and the fifth power switch M5 (902) A sixth rectifier Dd 912, the third rectifier De 914, connected between a rectifier Dc 910, a connection point of the second rectifier Db 913, and the sixth power switch M6 909, and a sustain voltage power supply; Between the connection point of the seventh power switch M7 903 and the sustain voltage power supply, between the seventh rectifier Dg 115 and the connection point of the fourth rectifier Dh 916 and the eighth power switch M8 908 and ground. It further includes the connected eighth rectifier Df 917.

In the panel driving circuit according to an embodiment of the present invention, the other ends of the first and fourth power switches M1 904 and M4 906 are connected to a sustain voltage power supply, and the second and third power switches M3 are connected to each other. 905, the other end of M4 906 is grounded, the other end of the fifth and eighth power switches M5 902, M8 908 is connected to a sustain voltage power supply, and the sixth and seventh power switches M6. 909, the other end of M7 103 is grounded.

Meanwhile, as shown in FIG. 27, rectifier diodes are connected to all power switches (the first to eighth power switches) in parallel, and when a body diode is built in the power switch, a rectifier diode is used or a separate rectifier diode is used. May be connected in parallel. There is a parasitic capacitor with inherent capacitance between the drain and the source (or collector and emitter) of the power switch (the eighth power switch in the first power switch). In FIG. 27, a first power switch output capacitor 929 as a parasitic capacitor of the first power switch M1 904, the second power switch M2 907, the third power switch M3 905, and the fourth power switch M4 906. ), Only the second power switch output capacitor 932, the third power switch output capacitor 931, and the fourth power switch output capacitor 930 are illustrated.

Hereinafter, the operation of the panel driving circuit as shown in FIG. 27 will be described with reference to the waveform diagram of FIG. 28.

Mode 0 (~ t ₀ ) is a panel voltage holding period, in which the third power switch M3 905 and the fourth power switch M4 906 are turned on and the panel voltage is maintained at -Vs. to be.

Mode 1 (t ₀ to t ₁ ) is an inductor current establishment period, and the switch fifth power switch M5 902 and the fifth power switch M3 905 and the fourth power switch M4 906 are in a conductive state. When the six power switch M6 909 is turned on, the input voltage Vs is applied to the first inductor L1 918 and the second inductor L2 919 so that the inductor current increases linearly. The currents of the first inductor L1 918 and the second inductor L2 919 at this time are represented by Equation 3.

Mode 2 (t ₁ to t ₂ ) is the energy recovery and input period of the panel and the third power switch M3 105 and the fifth power switch M5 902 and the sixth power switch M6 909 are connected to each other. When the fourth power switch M4 106 is turned off, the PDP 120 panel voltage is charged by the current established in the first inductor L1 918 and the second inductor L2 919 in mode 1. Is reversed from -Vs to Vs. Of course, since the panel capacitance Cp is charged by the current source, the PDP 920 panel voltage shows a linear rise. At this time, current flows from the bottom of the first power switch M1 output capacitor 929 and the second power switch M2 output capacitor 932 to the zero voltage from Vs to the third power switch M3 output capacitor 931. Since the fourth power switch M4 output capacitor 930 flows from top to bottom, the voltage rises from zero voltage to Vs. Here, assuming that the currents of the first inductor L1 918 and the second inductor L2 919 are constant, the panel voltage of the PDP 920 is approximately expressed as follows.

Mode 3 (t ₂ to t ₃ ) is a period during which currents of the first inductor L1 918 and the second inductor L2 919 are refluxed. In mode 2, the voltage across the panel of the PDP 920 reaches Vs and the first power is applied. When the switch M1 output capacitor 929 and the second power switch M2 output capacitor 932 fall to zero voltage, the first inductor L1 918 current passes through the first rectifying diode 923 and the second inductor L2 ( 919 current is refluxed through the second rectifying diode 926. Therefore, the voltages at both ends of the first power switch M1 904 and the second power switch M2 907 maintain the zero voltage, and thus, the first power switch M1 904 and the second power switch M2 907 in the next mode. Enable zero voltage switching.

Mode 4 (t ₃ to t ₄ ) regenerates the energy stored in the first inductor L1 918 and the second inductor L2 919 to the input terminal 901 which is a power supply terminal, and simultaneously the first power switch M1 904. And zero voltage switching of the second power switch M2 907. The first power switch M1 904 and the second power switch M2 907 are turned on and at the same time the fifth power switch M5 902 and the sixth power switch M6 909 are turned off. In this case, the voltage across the PDP 920 panel is maintained at Vs, and the energy stored in the first inductor L1 918 is the first rectifying diode 923, the tenth rectifying diode 911, and the ninth rectifying diode 910. The energy stored in the second inductor L2 919 along the serial path of the power supply side is restored to the input terminal 901 on the power supply side, and the second rectifying diode 926, the fifteenth rectifying diode 916, and the sixteenth rectifying diode The current of the first inductor L1 918 and the second inductor L2 919 falls to zero along the series path of 917 to the input terminal 901 on the power supply side.

Mode 5 (t ₄ to t ₅ ) is a period in which the PDP 920 panel voltage is maintained at the input voltage Vs, so that the first power switch M1 904 and the second power switch M2 907 are conducting, so that the PDP 120 The voltage across the panel remains at Vs.

Subsequent operations are the same as those from mode 1 to mode 5 by the switch third power switch M3 905, fourth power switch M4 906, seventh power switch M7 903, and eighth power switch M8 908. The operation will be repeated.

(3) Resonant type Driving Ciruit for PDP

29 is a circuit diagram illustrating a PDP panel driving circuit according to an embodiment of the present invention.

As shown in FIG. 29, the PDP panel 964 includes a panel capacitance Cp and is connected between the X electrode and the Y electrode to be driven from the X electrode and the Y electrode. First and fourth power switches M1 102 and M4 105 are connected between the X and Y electrodes of the panel 964 and the sustain voltage power supply, respectively, and between the X and Y electrodes of the panel 964 and the ground. Third and second power switches M3 904 and M2 943 are connected, respectively. In addition, a fifth power switch M5 906, a first inductor L1 962, and a first capacitor C1 960 are connected in series between the X electrode sustain voltage power supply of the panel 964, and between the Y electrode and the sustain voltage power supply. The sixth power switch M6 907, the second inductor L2 963, and the second capacitor C2 961 are connected.

In the panel driving circuit according to an exemplary embodiment of the present invention, the first inductor L1 962 and the first capacitor C1 960 are short-circuited by the second and fifth power switches M2 943 and M5 906. When the remaining power switch is open, the power is resonated with each other to inject energy into the panel capacitance Cp or to recover energy stored in the panel capacitance Cp, and to obtain the second inductor L2 963 and the second capacitor C2. 961 may resonate each other when the third and sixth power switches M3 904 and M6 907 are short-circuited and the remaining power switches are open, thereby injecting energy into the panel capacitance Cp, or the panel capacitance Cp. Recover energy stored in

Meanwhile, as shown in FIG. 29, rectifier diodes are connected to all power switches (first to sixth power switches) in parallel, and when a body diode is built in the power switch, a rectifier diode is used or a separate rectifier diode is used. You can also connect in parallel. There is a parasitic capacitor having inherent capacitance between the drain and the source (or collector and emitter) of the power switch (the sixth power switch in the first power switch). In FIG. 29, a first power switch output capacitor 956 as a parasitic capacitor of the first power switch M1 942, the second power switch M2 943, the third power switch M3 944, and the fourth power switch M4 945. ), Only the second power switch output capacitor 957, the third power switch output capacitor 958, and the fourth power switch output capacitor 959 are shown. In the panel driving circuit according to an exemplary embodiment of the present invention, the rectifying diodes connected in parallel to the respective capacitors may be connected to the first and second capacitors C1 960 and C2 961.

An operation of each mode of the driving circuit will be described below with reference to the waveform diagram of FIG. 30 and FIGS. 31 to 38.

As shown in FIG. 29, Cp is an equivalent capacitor of the PDP 964 panel, and a first inductor L1 962 and a second inductor L2 963 are added for energy recovery and input operation, and the first capacitor C1 960 is used. And a second capacitor C2 961 were added for reversal of the inductor current direction due to resonance of the first inductor L1 962 and the second inductor L2 963. Here, the inversion of the currents of the first inductor L1 962 and the second inductor L2 963 is for energy recovery of the panel.

Mode 1 (t ₀ to t ₁ ) is a current establishment period of the first inductor L1 962, and as shown in FIG. 31, the third power switch M3 944 is turned on so that the voltage across the PDP 964 panel is zero. In this state, when the fifth power switch M5 946 is turned on, the first inductor L1 962 and the first capacitor C1 960 biased to the input terminal 941 voltage Vs. A resonant circuit is formed, and both the current of the first inductor L1 962 and the voltage of the first capacitor C1 960 rise. In this case, the voltage of the first capacitor C1 960 and the current of the first inductor L1 962 are represented by Equation 5 below.

Mode 2 (t ₁ to t ₂ ) is a period of inputting energy to the PDP 964 panel using the current established in the first inductor L1 962 in mode 1, as shown in FIG. 32. When the current of the 1 inductor L1 962 is established to a certain level, the third power switch M3 944 is turned off to charge the PDP 964 panel. At this time, the current of the first inductor L1 962 can be assumed to be almost constant since the inductance is rather large and the period is short as time is several hundred nsec, and the first capacitor C1 960 is much larger than the panel capacitance. It can be assumed that the voltage at 960 is also nearly constant. Accordingly, the PDP 964 panel voltage, the first inductor L1 962 current, and the first capacitor C1 960 voltage may be represented by Equation 6 below.

Mode 3 (t ₂ to t ₃ ) is a period in which the zero voltage switching and the direction of the current of the first inductor L1 962 are reversed. When the voltage across the PDP 964 panel reaches the input terminal 941 voltage Vs, the first inductor The current flowing in the L1 962 flows to the first power switch output capacitor 956 as shown in FIG. 33 to extract the charge stored in the first power switch output capacitor 956. When all the charge stored in the first power switch output capacitor 956 is removed, the first rectifying diode 948 is turned on as shown in FIG. 34 so that the voltage across the PDP 964 panel is clamped to Vs. It is clamped and forms a resonant circuit composed of the first capacitor C1 960 and the first inductor L1 962 to perform LC resonance by the initial values of the first capacitor C1 960 and the first inductor L1 962. . At this time, since the first rectifying diode 948 is turned on, the voltage between both ends of the first power switch M1 942 maintains a zero voltage, thereby enabling zero voltage switching. However, before the current direction of the first inductor L1 962 is reversed, the first power switch M1 942 must be turned on. When the first power switch M1 942 is turned on, the voltage across the panel of the PDP 964 is maintained at the input terminal 941 voltage Vs as shown in FIG. 35, and the LC resonant operation is continued so that the first inductor is continued. The current direction of 962 is reversed. In mode 3, the voltage and current of each part are expressed by Equation 7 as follows.

In mode 4 (t ₃ to t ₄ ), when Vc1 drops to zero voltage, the seventh rectifier diode 954 turns on, so that the current of the first inductor L1 962 is equal to the seventh rectifier diode 954, As shown in FIG. 36, the first power switch M 942 and the fifth power switch M5 946 are refluxed. The first capacitor C1 960 voltage becomes substantially zero due to LC resonance in mode 3 as a period during which the current of the first inductor L1 962 is refluxed.

At this time, each part voltage and current is represented by Equation 8 as follows.

Mode 5 (t ₄ to t ₅ ) is a period in which the stored energy of the PDP 964 panel is recovered and the first power switch M1 942 is used to recover the energy of the PDP 964 panel and drop it to zero voltage at Vs. ), The PDP 964 panel voltage and the third power switch output capacitor 958 voltage drop from Vs to zero voltage by forming a conductive path as shown in FIG. 37. The voltage of the switch M1 942 rises from zero voltage to Vs so that the first power switch M1 942 is open.

At this time, each part voltage and current is represented by the following equation (9).

Mode 6 (t ₅ ˜ t ₆ ) is the seventh rectifying diode 954, the fifth rectifying diode 952, and the third when the charge of the third power switch output capacitor 958 is removed to zero voltage in mode 5. The energy of the first inductor L1 962 is regenerated to the input terminal 941 through the rectifying diode 950, whereby the third power switch M3 944 is turned on due to the turn on of the third rectifying diode 950. The voltage across both ends is maintained at zero voltage. Therefore, when the third power switch M3 944 is turned on, zero voltage switching becomes possible. Meanwhile, the sixth power switch M6 947 is turned on to establish a current in the second inductor L2 953, thereby preparing for the next closing operation as in the operation in mode 1.

Subsequent operations are repeated by the fourth power switch M4 945 and the sixth power switch M6 947, which are the same as those in the mode 1 to the mode 6.

(4) A Simple Current-fed Driving Ciruit for PDP

39 is a circuit diagram illustrating a PDP panel driving circuit according to another embodiment of the present invention.

As shown in FIG. 39, the PDP 973 panel includes a panel capacitance Cp and is connected between the X electrode and the Y electrode to be driven from the X electrode and the Y electrode. In the panel driving circuit according to an embodiment of the present invention, the first and second power switches M1 974 and M2 for applying a first sustain voltage Vs for a predetermined period between the X electrode and the Y electrode of the panel 973. 975 are connected to the X and Y electrodes of the panel, respectively, and the third and fourth power switches M3 976 and M4 for applying a second sustain voltage -Vs for a period of time between the X and Y electrodes of the panel. 997 are connected to the X electrode and the Y electrode of the panel, respectively.

In addition, the panel driving circuit according to an embodiment of the present invention is connected to the X electrode and the Y electrode of the panel, respectively, and the first and second inductors L1 986 and L2 for recovering or injecting energy stored in the panel capacitance Cp. 987, wherein first and third capacitors C1 988 and C3 990 are connected between the other end of the first inductor L1 986 and the sustain voltage power supply Vs and ground, respectively, and the second inductor L2 987. The fourth and second capacitors C4 991 and C2 989 are respectively connected between the other end of the circuit) and the sustain voltage power supply Vs and ground.

In the panel driving circuit according to the exemplary embodiment of the present invention, all of the first to fourth capacitors C1 988 to C4 991 are initially charged at a voltage corresponding to half of the sustain voltage power supply Vs in an initial state. .

On the other hand, as shown in FIG. 39, all power switches (a rectifier diode (first rectifier diode 978 to fourth rectifier diode 981) are included in all power switches (first power switch M1 974 to fourth power switch M4 997). Are connected in parallel, but if the body diode is built in the power switch, it may be used or a separate rectifier diode may be connected in parallel. Power switch (first power switch M1 974 to fourth power switch M4 ( There is a parasitic capacitor with inherent capacitance between the drain and the source (or collector and emitter) of 977. In FIG. 39, the first power switch M1 974, the second power switch M2 975, and the third power. First power switch output capacitor 982, second power switch output capacitor 983, third power switch output capacitor 984, fourth as parasitic capacitors of switch M3 976, fourth power switch M4 997 Power switch Power is shown only the capacitor (985).

Hereinafter, a circuit shown in FIG. 39 and a waveform diagram of FIG. 40 will be described.

Before the operation description, it is assumed that the first capacitor 988, the second capacitor 989, the third capacitor 990, and the fourth capacitor 991 are all charged at Vs / 2 which is half of the input voltage.

Mode 0 (~ t ₀ ) is a state in which the third power switch M3 976 and the fourth power switch M4 997 are turned on as the panel voltage holding and inductor current establishing period, and the panel voltage is maintained at -Vs. . At the same time, a voltage of -Vs / 2 is applied across the first inductor L1 986 and the second inductor L2 987 so that the inductor current decreases linearly as shown in Figure 40 with a slope of -Vs / (2L). Up to -I _L (= -I _L1 = -I _L2 ).

Mode 1 (t ₀ to t ₁ ) is the energy recovery and input of the panel. When the third power switch M3 976 and the fourth power switch M4 997 are turned off, the PDP 973 is illustrated in FIG. 40. The panel voltage is charged by the current -I _L1 (= -I _L2 ) established in the first inductor L1 986 and the second inductor L2 987 in mode 0 and inverted from -Vs to Vs. Of course, since the PDP 973 panel equivalent capacitor Cp is charged by the current source, the PDP panel voltage increases linearly with the slope of I _L1 / C _P (= I _L2 / C _P ).

At the same time, the first power switch output capacitor 982 and the second power switch output capacitor 983 have a current flowing from the bottom up to remove the charge stored in the output capacitor, so the voltage drops from Vs to zero voltage, and the third power Since the current flows from the top to the bottom of the switch output capacitor 984 and the fourth power switch output capacitor 985 to charge the output capacitor, the voltage rises from zero voltage to Vs. Here, if the currents of the first inductor L1 986 and the second inductor L2 987 are constant to -I _L (= -I _L1 = -I _L2 ), the voltage of the PDP 973 panel voltage, the points X and Y The PDP panel voltage rise time is approximately expressed as follows.

When the voltage across the PDP panel 973 reaches Vs in the mode 2 (t ₁ to t ₂ ), the current of the inductor flows through the first rectifying diode 978 and the second rectifying diode 979, and thus, the first power switch M1. The voltage across 974 and second power switch M2 975 remains zero, thus enabling zero voltage switching of first power switch M1 974 and second power switch M2 975 in the next mode.

In mode 3 (t ₂ to t ₃ ), the first power switch M1 974 and the second power switch M2 975 are turned on to maintain the voltage across the panel 973 at the input voltage Vs. At the same time, since a voltage of Vs / 2 is applied across both the first inductor L1 986 and the second inductor L2 987, the inductor current has a slope of Vs / (2L) and increases linearly as shown in FIG. I _L (= I _L1 = I _L2 ). Herein, the currents of the first inductor L1 986 and the second inductor L2 987 are expressed by the following equation.

The subsequent operation is repeated by the third power switch M3 (976), the fourth power switch M4 (977) the same operation as in mode 1 to mode 3.

The drive circuit using the full-bridge inverter circuit according to the present invention can drive the PDP sustain voltage by a circuit having a structure that is relatively simple as compared with conventional circuits such as a Webber circuit. Therefore, the cost of the entire PDP circuit can be reduced and the gate driving circuit can be taken in a simple structure. Further, according to the present invention, virtually all power switches can be zero voltage switched. Accordingly, the loss of the entire circuit can be reduced, the efficiency can be increased, and the power consumption can be reduced. As a side effect of this, low noise and low EMI can be achieved to reduce the cost of EMI countermeasures. In addition, the heat loss is reduced, thereby reducing the volume required for the heat sink. In reality, even a structure without a heat sink can be taken. In addition, this reduces noise during operation of the product. In weber circuits, the problem of overcurrent in the input supply caused by insufficient voltage across the panel to Vs is eliminated. Therefore, the method according to the present embodiment is advantageous over the weber circuit in terms of noise and EMI.

In addition, according to the present invention, the maintenance of the sustain voltage across the panel is achieved by always conducting two diodes of the freewheeling diode adjacent to the panel by the inductor current in a current type manner. Further, according to the present invention, since the magnitude of the discharge current can be limited according to the magnitude of the inductor current, a switch having a small current capacity can be used.

The driving circuit using the half-bridge type inverter circuit according to the present invention can enjoy the same effects as the embodiment of the driving circuit using the full bridge type inverter circuit described above. In addition, the driving circuit using the half-bridge type inverter circuit according to the present invention has the additional number of power switches to be used in half compared to the one using the full bridge type circuit. It works.

In addition, according to the present invention, the efficiency and power density of the switching power converter can be increased, and the voltage stress can be reduced.

Claims (39)

In a panel driving circuit connected between an X electrode and a Y electrode and driven from an X electrode and a Y electrode, The panel includes a panel capacitance, The panel drive circuit First and second reflux diodes connected between the X and Y electrodes of the panel and a sustain voltage power supply, respectively; Third and fourth reflux diodes connected between the X electrode and the Y electrode of the panel, respectively; First and second inductors connected to the X and Y electrodes of the panel, respectively, for charging and discharging the panel capacitance; First and fourth power switches connected to the other ends of the first and second inductors, respectively, for applying a first voltage between the other ends of the first and second inductors for a period of time; and Second and third power switches connected to the other ends of the first and second inductors, respectively, for applying a second voltage between the other ends of the first and second inductors for a period of time; Panel driving circuit comprising a. The method of claim 1, And other ends of the first and second power switches are connected to the sustain voltage power supply, and other ends of the third and fourth power switches are grounded. The method of claim 1, The first to fourth power switches further comprise a diode and a capacitor connected in parallel to each switch. In a panel driving circuit connected between an X electrode and a Y electrode and driven from an X electrode and a Y electrode, The panel includes a panel capacitance, The panel drive circuit, A first reflux diode connected between one of the X electrodes and the Y electrodes of the panel and the sustain voltage power supply; A second reflux diode connected between the one electrode of the panel and ground; An inductor connected to the one electrode of the panel to charge and discharge the panel capacitance; A first power switch connected to the other end of the inductor for applying a first voltage to the other end of the inductor; A second power switch connected to the other end of the inductor for applying a second voltage to the other end of the inductor; A first capacitor connected between the other electrode of the panel and a sustain voltage power supply; A second capacitor connected between the other electrode of the panel and ground Panel driving circuit comprising a. The method of claim 4, wherein And the other end of the first power switch is connected to the sustain voltage power supply, and the other end of the second power switch is grounded. The method of claim 4, wherein And a voltage regulator connected to the other electrode of the panel to provide a compensating current to the first and second capacitors so that the voltages of the first and second capacitors are maintained at a specific voltage. In a panel driving circuit connected between an X electrode and a Y electrode and driven from an X electrode and a Y electrode, The panel includes a panel capacitance, The panel drive circuit, A first power switch connected between one of the X electrodes and the Y electrodes of the panel and the sustain voltage power supply; A second power switch connected between the one electrode of the panel and ground; A first capacitor connected between the other electrode of the panel and a sustain voltage power supply; A second capacitor connected between the other electrode of the panel and ground; An inductor connected to the other electrode of the panel, and An auxiliary circuit connected between the other end of the inductor and one electrode of the panel to recover or inject charge charged in the panel capacitance; Panel driving circuit comprising a. The method of claim 7, wherein The auxiliary circuit may include a first auxiliary switch and a first auxiliary diode connected in series with each other, and a second auxiliary switch and a second auxiliary diode connected in series with each other. The method of claim 7, wherein And the first and second power switches further comprise diodes connected in parallel to the first and second power switches, respectively. The method of claim 8, And the first and second auxiliary switches further comprise diodes connected in parallel to the first and second power switches, respectively. The method of claim 7, wherein The auxiliary circuit is a panel driving circuit implemented as a bidirectional switch element. The method of claim 11, The bidirectional switch element includes a first and a second auxiliary switch connected in series with each other. The method of claim 7, wherein And a voltage regulator connected to the other electrode of the panel to provide a compensating current to the first and second capacitors so that the voltages of the first and second capacitors are maintained at a specific voltage. In a panel driving circuit connected between an X electrode and a Y electrode and driven from an X electrode and a Y electrode, The panel includes a panel capacitance, The panel drive circuit, A first power switch connected between one of the X electrodes and the Y electrodes of the panel and a sustain voltage power supply to maintain the voltage between both electrodes of the panel at a first voltage; A second power switch connected between the one electrode of the panel and the ground to maintain a voltage between the two electrodes of the panel at a second voltage; A first capacitor connected between the other electrode of the panel and a sustain voltage power supply; A second capacitor connected between the other electrode of the panel and ground; An inductor connected to the one electrode of the panel to charge and discharge the panel capacitance; A first auxiliary switch connected between the other electrode of the inductor and a sustain voltage power supply to recover energy stored in the panel capacitance, so that the voltage between both electrodes of the panel capacitance becomes the first voltage; and A second auxiliary switch connected between the other end of the inductor and ground to inject energy into the panel capacitance such that a voltage between both electrodes of the panel capacitance becomes the second voltage; Panel driving circuit comprising a. The method of claim 14, The first and second power switches further comprise diodes connected in parallel to the first and second power switches, respectively, wherein the first and second auxiliary switches are connected in parallel to the first and second auxiliary switches, respectively. Panel driving circuit further comprising a diode. The method of claim 14, And a voltage regulator connected to the other electrode of the panel to provide a compensating current to the first and second capacitors so that the voltages of the first and second capacitors are maintained at a specific voltage. In a panel driving circuit connected between an X electrode and a Y electrode and driven from an X electrode and a Y electrode, The panel includes a panel capacitance, The panel drive circuit, First and second power switches connected between one of the X electrodes and the Y electrodes of the panel, and between the sustain voltage power supply and ground; First and second capacitors connected between the other electrode of the panel, the sustain voltage power supply, and ground, respectively; A voltage regulator connected to the other electrode of the panel to control a current flowing through the first and second capacitors, thereby controlling a voltage applied to the first and second capacitors Panel driving circuit comprising a. The method of claim 17, The voltage regulator causes the first and second capacitors to flow a compensating current substantially equal to the charge / discharge current flowing through the first and second capacitors, thereby keeping the voltages of the first and second capacitors constant at all times. Voltage regulator Panel driving circuit comprising a. The method of claim 17, The voltage regulator includes first and second diodes connected between the other electrode of the panel, a sustain voltage power supply, and ground, respectively; An inductor connected to the other electrode of the panel, and First and second switches connected between the other end of the inductor, a sustain voltage power supply, and ground, respectively. Panel driving circuit comprising a. The method of claim 17 or 19, The voltage regulator controls the second switch of the voltage regulator in a pulse width modulation manner when the first power switch is turned on, and the voltage regulator of the voltage regulator in a pulse width modulation manner when the first power switch is turned on. The panel drive circuit which controls the voltage between the X electrode and the Y electrode of the said panel by controlling a 1st switch. A first power supply comprising an input and an output capacitor, for applying an output voltage across the input capacitor to supply power to a load connected in parallel with the output capacitor, A series compensator connected between the input capacitor and the output capacitor, for applying a desired voltage to the load by applying a series compensation voltage to the load Power device comprising a. The method of claim 21, The series compensator is a power supply device implemented as a flyback converter or a buck-boost converter. The method of claim 21, The series compensator includes a capacitor and a switching element connected in series with the input and output capacitors, and by controlling on-off of the switching element, by controlling a voltage applied across the capacitor, a constant voltage is applied to the load. Power devices to ensure that. The method of claim 23, wherein In the on-off control of the switching element, a voltage obtained by subtracting a compensation reference voltage required to maintain a constant voltage applied to the load at the voltage of the capacitor is input to the regulator, and the pulse width modulation to the switching Power supply device applied to the device. In the power supply unit for converting the power of the direct current input voltage applied between the first and second input terminal and output through the first and second output terminal, An input terminal charging unit connected between the first and second input terminals, A transformer having a primary winding having one end connected to the first input terminal, and a secondary side first winding and a second winding insulated from the primary winding and connected in series with each other; A second capacitor and a first switch connected in series with each other between the first input terminal and the other end of the primary winding of the transformer, A second switch connected between the other end of the first switch and the second input terminal; An inductor connected between a connection point of the secondary side first winding and the second winding and the first output terminal, and First and second rectifiers connected between the other side of the secondary side first winding and the second winding and the second output terminal, respectively. Power device comprising a. The method of claim 25, When a predetermined voltage is applied across the primary winding of the transformer, a high voltage is induced to one terminal of the secondary first winding and the second winding of the transformer, The cathode of the first rectifier is connected to the one terminal of the secondary first winding, the anode of the first rectifier is connected to the second output terminal, The cathode of the second rectifier is connected to the other terminal of the secondary second winding, and the anode of the second rectifier is connected to the second output terminal. The method of claim 25, And a output terminal charging unit connected between the first and second output terminals. The method of claim 25, And the second input terminal and the second output terminal are grounded. In a panel driving circuit connected between an X electrode and a Y electrode and driven from an X electrode and a Y electrode, The panel includes a panel capacitance, The drive circuit, First and second power switches connected to an X electrode and a Y electrode, respectively, for applying a first voltage between the X electrode and the Y electrode of the panel for a period of time; Third and fourth power switches connected to an X electrode and a Y electrode, respectively, for applying a second voltage between the X electrode and the Y electrode of the panel for a predetermined period of time; First and second inductors connected to the X and Y electrodes of the panel, respectively, to charge and discharge the panel capacitance; Fifth and fifth terminals connected to the other ends of the first and second inductors to apply a predetermined voltage to the other ends of the first and second inductors so that the voltage between the X and Y electrodes of the panel becomes the first voltage, respectively. 6 power switch, and Seventh and seventh terminals connected to the other ends of the first and second inductors to apply a constant voltage to the other ends of the first and second inductors so that the voltage between the X and Y electrodes of the panel becomes the second voltage 8 power switch Panel driving circuit comprising a. The method of claim 29, The panel driving circuit is connected between first and fourth rectifiers connected between the other ends of the first and second inductors and the fifth to eighth power switches, and between the connection points of the first and fifth rectifiers and the fifth power switch, respectively, to ground. A sixth rectifier connected between a fifth rectifier, a connection point of the second rectifier and the sixth power switch, and a sustain voltage power supply; a seventh rectifier connected between a connection point of the third rectifier and the seventh power switch and a sustain voltage power source; And an eighth rectifier connected between the connection point of the fourth rectifier and the eighth power switch and the ground. The method of claim 30, The other end of the first and fourth power switches is connected to a sustain voltage power supply, the other end of the second and third power switches is grounded, the other end of the fifth and eighth power switches is connected to a sustain voltage power supply, And the other ends of the seventh and eighth power switches are grounded. The method of claim 30, Wherein the first to fourth power switches further comprise diodes and capacitors connected in parallel to each switch, and the fifth to eighth power switches comprise diodes connected in parallel to each switch. In a panel driving circuit connected between an X electrode and a Y electrode and driven from an X electrode and a Y electrode, The panel includes a panel capacitance, First and fourth power switches connected between the X and Y electrodes of the panel and a sustain voltage power supply, respectively; Third and second power switches connected between the X and Y electrodes of the panel and ground, respectively; A fifth power switch, a first inductor, and a first capacitor connected in series with each other between the X electrode and the sustain voltage power supply of the panel, and A sixth power switch, a second inductor, and a second capacitor connected in series between the Y electrode and the sustain voltage power supply of the panel Panel driving circuit comprising a. The method of claim 33, wherein When the second inductor and the first capacitor are short-circuited and the first power switch is opened, the first inductor and the first capacitor may resonate with each other to inject energy into the panel capacitance or to provide the panel capacitance. Recover the energy stored in When the third inductor and the second capacitor are short-circuited and the fourth power switch is opened, the second inductor and the second capacitor may resonate with each other, thereby putting energy into the panel capacitance or storing the panel capacitance. Panel drive circuit for recovering energy. The method of claim 33, wherein Wherein said first through fourth power switches comprise capacitors and diodes connected in parallel to respective switches, and said fifth and sixth power switches comprise diodes connected in parallel to respective switches. The method of claim 33, wherein And the first and second capacitors comprise diodes connected in parallel to the first and second capacitors, respectively. In a panel driving circuit connected between an X electrode and a Y electrode and driven from an X electrode and a Y electrode, The panel includes a panel capacitance, The panel drive circuit, First and second power switches for applying a first voltage to the X and Y electrodes of the panel for a predetermined period of time; Third and fourth power switches configured to apply a second voltage between the X and Y electrodes of the panel for a predetermined period of time; First and second inductors connected to the X and Y electrodes of the panel, respectively, for recovering or inputting energy stored in the panel capacitance; First and third capacitors connected between the other end of the first inductor, a sustain voltage power supply, and ground, respectively; Fourth and second capacitors connected between the other end of the second inductor, a sustain voltage power supply, and ground, respectively; Panel driving circuit comprising a. The method of claim 37, And the first to fourth capacitors are all charged at a voltage substantially equal to half of the sustain voltage power supply in an initial state. The method of claim 37, Wherein said first and fourth power switches further comprise a diode and a capacitor connected in parallel to each switch.