KR20030064045A - Method forming overlay key of semiconductor device - Google Patents

Abstract

PURPOSE: A method for fabricating an overlay key for forming a semiconductor device is provided to decrease the size of a high integrated semiconductor device by forming an overlay key in the same position during consecutive ion implantation processes and by reducing the size of a scribe line. CONSTITUTION: A cell region and a scribe line region are defined in a semiconductor substrate(40). An ion implantation mask pattern is formed in the cell region before a series of ion implantation processes are performed. Overlay keys for inspecting the alignment of a previous process and a present process are formed in the scribe line region. The overlay keys are consecutively formed in the same location in the scribe line region.

Description

Method for forming overlay key for semiconductor device manufacturing

The present invention relates to a method for forming an overlay key for manufacturing a semiconductor device, and more particularly, to a method for forming an overlay key for manufacturing a semiconductor device for inspecting the degree of alignment of a previous process and a current process in a process of continuously performing an ion implantation process. It is about.

In general, a semiconductor substrate in which a DRAM (Dynamic Random Access Memory) is implemented, that is, a wafer, includes an active region in which a semiconductor device is implemented by a process such as local oxidation of silicon (LOCOS) and a field region defining the active region. It is divided into (Field region).

In addition, an ion implantation process is continuously performed on the semiconductor substrate on which the active region and the field region are formed to form an N-field and a P-field by implanting impurities into the semiconductor substrate, and the semiconductor substrate on which the ion implantation process is completed. A process of forming a transistor including a gate electrode and a capacitor on the surface is continuously performed.

In addition, by forming an overlay key on the scribe line of the semiconductor substrate to confirm the correct alignment of the previous process and the current process, the previous process and the current process can be correctly aligned.

1 is a plan view of a semiconductor substrate for manufacturing a general semiconductor device.

Referring to FIG. 1, a plurality of cell regions 10 are provided on a semiconductor substrate, and the cell regions 10 are divided by scribe brine 14.

Here, a semiconductor chip is implemented on the cell region 10, and an overlay key 12 is provided on the scribe brine 14 to check the degree of alignment of the previous process and the current process.

In this case, the cell region 10 and the scribe line 14 are separated from each other by performing a process such as LOCOS (Local oxidation of silicon).

2A to 2D illustrate a method of forming an overlay key for manufacturing a semiconductor device according to the related art, in which an N-field and a P-field are formed by performing ion implantation in a semiconductor substrate before forming a gate electrode on the semiconductor substrate. These are cross-sectional views for explaining.

In the conventional method for forming an overlay key for manufacturing a semiconductor device, as shown in FIG. 2A

A plurality of trenches 22 formed at predetermined intervals are formed on the semiconductor substrate 20 having the cell region and the scribe line region, and the oxide film 24 is formed to a predetermined thickness on the entire surface of the semiconductor substrate 20 by thermal oxidation. (CMP) to form a chemical mechanical polishing (CMP) to leave the oxide film 24 only in the trench 22 to define the active region and the field region.

At this time, the trench 22 provided in the scribe brine area functions as a reference overlay key 23 for confirming the degree of alignment of the subsequent process.

Next, as shown in FIG. 2B, a predetermined first photoresist pattern 26 is formed in a cell region of the semiconductor substrate 20 on which the trench 22 and the reference overlay key 23 are formed, and the semiconductor substrate ( A predetermined first overlay key 28 is formed in the scribe brain area of 20).

Thereafter, the distance between the first overlay key 28 and the reference overlay key 23 is measured to compare the degree of alignment between the current process and the previous process, and the position and size of the first overlay key 28. And the like are stored in a file in the storage of the processing apparatus.

After the first ion implantation process is performed using the first photoresist pattern 26 as a mask, ashing of the first photoresist pattern 26 and the first overlay key 28 is performed. It removes by a process.

Next, as shown in FIG. 2C, another predetermined second photoresist pattern 30 is formed in the cell region of the semiconductor substrate 20 from which the first photoresist pattern 26 and the first overlay key 28 are removed. A second overlay key 32 is formed in the scribe line region of the semiconductor substrate 20.

At this time, the second overlay key 32 is formed at a predetermined interval from the position where the first overlay key 28 is formed.

And, by measuring the separation distance between the second overlay key 32 and the reference overlay key 23, the degree of alignment between the current process and the previous process is compared, and the position and size of the second overlay key 32 And the like are stored in a file in the storage of the processing apparatus.

In addition, after the secondary ion implantation process using the second photoresist pattern 30 as a mask, the second photoresist pattern 30 and the second overlay key 32 by ashing or the like Remove

Lastly, as shown in FIG. 2D, another predetermined third photoresist pattern 34 is applied to the cell region of the semiconductor substrate 20 from which the third photoresist pattern 30 and the second overlay key 32 are removed. The third overlay key 36 is formed in the scribe brain region of the semiconductor substrate 20.

In this case, the third overlay key 36 is formed at a predetermined interval from the position where the second overlay key 32 is formed.

In addition, the distance between the third overlay key 36 and the reference overlay key 23 is measured to compare the degree of alignment between the current process and the previous process, and the position and size of the third overlay key 36. And the like are stored in a file in the storage of the processing apparatus.

In addition, by performing a third ion implantation process using the third photoresist pattern 34 as a mask, the third photoresist pattern 34 and the third overlay key are completed after completing the N-field and the P-field. (36) is removed by processes, such as ashing.

However, according to the conventional method for forming an overlay key for manufacturing a semiconductor device, overlay keys are formed at different positions of the scribe brain region in the process of continuously performing a plurality of ion implantation processes.

Therefore, there is a problem that the size of the highly integrated semiconductor device is increased because the scribe line region for forming the overlay key requires a size larger than an appropriate level.

That is, a first overlay key is formed at a specific position, a second overlay key is formed at another specific position of a position spaced apart from the first overlay key by a predetermined distance, and the second overlay key is formed at a position spaced a predetermined distance apart from the second overlay key. By forming the third overlay key at another specific position, there is a problem that the size of the semiconductor device is increased by requiring the scribe brain region to have a size larger than an appropriate level.

In addition, the first overlay key to the third overlay key is formed at different positions on the scribe brine so that information on the position, size, etc. of the first overlay key to the second overlay key is separately stored in a file in the storage unit of the process apparatus. There was a problem with excessive storage capacity.

An object of the present invention is to provide an overlay key forming method for manufacturing a semiconductor device that can reduce the size of the highly integrated semiconductor device by reducing the size of the scribe line by forming an overlay key at the same point in the continuous ion implantation process. .

Another object of the present invention is to provide an overlay key forming method for manufacturing a semiconductor device capable of reducing the storage capacity of information on the position, size, etc. of the overlay key by forming an overlay key at the same point in a continuous ion implantation process. .

1 is a plan view of a semiconductor substrate for manufacturing a general semiconductor device.

2A to 2D are cross-sectional views illustrating a conventional method for forming an overlay key for manufacturing a semiconductor device.

3A to 3D are cross-sectional views illustrating a method of forming an overlay key for manufacturing a semiconductor device according to an embodiment of the present invention.

※ Explanation of codes for main parts of drawing

10: cell area 12: alignment key

14: scribe brain region 20, 40: semiconductor substrate

22, 42: trench 23, 43: reference overlay key

24, 44: oxide film 26, 46: first photoresist pattern

28, 48: first overlay key 30, 50: second photoresist pattern

32, 52: second overlay key 34, 54: third photoresist pattern

36, 56: 3rd overlay key

In the method of forming an overlay key for manufacturing a semiconductor device according to the present invention for achieving the above objects, an ion implantation mask pattern is formed in the cell region before a series of ion implantation processes are performed on a semiconductor substrate having a cell region and a scribe line region separated therefrom. In the overlay key forming method for manufacturing a semiconductor device for forming an overlay key for inspecting the alignment degree of the previous process and the current process in the scribe line region, the overlay key is continuously formed at the same point of the scribe line region Characterized in that.

In another method of forming an overlay key for manufacturing a semiconductor device according to the present invention, a trench is formed in the cell region of a semiconductor substrate in which a cell region and a scribe brain region are divided, and a trench type reference overlay key is formed in the scribe brain region. step; Filling the trench and the trench type reference overlay key with an oxide film; Forming a first photoresist pattern on the cell region and forming a first overlay key on a predetermined portion of the scribe line region; Inspecting an arrangement degree of the previous process of forming the trench and the trench type reference pattern using the reference pattern and the first overlay key and the current process of forming the first photoresist pattern and the first overlay key; Performing a first ion implantation process using the first photoresist pattern and the first overlay key as a mask; After removing the first photoresist pattern and the first overlay key, a second photoresist pattern is formed in the cell region, and a second overlay key is formed in the scribe line region at the same position where the first overlay key is formed. Forming a; Inspecting an arrangement degree of the previous process of forming the trench and the trench type reference pattern using the reference pattern and the second overlay key and the current process of forming the second photoresist pattern and the second overlay key; And performing a secondary ion implantation process using the second photoresist pattern and the second overlay key as a mask.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3A to 3D illustrate a method of forming an overlay key for a semiconductor device according to the related art, in which an N-field and a P-field are formed by sequentially performing ion implantation in the semiconductor substrate before forming the gate electrode on the semiconductor substrate. These are cross-sectional views for explaining.

In the method for forming an overlay key for manufacturing a semiconductor device according to the present invention, as shown in FIG. 3A, a plurality of trenches 42 spaced a predetermined distance apart are formed on a semiconductor substrate 40 having a cell region and a scribe line region. The oxide film 44 is formed on the entire surface of the semiconductor substrate 40 by a thermal oxidation method or the like to form a CMP, thereby leaving the oxide film 24 inside the trench 42 to define the active region and the field region.

At this time, the trench 42 provided in the scribe brine region functions as a reference overlay key 43 for confirming the degree of alignment of the subsequent process, and the size of the scribe brine region is reduced than before.

Next, as shown in FIG. 3B, a predetermined first photoresist pattern 46 is formed in a cell region of the semiconductor substrate 40 on which the trench 42 and the reference overlay key 43 are formed, and the semiconductor substrate ( A predetermined first overlay key 48 is formed in the scribe brain area of 40).

In this case, the first photoresist pattern 46 and the first overlay key 48 may be formed by coating a photoresist on the entire surface of the semiconductor substrate 40, and then exposing and developing the photoresist.

After the first photoresist pattern 46 and the first overlay key 48 are formed, a gap between the first overlay key 48 of the scribe brain region and the reference overlay key 48 of the scribe brain region is formed. By measuring the distance and the like, the degree of alignment between the current process and the previous process is compared and inspected. Information on the position and size of the first overlay key 48 is stored as a file in a storage unit of the process apparatus.

After the first ion implantation process is performed using the first photoresist pattern 46 as a mask, the first photoresist pattern 46 and the first overlay key 48 are processed by ashing or the like. Remove

Next, as shown in FIG. 3C, another predetermined second photoresist pattern 50 is formed in the cell region of the semiconductor substrate 40 from which the first photoresist pattern 46 and the first overlay key 48 are removed. A second overlay key 52 is formed in the scribe brain region of the semiconductor substrate 40.

In this case, the first photoresist pattern 50 and the first overlay key 52 may be formed by coating the photoresist on the entire surface of the semiconductor substrate 40, and then exposing and developing the second overlay key 52. ) Is formed at a predetermined interval from the position where the first overlay key 48 is formed.

In addition, the distance between the second overlay key 52 of the scribe brain region and the reference overlay key 43 of the scribe brain region is measured to compare the degree of alignment between the current process and the previous process, and the second overlay key Information such as the position, size, and the like of 52 may be omitted by storing the file in the storage unit of the process apparatus by the same as the first overlay key 48.

In addition, after performing the secondary ion implantation process using the second photoresist pattern 50 as a mask, the second photoresist pattern 50 and the second overlay key 52 by ashing or the like process Remove

Finally, as shown in FIG. 3D, another predetermined third photoresist pattern 54 is applied to the cell region of the semiconductor substrate 40 from which the second photoresist pattern 50 and the second overlay key 52 are removed. The third overlay key 56 is formed in the scribe brain region of the semiconductor substrate 40.

In this case, the third photoresist pattern 54 and the third overlay key 56 are formed by coating a photoresist on the entire surface of the semiconductor substrate 40, and then exposing and developing the third overlay key 56. The second overlay key 56 is formed at the formed position.

In addition, the distance between the third overlay key 56 of the scribe brain region and the reference overlay key 43 of the scribe brain region is measured to compare and inspect the alignment of the current process and the previous process, and the third overlay Information such as the position and size of the key 56 is the same as that of the first overlay key 48, so that the storage may be omitted as a file in the storage of the processing apparatus.

In addition, after performing the third ion implantation process using the third photoresist pattern 54 as a mask, the third photoresist pattern 54 and the third overlay key are completed after completing the N-field and the P-field. (56) is removed by a process such as ashing.

According to the present invention, it is possible to reduce the size of the scribe brain region by sequentially forming the overlay key formed on the scribe brain region in the same position in a series of ion implantation process, it is possible to reduce the size of the completed semiconductor device It works.

Since the information on the position, size, etc. of the first overlay key is stored in the storage unit of the process apparatus, the storage of information on the position, size, etc. of the second overlay key and the third overlay key can be omitted. This can reduce the capacity.

Although the present invention has been described in detail only with respect to the described embodiments, it will be apparent to those skilled in the art that various modifications and variations are possible within the technical spirit of the present invention, and such modifications and modifications belong to the appended claims.

Claims (2)

Forming an ion implantation mask pattern in the cell region and inspecting the alignment of the pre-process and the current process in the scribe-brain region before performing a series of ion implantation processes on the semiconductor substrate where the cell region and the scribe brain region are separated. In the overlay key forming method for manufacturing a semiconductor device for forming an overlay key for Forming an overlay key continuously at the same point of the scribe line region. Forming a trench in the cell region of the semiconductor substrate having a cell region and a scribe brain region formed therein, and forming a trench type reference overlay key in the scribe region; Filling the trench and the trench type reference overlay key with an oxide film; Forming a first photoresist pattern on the cell region and forming a first overlay key on a predetermined portion of the scribe line region; Inspecting an arrangement degree of the previous process of forming the trench and the trench type reference pattern using the reference pattern and the first overlay key and the current process of forming the first photoresist pattern and the first overlay key; Performing a first ion implantation process using the first photoresist pattern and the first overlay key as a mask; After removing the first photoresist pattern and the first overlay key, a second photoresist pattern is formed in the cell region, and a second overlay key is formed in the scribe line region at the same position where the first overlay key is formed. Forming a; Inspecting an arrangement degree of the previous process of forming the trench and the trench type reference pattern using the reference pattern and the second overlay key and the current process of forming the second photoresist pattern and the second overlay key; And Performing a second ion implantation process using the second photoresist pattern and the second overlay key as a mask; Overlay key forming method for manufacturing a semiconductor device comprising a.