KR20030058008A - Track system with multi bake unit - Google Patents

Track system with multi bake unit Download PDF

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Publication number
KR20030058008A
KR20030058008A KR1020010088136A KR20010088136A KR20030058008A KR 20030058008 A KR20030058008 A KR 20030058008A KR 1020010088136 A KR1020010088136 A KR 1020010088136A KR 20010088136 A KR20010088136 A KR 20010088136A KR 20030058008 A KR20030058008 A KR 20030058008A
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South Korea
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unit
baking
bake
wafer
units
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KR1020010088136A
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Korean (ko)
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조병호
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주식회사 하이닉스반도체
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Priority to KR1020010088136A priority Critical patent/KR20030058008A/en
Publication of KR20030058008A publication Critical patent/KR20030058008A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H01L21/67225—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process comprising at least one lithography chamber
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67742—Mechanical parts of transfer devices

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE: A track apparatus is provided to be capable of improving CD(Critical Dimension) uniformity of a wafer in bake processing by using multiple bake units. CONSTITUTION: A track apparatus comprises a coating unit(310) for coating a photoresist on a wafer(WF), a developer(320) for developing patterns, and a multiple bake unit(330) for heating the wafer. At this time, the multiple bake unit(330) further includes at least two bake units(330A1-330A3) and inner arms(330B1,330B2). The inner arms(330B1,330B2) are formed between the bake units(330A1-330A3) for moving the wafer(WF). Thereby, the bake processing is sequentially performed according to the number of bake units.

Description

다중 베이크 유닛을 구비한 트랙장치{TRACK SYSTEM WITH MULTI BAKE UNIT}Track system with multiple bake units {TRACK SYSTEM WITH MULTI BAKE UNIT}

본 발명은 반도체 소자의 포토리소그라피 공정시 사용되는 트랙(track) 장치에 관한 것으로, 특히 다중 베이크 유닛(multi bake unit)을 구비한 트랙장치에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a track apparatus used in a photolithography process of a semiconductor device, and more particularly to a track apparatus having a multi bake unit.

일반적으로 반도체 소자를 제조하기 위해서는 다양한 공정을 거치게 되는데, 그 중에서 반도체 웨이퍼 상에 설계된 회로 패턴을 형성시키는 포토리소그라피 공정은 필수적이다. 이러한 포토리소그라피 공정은 웨이퍼 상에 포토레지스트막을 도포하는 단계, 포토레지스트막을 광원에 노출시켜 마스크나 레티클의 패턴을 형성하는 단계, 및 상기 패턴을 현상하는 단계로 이루어지며, 각각의 단계 사이에 웨이퍼를 소정 온도로 가열하는 단계를 수행한다.In general, a semiconductor device goes through various processes, and a photolithography process for forming a circuit pattern designed on a semiconductor wafer is essential. The photolithography process includes applying a photoresist film on a wafer, exposing the photoresist film to a light source to form a pattern of a mask or a reticle, and developing the pattern, and between the steps, Heating to a predetermined temperature is carried out.

이와 같은 포토리소그라피 공정을 수행하기 위하여 도포기, 노광장치, 현상기, 및 베이크 유닛 등이 사용되는데, 최근에는 노광장치를 제외한 도포기, 현상기, 및 베이크 유닛을 한 장소에 밀집시켜 장치간 이동거리와 시간을 줄임으로써 공정의 효율화를 도모한 트랙(track) 장치가 사용되고 있다.In order to perform the photolithography process, an applicator, an exposure apparatus, a developing unit, and a baking unit are used. In recent years, an applicator, a developing unit, and a baking unit other than the exposure apparatus are concentrated in one place to provide a distance between devices. The track apparatus which aimed at the process efficiency by reducing time is used.

이러한 종래의 트랙장치를 도 1을 참조하여 설명한다.This conventional track apparatus will be described with reference to FIG.

도 1에 도시된 바와 같이, 종래의 트랙장치(100)는 포토레지스트막을 웨이퍼(WF) 표면에 도포하는 도포기(110), 트랙장치(100) 외부의 노광장치(200)를 통하여 형성된 패턴을 현상하는 현상기(120), 도포, 노광 및 현상 등의 각각의 단계 사이에서 웨이퍼(WF)를 소정온도로 가열하는 베이크 유닛(130), 각각의 장치간 웨이퍼 이동을 위한 로봇(미도시), 웨이퍼(WF)를 트랙장치 내부에 로딩/언로딩(loading/unloading) 하기 위한 로딩/언로딩부(미도시), 및 트랙장치(100)를 조작 및 제어하기 위한 제어부(140)로 구성된다.As shown in FIG. 1, the conventional track apparatus 100 uses a coater 110 for applying a photoresist film to a surface of a wafer WF, and a pattern formed through an exposure apparatus 200 outside the track apparatus 100. A developing unit 120 for developing, a baking unit 130 for heating the wafer WF to a predetermined temperature between respective stages of application, exposure and development, a robot (not shown) for wafer movement between the devices, and a wafer. And a loading / unloading unit (not shown) for loading / unloading (WF) into the track apparatus, and a controller 140 for manipulating and controlling the track apparatus 100.

즉, 로딩/언로딩부로 투입된 웨이퍼(WF)가 로봇에 의해 베이크 유닛(130)으로 이동되어 프리-베이크(Pre-bake) 단계를 거친 다음, 도포기(110)로 이동되어 웨이퍼 표면에 포토레지스트막이 도포된다. 그 다음, 로봇에 의해 웨이퍼가 다시 베이크 유닛(130)으로 이동되어 소프트-베이크(Soft-bake) 단계를 거친 후, 트랙(100) 외부에 배치된 노광장치로 이송되어 노광단계를 거치고, 다시 베이크 유닛(130)으로 이동되어 노광후 베이크(PEB; Post-Exposure-Bake) 단계를 거친다. 그 다음, 현상기(120)에서 패턴을 현상한 후, 다시 웨이퍼가 베이크 유닛(130)으로 이동되어 하드-베이크(Hard-bake) 단계를 거치게 된다.That is, the wafer WF injected into the loading / unloading unit is moved to the bake unit 130 by a robot, undergoes a pre-bake step, and then is moved to the applicator 110, and the photoresist on the wafer surface. The film is applied. Then, the wafer is moved back to the bake unit 130 by the robot to go through a soft-bake step, then transferred to an exposure apparatus disposed outside the track 100 to undergo an exposure step, and then bake again. It is moved to the unit 130 and undergoes a post-exposure bake (PEB) step. Then, after developing the pattern in the developing unit 120, the wafer is moved to the bake unit 130 again to undergo a hard-bake step.

그러나, 상술한 종래의 트랙장치(100)에서는 단지 2개의 베이크 유닛(130)이 구비되기 때문에, 베이크 유닛(130)의 정확도를 고려할 때 아주 작은 온도차이라도 발생하게 되면, 베이크 유닛(130)을 지나는 2 개의 웨이퍼는 상술한 바와 같은 베이크 단계에서 서로 다른 열적 플로잉(thermal flowing)양을 가지게 됨으로써, 웨이퍼 사이에서 임계치수(Critical Dimension; CD) 차이가 발생하게 되고, 그 결과 반도체 소자의 수율 및 쓰루풋(throughput)이 저하된다.However, in the conventional track apparatus 100 described above, since only two bake units 130 are provided, even if a very small temperature difference occurs in consideration of the accuracy of the bake unit 130, the bake unit 130 passes through the bake unit 130. The two wafers have different amounts of thermal flowing in the baking step as described above, resulting in a critical dimension (CD) difference between the wafers, resulting in yield and throughput of the semiconductor device. (throughput) is reduced.

본 발명은 상기와 같은 종래기술의 문제점을 해결하기 위하여 제안된 것으로, 다중 베이크 유닛을 구비하여 포토리소그라피 공정의 베이크 공정시 웨이퍼 사이의 CD 균일도를 향상시킬 수 있는 트랙장치를 제공하는데 그 목적이 있다.The present invention has been proposed to solve the above problems of the prior art, and has an object to provide a track apparatus having a multi-baking unit to improve the CD uniformity between wafers during the baking process of the photolithography process. .

도 1은 종래의 트랙장치를 나타낸 도면.1 is a view showing a conventional track device.

도 2는 본 발명의 실시예에 따른 다중 베이크 유닛을 구비한 트랙장치를 나타낸 도면.2 shows a track apparatus with multiple bake units according to an embodiment of the invention.

※도면의 주요부분에 대한 부호의 설명※ Explanation of symbols for main parts of drawing

300 : 트랙장치 310 : 도포기300: track device 310: applicator

320 : 현상기 330 : 다중 베이크 유닛320: developer 330: multiple baking unit

330A1∼330A3 : 베이크 유닛330A1 to 330A3: bake unit

330B1, 330B2 : 내부암 340 : 제어부330B1, 330B2: internal arm 340: control unit

400 : 노광장치 WF : 웨이퍼400: exposure apparatus WF: wafer

상기의 기술적 과제를 달성하기 위한 본 발명의 일 측면에 따르면, 상기의 본 발명의 목적은 포토레지스트막을 웨이퍼 표면에 도포하는 도포기; 외부의 노광장치를 통하여 형성된 패턴을 현상하는 현상기; 및 도포, 노광, 현상 등의 각각의 단계 사이에서 상기 웨이퍼를 소정온도로 가열하는 다중 베이크 유닛을 포함하는 트랙장치에 의해 달성될 수 있다.According to an aspect of the present invention for achieving the above technical problem, the object of the present invention is an applicator for applying a photoresist film on the wafer surface; A developer for developing a pattern formed through an external exposure apparatus; And a multi-baking unit for heating the wafer to a predetermined temperature between respective steps of coating, exposing, developing and the like.

바람직하게, 다중 베이크 유닛은 적어도 2개 이상의 베이크 유닛, 및 이들 베이크 유닛 사이에 배치되어 웨이퍼를 다음 베이크 유닛으로 이동하는 내부암을 구비하고, 베이크 유닛 개수만큼 시간을 분해하여 순차적으로 베이크를 수행한다.Preferably, the multi-baking unit has at least two or more baking units and an inner arm disposed between these baking units to move the wafer to the next baking unit, and the baking is performed sequentially by decomposing time by the number of baking units. .

이하, 본 발명이 속한 기술분야에서 통상의 지식을 가진 자가 본 발명을 보다 용이하게 실시할 수 있도록 하기 위하여 본 발명의 바람직한 실시예를 소개하기로 한다.Hereinafter, preferred embodiments of the present invention will be introduced in order to enable those skilled in the art to more easily carry out the present invention.

도 2은 본 발명의 실시예에 따른 다중 베이크 유닛을 구비한 트랙장치를 나타낸 도면이다.2 is a view showing a track apparatus having a multi-baking unit according to an embodiment of the present invention.

도 2에 도시된 바와 같이, 본 발명의 트랙장치(300)는 포토레지스트막을 웨이퍼(WF) 표면에 도포하는 도포기(310), 트랙장치(300) 외부의 노광장치(400)를 통하여 형성된 패턴을 현상하는 현상기(320), 도포, 노광 및 현상 등의 각각의 단계 사이에서 웨이퍼(WF)를 소정온도로 가열하는 다중 베이크 유닛(330), 각각의 장치간 웨이퍼 이동을 위한 로봇(미도시), 웨이퍼(WF)를 트랙장치 내부에 로딩/언로딩하기 위한 로딩/언로딩부(미도시), 및 트랙장치(300)를 조작 및 제어하기 위한 제어부(340)로 구성된다. 여기서, 다중 베이크 유닛(330)은 적어도 2개 이상, 예컨대 3개의 베이크 유닛(330A1, 330A2, 330A3)과, 이들 각각의 베이크 유닛(330A1, 330A2, 330A3) 사이에 배치되어 웨이퍼(WF)를 다음 베이크 유닛으로 바로 이동시키기 위한 내부암(inter arm; 330B1, 330B2)으로 구성된다.As shown in FIG. 2, the track apparatus 300 of the present invention has a pattern formed through an applicator 310 for applying a photoresist film to a surface of a wafer WF, and an exposure apparatus 400 outside the track apparatus 300. A developing unit 320 for developing a wafer, a multi-baking unit 330 for heating the wafer WF to a predetermined temperature between respective stages of application, exposure, and development, and a robot (not shown) for wafer movement between devices. , A loading / unloading unit (not shown) for loading / unloading the wafer WF into the track apparatus, and a controller 340 for operating and controlling the track apparatus 300. Here, the multiple bake units 330 are disposed between at least two or more, for example, three bake units 330A1, 330A2, and 330A3, and their respective bake units 330A1, 330A2, and 330A3 to carry the wafer WF next. It consists of an inter arm (330B1, 330B2) for moving directly to the baking unit.

즉, 로딩/언로딩부로 투입된 웨이퍼(WF)가 로봇에 의해 다중 베이크 유닛(330)으로 이동되어 프리-베이크(Pre-bake) 단계를 거친다. 이때, 다중 베이크 유닛에서는 종래의 하나의 베이크 유닛에서 소정시간 동안 실시하던 베이크 공정을 시간을 분배하여 다단계로 나누어서 각각의 베이크 유닛별로 순차적으로 베이크를 수행하는 것에 의해 프리-베이크 단계를 수행한다. 프리-베이크를 60초 동안 수행하는 경우, 20초씩 나누어서 각각의 베이크 유닛(330A1, 330A2, 330A3)에서 순차적으로 베이크를 수행한다. 그 다음, 웨이퍼(WF)가 도포기(310)로 이동되어 웨이퍼 표면에 포토레지스트막이 도포되고, 로봇에 의해 웨이퍼가 다시 다중 베이크 유닛(330)으로 이동되어 상술한 프리-베이크와 마찬가지로 다단계로 소프트-베이크(Soft-bake) 단계를 거친 후, 트랙(300) 외부에 배치된 노광장치(400)로 이송되어 노광단계를 거치고, 다시 다중 베이크 유닛(330)으로 이동되어 노광후 베이크(PEB; Post-Exposure-Bake) 단계를 거친다. 그 다음, 현상기(320)에서 패턴을 현상한 후, 다시 웨이퍼가 다중 베이크 유닛(330)으로 이동되어 하드-베이크(Hard-bake) 단계를 거치게 된다.That is, the wafer WF introduced into the loading / unloading unit is moved to the multiple bake unit 330 by the robot and goes through a pre-bake step. At this time, in the multi-baking unit, the pre-baking step is performed by dividing the baking process performed for a predetermined time in one conventional baking unit into multiple stages and sequentially performing baking for each baking unit. When the pre-baking is performed for 60 seconds, the baking is sequentially performed in each of the baking units 330A1, 330A2, and 330A3 by dividing by 20 seconds. Then, the wafer WF is moved to the applicator 310 to apply a photoresist film on the surface of the wafer, and the wafer is moved back to the multi-baking unit 330 by a robot so as to be soft in a multi-step manner similar to the pre-baking described above. After the soft-bake step, it is transferred to the exposure apparatus 400 disposed outside the track 300 to undergo an exposure step, and then moved to the multiple bake unit 330 to post-exposure bake (PEB; Post). (Exposure-Bake) step. Then, after developing the pattern in the developing unit 320, the wafer is moved to the multiple bake unit 330 again to undergo a hard-bake step.

이와 같이 상기 실시예에 의하면, 소정 시간동안 하나의 베이크 유닛에서 베이크를 수행하던 종래와는 달리, 시간을 분배하여 다중 베이크 유닛의 각각의 베이크 유닛에서 순차적으로 베이크를 수행하기 때문에, 예컨대 베이크 온도차가 발생하더라도 다단계의 베이크에 의해 열적 플로잉이 평균화될 수 있으므로, 웨이퍼 사이의 CD 균일도가 향상된다. 이에 따라, 열적 플로잉 공정의 안정성과 재현성이 향상될 뿐만 아니라, 소자의 신뢰성 및 쓰루풋이 향상된다.As described above, according to the embodiment, unlike the conventional baking which is performed in one baking unit for a predetermined time, since baking is sequentially performed in each baking unit of the multiple baking units, the baking temperature difference is, for example, Even if it occurs, thermal flow can be averaged by a multi-step bake, thereby improving CD uniformity between wafers. This not only improves the stability and reproducibility of the thermal flow process, but also improves the reliability and throughput of the device.

이상에서 설명한 본 발명은 전술한 실시예 및 첨부된 도면에 의해 한정되는 것이 아니고, 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 여러 가지 치환, 변형 및 변경이 가능하다는 것이 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자에게 있어 명백할 것이다.The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

전술한 본 발명은 포토리소그라피 공정시 사용되는 트랙장치에 다중 베이크 유닛을 구비하여 웨이퍼 사이의 CD 균일도를 향상시킴으로써, 소자의 신뢰성 및 쓰루풋을 향상시킬 수 있다.The present invention as described above includes a multi-baking unit in a track device used in a photolithography process to improve CD uniformity between wafers, thereby improving device reliability and throughput.

Claims (3)

반도체 소자의 포토리소그라피 공정시 사용되는 트랙장치로서,A track apparatus used in a photolithography process of a semiconductor device, 포토레지스트막을 웨이퍼 표면에 도포하는 도포기;An applicator for applying a photoresist film to the wafer surface; 외부의 노광장치를 통하여 형성된 패턴을 현성하는 현상기; 및A developer for generating a pattern formed through an external exposure apparatus; And 상기 도포, 노광, 현상 등의 각각의 단계 사이에서 상기 웨이퍼를 소정온도로 가열하는 다중 베이크 유닛을 포함하는 것을 특징으로 하는 트랙장치.And a multi-baking unit for heating the wafer to a predetermined temperature between the steps of applying, exposing, developing, and the like. 제 1 항에 있어서,The method of claim 1, 상기 다중 베이크 유닛은The multiple bake unit 적어도 2개 이상의 베이크 유닛, 및 이들 베이크 유닛 사이에 배치되어 상기 웨이퍼를 다음 베이크 유닛으로 이동하는 내부암을 구비하는 것을 특징으로 하는 트랙장치.And at least two baking units, and an inner arm disposed between the baking units and moving the wafer to the next baking unit. 제 1 항 또는 제 2 항에 있어서,The method according to claim 1 or 2, 상기 다중 베이크 유닛은 상기 베이크 유닛 개수만큼 시간을 분해하여 순차적으로 베이크를 수행하는 것을 특징으로 하는 트랙장치.The multi-baking unit is a track device, characterized in that to perform the baking sequentially by decomposing the time by the number of the baking unit.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100695231B1 (en) * 2005-11-18 2007-03-14 세메스 주식회사 Apparatus and method for treating a substrate
KR101287736B1 (en) * 2006-02-09 2013-07-23 도쿄엘렉트론가부시키가이샤 Heat treatment unit, heat treatiment method, computer-readable recording medium

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100695231B1 (en) * 2005-11-18 2007-03-14 세메스 주식회사 Apparatus and method for treating a substrate
KR101287736B1 (en) * 2006-02-09 2013-07-23 도쿄엘렉트론가부시키가이샤 Heat treatment unit, heat treatiment method, computer-readable recording medium

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