KR20030051971A - In-situ etch - Google Patents
In-situ etch Download PDFInfo
- Publication number
- KR20030051971A KR20030051971A KR1020010081653A KR20010081653A KR20030051971A KR 20030051971 A KR20030051971 A KR 20030051971A KR 1020010081653 A KR1020010081653 A KR 1020010081653A KR 20010081653 A KR20010081653 A KR 20010081653A KR 20030051971 A KR20030051971 A KR 20030051971A
- Authority
- KR
- South Korea
- Prior art keywords
- etching
- wafer
- etch process
- nitride film
- oxide film
- Prior art date
Links
- 238000011065 in-situ storage Methods 0.000 title claims abstract description 10
- 238000000034 method Methods 0.000 claims abstract description 35
- 150000004767 nitrides Chemical class 0.000 claims abstract description 30
- 238000006243 chemical reaction Methods 0.000 claims abstract description 24
- 238000005530 etching Methods 0.000 claims description 58
- 239000007789 gas Substances 0.000 claims description 19
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 5
- 238000005868 electrolysis reaction Methods 0.000 claims description 3
- 239000002245 particle Substances 0.000 abstract description 4
- 235000012431 wafers Nutrition 0.000 description 39
- 150000001875 compounds Chemical class 0.000 description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229910020177 SiOF Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 239000000376 reactant Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Inorganic Chemistry (AREA)
- Physics & Mathematics (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
본 발명은 웨이퍼에 생성된 막을 식각하는 방법에 관한 것으로, 보다 구체적으로는 웨이퍼를 반응로에 1회 삽입시 2단계 식각공정을 실시할 수 있는 인시츄(in-situ) 식각방법에 관한 것이다.The present invention relates to a method for etching a film formed on a wafer, and more particularly, to an in-situ etching method capable of performing a two-step etching process when a wafer is inserted into a reactor once.
식각이라 함은 회로패턴을 형성시켜 주기 위해 화학물질이나 반응성 가스를 사용하여 필요 없는 부분을 선택적으로 제거하는 공정으로 이러한 패턴형성과정은각 패턴층에 대해 계속적으로 반복된다.Etching is a process of selectively removing unnecessary portions using chemicals or reactive gases to form circuit patterns. The pattern forming process is repeated for each pattern layer continuously.
칩을 생성하기 위해서는 웨이퍼 위에 절연층의 역할을 하는 산화막(SiO2)을 기르고 그 위에 질화막(Si3N4)을 도포한다. 산화막을 기르지 않으면 폭의 조절이 용이하나 웨이퍼 내부에 응력이 생겨 누설전류를 증가시키는 원인이 되기 때문에 산화막을 기르는 것이 일반적이다.To produce a chip, an oxide film (SiO 2 ) serving as an insulating layer is grown on a wafer and a nitride film (Si 3 N 4 ) is coated thereon. If the oxide film is not grown, it is easy to control the width, but it is common to grow the oxide film because it causes stress in the wafer to increase leakage current.
이렇게 형성된 막질은 식각을 통해 패턴형태로 형성되는데 이를 실시하기 위한 식각방법에는, 주로 SF6, CF4, BCl3, Cl2, SiCl2등의 가스를 이용한 식각으로 주로 플라즈마를 이용하여 미세 패턴가공이 용이한 건식식각(dry etch)과, H2SO4, H3PO4, H2O2, HF, HCl, NH4OH 등의 케미칼(chemical)을 이용한 식각으로 미세하지 않은 패턴가공에 용이한 습식식각(wet etch)이 있는데, 반도체 공정에서는 건식식각이 웨이퍼를 더 빠르고 더 정확하게 식각할 수 있다는 이유로 건식식각을 주로 사용하고 있다.The film formed in this way is formed in a pattern form through etching, and the etching method for performing this is mainly etching using a gas such as SF 6 , CF 4 , BCl 3 , Cl 2 , and SiCl 2 . This easy dry etch and etching using chemicals such as H 2 SO 4 , H 3 PO 4 , H 2 O 2 , HF, HCl, NH 4 OH, etc. There is a wet etch, which is commonly used in semiconductor processes because dry etching can etch wafers faster and more accurately.
건식식각은 주로 플라즈마 식각으로 표현되기도 하는데, 이는 가스의 전기 분해(electrical breakdown)에 의해 생성되는 플라즈마를 사용하여 식각하는 것이다.Dry etching is often referred to as plasma etching, which is etched using plasma generated by the electrical breakdown of gas.
일반적으로 식각될 웨이퍼는 석영보우트(quartz boat)에 넣어져 반응로(chamber) 안으로 들어간 다음 반응로가 진공상태로 되고, 이 반응로는 CF4등과 같은 특수가스들이 소량의 산소와 함께 채워지며 이 가스 혼합물에 RF(radiofrequency) 에너지가 인가되어 가스가 플라즈마 상태를 거쳐 라디칼로 바뀌어, 이 라디칼과 웨이퍼의 Si성분이 화학반응을 일으킴으로써 질화막과 산화막에 대한 식각이 이루어진다.In general, the wafer to be etched is placed in a quartz boat, into the chamber, and then the reactor is vacuumed, which is filled with a small amount of special gases such as CF 4 . Radio frequency (RF) energy is applied to the gas mixture to convert the gas into radicals through the plasma state, and the radicals and the Si component of the wafer cause chemical reactions to etch the nitride film and the oxide film.
이에 해당하는 화학 반응식을 간단히 기술하면 다음과 같다.Briefly describing the corresponding chemical reaction equation is as follows.
종래에는 웨이퍼에 형성된 질화막 및 산화막을 식각하는 데 있어서, 반응식 1을 통해 질화막을 식각하는 1단계 식각을 실시한 후에 웨이퍼를 반응로에서 꺼내고 반응로를 진공펌프를 이용하여 진공상태로 만든 다음 다시 반응로에 집어넣어 반응식 2를 통해 산화막을 식각하는 2단계 식각을 실시하였다.Conventionally, in etching a nitride film and an oxide film formed on a wafer, after performing a one-step etching of the nitride film through Reaction Scheme 1, the wafer is taken out of the reactor and the reactor is vacuumed using a vacuum pump, and then the reactor Into the etching step 2 was performed to etch the oxide film through the reaction scheme 2.
그러나, 이러한 종래 방법은 웨이퍼를 반응로에 넣고 꺼내는 작업이 요구되기 때문에 생산성이 저하되고 웨이퍼를 꺼냈을 때 대기에 노출되기 때문에 웨이퍼상에 파티클(particle)이 증가하는 요인이 되었다.However, this conventional method is a factor that increases the particle on the wafer because the productivity is lowered because the operation is required to insert the wafer into the reactor, and exposed to the atmosphere when the wafer is taken out.
따라서, 본 발명은 반응로에 웨이퍼를 1회 삽입시 2단계의 식각을 실시함으로써 생산성 향상과 파티클 감소를 구현할 수 있는 인시츄(in-situ) 식각방법을 제공하는 데에 그 목적이 있다.Accordingly, an object of the present invention is to provide an in-situ etching method capable of improving productivity and reducing particles by performing two-step etching when a wafer is inserted into a reactor once.
도 1은 산화막과 질화막이 형성된 실리콘 웨이퍼의 부분 개략단면도;1 is a partial schematic cross-sectional view of a silicon wafer on which an oxide film and a nitride film are formed;
도 2는 1단계 식각에 의해 질화막이 식각된 모습의 개략단면도;2 is a schematic cross-sectional view of the nitride film is etched by one-step etching;
도 3은 2단계 식각에 의해 산화막이 식각된 모습의 개략단면도; 및3 is a schematic cross-sectional view of the oxide film is etched by a two-step etching; And
도 4는 반응가스가 반응 라디칼로 바뀌고 웨이퍼로 이전되는 일련의 과정에 대한 개략도이다.4 is a schematic diagram of a series of processes in which the reactant gas is converted into reactive radicals and transferred to the wafer.
<도면의 주요부분에 대한 간단한 설명><Brief description of the main parts of the drawing>
1, 11, 21, 31; 웨이퍼 2, 12, 22; 산화막1, 11, 21, 31; Wafers 2, 12, 22; Oxide film
3, 13, 23; 질화막 4, 14, 24; 포토레지스터3, 13, 23; Nitride films 4, 14, 24; Photoresistor
상술한 본 발명의 목적을 이루기 위해, 본 발명은 질화막과 산화막이 형성된 웨이퍼에 C4F8및 C5F8로 형성된 가스그룹으로부터 선택가능한 가스로부터 얻어진 라디칼, CF3 *, CF2 *, CF*를 통해 1/8 Si3N4+ CF3 *+ 1/2 O2→3/8 SiF4↑+ 1/2 NF3↑+ CO ↑의 화학반응을 거쳐 이루어지는 질화막의 초기 식각 및 1/12 Si3N4+ CF2 *→1/4 SiF4↑+ 1/3 NF3↑+ C ↓의 화학반응을 거쳐 이루어지는 질화막의 종기 식각을 포함하는 1단계 식각과, 1/4 SiO2+ CF*→1/4 SiF4↑+ 1/2 CO ↑+ 1/2 C ↓의 화학반응을 거쳐 이루어지는 산화막의 식각인 2단계 식각을 포함하며, 1단계 식각과 2단계 식각은 연이어 일어나는 것을 특징으로 하는 인시츄 식각방법을 제공한다.In order to achieve the above object of the present invention, the present invention provides a radical, CF 3 * , CF 2 * , CF obtained from a gas selectable from a gas group formed of C 4 F 8 and C 5 F 8 on a wafer on which a nitride film and an oxide film are formed. * Through 1/8 Si 3 N 4 + CF 3 * + 1/2 O 2 → 3/8 SiF 4 ↑ + 1/2 NF 3 ↑ + CO ↑ Initial etching of the nitride film and 1 / 12 Si 3 N 4 + CF 2 * → 1/4 SiF 4 ↑ + 1/3 NF 3 ↑ + C One-step etching including end etching of nitride film through chemical reaction, and 1/4 SiO 2 + CF * → 1/4 SiF 4 ↑ + 1/2 CO ↑ + 1/2 C ↓ includes two-step etching, which is the etching of the oxide film through chemical reaction, and the first-step etching and the second-step etching An in-situ etching method is provided.
본 발명의 인스슈 식각방법은 1단계 식각과 2단계 식각이 동일 반응로에서 실시되는 것을 특징으로 한다.The etching method of the present invention is characterized in that the one-step etching and the two-step etching are performed in the same reactor.
또한, 본 발명의 인스슈 식각방법은 CF3 *, CF2 *, CF*라디칼이 C4F8및 C5F8로 형성된 가스그룹으로부터 선택가능한 가스들의 전기분해를 통해 플라즈마 상태를 거쳐 생성되는 것을 특징으로 한다.In addition, the method for etching etching of the present invention is generated through the plasma state through the electrolysis of gases selectable from the gas group CF 3 * , CF 2 * , CF * radicals formed of C 4 F 8 and C 5 F 8 It is characterized by.
이하, 첨부된 도면을 참조로 본 발명의 인시츄(in-situ) 식각방법에 대해 설명한다.Hereinafter, an in-situ etching method of the present invention will be described with reference to the accompanying drawings.
도 1은 산화막과 질화막이 형성된 실리콘 웨이퍼의 부분 개략단면도이다. 도 2는 1단계 식각에 의해 질화막이 식각된 모습의 개략단면도이다. 도 3은 2단계 식각에 의해 산화막이 식각된 모습의 개략단면도이다. 마지막으로 도 4는 반응가스가 반응 라디칼로 바뀌고 웨이퍼로 이전되는 일련의 과정에 대한 개략도이다.1 is a partial schematic cross-sectional view of a silicon wafer on which an oxide film and a nitride film are formed. 2 is a schematic cross-sectional view of the nitride film is etched by one-step etching. 3 is a schematic cross-sectional view of an oxide film etched by a two-step etching. Finally, FIG. 4 is a schematic diagram of a series of processes in which the reactant gas is converted into reactive radicals and transferred to the wafer.
도 1에 도시된 바와 같이, 웨이퍼(1)에 위에는 절연층을 형성하기 위한 산화막(2)이 형성되고, 그 위에 질화막(3)이 형성된다.As shown in FIG. 1, an oxide film 2 for forming an insulating layer is formed on the wafer 1, and a nitride film 3 is formed thereon.
이러한 웨이퍼(1)는 반응로에 넣어져 질화막(3)을 식각하는 1단계 식각 및 산화막(2)을 식각하는 2단계 식각이 이루어지게 되는데 이를 도 2 내지 도 4를 참조로 설명한다.The wafer 1 is placed in a reaction furnace to perform one-step etching for etching the nitride film 3 and two-step etching for etching the oxide film 2, which will be described with reference to FIGS. 2 to 4.
질화막 및 산화막을 식각하기 위해서는 Cl2, F화합물, Br화합물 등이 사용되는 데 본 발명에서는 F화합물을 사용한다. 식각을 빠르게 하기 위해서는 화학반응이 빨리 일어나야 하기 때문에 많은 F화합물이 요구된다. 이를 위해서 본 발명에서는 C4F8/ C5F8가스를 전기분해하여 여러종류의 F화합물을 생성함으로써 여러가지의 화학반응이 다량으로 일어나도록 한다. 여러종류의 F화합물을 생성하는 과정은 하기의 도 4를 참조로 자세히 설명하고, 여기서는 도 2 및 도 3을 참조로 질화막과 산화막의 식각에 대해 설명한다.In order to etch the nitride film and the oxide film, Cl 2 , F compound, Br compound and the like are used, but the F compound is used in the present invention. Many F compounds are required because chemical reactions must occur quickly to speed etching. To this end, in the present invention, various chemical reactions occur in a large amount by electrolyzing C 4 F 8 / C 5 F 8 gas to produce various kinds of F compounds. A process of generating various kinds of F compounds will be described in detail with reference to FIG. 4 below. Here, the etching of the nitride film and the oxide film will be described with reference to FIGS. 2 and 3.
도 1의 형태를 갖는 웨이퍼(1)는, 도 2와 같이, 1단계 식각을 통해 웨이퍼(11)상에 형성된 질화막(13)이 식각된다.In the wafer 1 having the form of FIG. 1, the nitride film 13 formed on the wafer 11 is etched through one-step etching, as shown in FIG. 2.
질화막(13)이 식각되는 과정은 다음과 같은 화학 반응식으로 표현된다.The process of etching the nitride film 13 is represented by the following chemical reaction formula.
반응식 중에서 상첨자 *를 갖는 것은 라디칼을 의미하고, 화살표 ↑는 웨이퍼(11)에서 탈락되며, 화살표 ↓는 웨이퍼(11)에 침적되는 것을 나타낸다.In the scheme, having a superscript * means radical, arrow ↑ is dropped from the wafer 11, and arrow ↓ indicates to be deposited on the wafer 11.
반응식 4는 질화막(13)에 대해 F화합물이 낮은 선택비를 갖는 것으로 1단계 식각의 초기 단계를 구현하고, 반응식 5는 질화막(13)에 대해 F화합물이 높은 선택비를 갖는 것으로 1단계 식각의 종기 단계를 구현한다.Scheme 4 has a low selectivity for the F compound with respect to the nitride film 13 to implement the initial stage of one-step etching, and Scheme 5 has a selectivity for the F compound with a high selectivity for the nitride film 13 Implement the boil step.
이렇게 1단계의 식각을 거친 웨이퍼(11)는, 도 3과 같이, 동일 반응로 내에서 산화막(22)을 식각하는 2단계 식각이 실시된다. 그 과정은 다음과 같은 화학 반응식을 통해 이루어진다.Thus, the wafer 11 which has undergone one step etching is subjected to two step etching in which the oxide film 22 is etched in the same reaction furnace as shown in FIG. 3. The process is accomplished through the following chemical reactions.
상술한 반응식에 대한 각 부호들은 반응식 4 및 반응식 5에 대한 상술한 설명과 동일하다. 상술한 화학반응을 통해 웨이퍼(21)상의 산화막(22)이 식각된다.Each symbol for the above-described reaction scheme is the same as that described above for the reaction schemes 4 and 5. Through the above chemical reaction, the oxide film 22 on the wafer 21 is etched.
반응식 4 내지 반응식 6을 통해 웨이퍼에서 분리되는 가스들은 반응로와 연결된 진공펌프에 의해 제거된다.Gases separated from the wafer through Schemes 4 through 6 are removed by a vacuum pump connected to the reactor.
이렇게 하여 웨이퍼를 반응로에 1회 집어 넣고서 질화막과 산화막을 식각하는 두가지 단계의 식각공정이 이루어지게 된다.In this way, the wafer is put into the reactor once and a two-step etching process is performed to etch the nitride film and the oxide film.
이로 인해, 종래 각각의 막을 식각하기 위해 각 단계마다 반응로에서 웨이퍼를 꺼내고 다시 넣는 작업을 할 필요가 없게 되어 생산성이 향상되고, 웨이퍼가 대기에 노출되는 시간이 줄어들어 파티클(particle)을 줄일 수 있다.This eliminates the need to remove and reinsert the wafer from the reactor in each step to etch each film conventionally, thereby improving productivity and reducing particles by reducing the time the wafer is exposed to the atmosphere. .
다음 도 4를 참조로 본 발명에서 필요한 다량의 F화합물을 생성하는 과정에 대해 설명한다.Next, a process of generating a large amount of F compound required in the present invention will be described with reference to FIG. 4.
도면의 좌측에 보이는 페어런가스(parent gas)인 C4F8또는 C5F8에 RF(radio frequency) 전력이 가해져 전기분해를 일으켜 플라즈마 상태가 된 후 여러종류의 라디칼(radical)들로 분해된다.RF (radio frequency) power is applied to C 4 F 8 or C 5 F 8 , the parent gas shown on the left side of the drawing, to cause electrolysis to decompose into various kinds of radicals. do.
이렇게 분해된 라디칼로는 CF3 *, CF2 *, CF*가 존재한다. 이들은 모두 F기를 포함하고 있는 F화합물로 질화막과 산화막에 있는 규소(실리콘; Si)성분과 반응하여 SiF4를 공통적으로 생성하면서 식각이 이루어지게 된다.The radicals thus decomposed include CF 3 * , CF 2 * , and CF * . These are all F compounds containing F groups, and react with silicon (Si) components in the nitride film and the oxide film to produce SiF 4 in common, thereby performing etching.
도면의 우측에 보이는 웨이퍼(31)쪽으로 가는 화살표들은 각 라디칼들이 웨이퍼(31)와 반응하는 것을 나타내며, 웨이퍼(31)로부터 나오는 화살표들은 반응후 웨이퍼(31)로부터 탈락되는 상태를 나타낸다. 또한, 웨이퍼(31)의 표면에 작은 원안에 표시된 C는 탄소가 웨이퍼(31) 표면에 침적됨을 나타낸다.Arrows toward the wafer 31 shown on the right side of the figure indicate that each radical reacts with the wafer 31, and the arrows coming out of the wafer 31 indicate that the reaction is dropped from the wafer 31 after the reaction. Further, C indicated in a small circle on the surface of the wafer 31 indicates that carbon is deposited on the surface of the wafer 31.
이상 본 발명을 바람직한 실시예를 참고로 설명하였지만, 본 발명의 취지를 벗어나지 않는 범위 내에서 다양한 변형 실시예들이 가능하다.While the present invention has been described with reference to preferred embodiments, various modifications are possible without departing from the spirit of the invention.
본 발명의 인시츄 식각방법에 따르면, 웨이퍼를 반응로에 1회 삽입하여 2단계를 식각, 즉 질화막 식각과 산화막 식각을 실시할 수 있기 때문에 생산성이 향상되고 웨이퍼의 대기 노출시간을 줄일 수 있어 파티클을 줄일 수 있다.According to the in situ etching method of the present invention, since the wafer is inserted into the reactor once to perform two steps of etching, that is, nitride etching and oxide etching, the productivity is improved and the atmospheric exposure time of the wafer can be reduced. Can be reduced.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020010081653A KR20030051971A (en) | 2001-12-20 | 2001-12-20 | In-situ etch |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020010081653A KR20030051971A (en) | 2001-12-20 | 2001-12-20 | In-situ etch |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20030051971A true KR20030051971A (en) | 2003-06-26 |
Family
ID=29576720
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020010081653A KR20030051971A (en) | 2001-12-20 | 2001-12-20 | In-situ etch |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR20030051971A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102081619B1 (en) | 2019-01-16 | 2020-02-26 | 주식회사 씨에스와이 | Surface treatment of dental fixture using in-situ process |
-
2001
- 2001-12-20 KR KR1020010081653A patent/KR20030051971A/en not_active Application Discontinuation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102081619B1 (en) | 2019-01-16 | 2020-02-26 | 주식회사 씨에스와이 | Surface treatment of dental fixture using in-situ process |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP3038142A1 (en) | Selective nitride etch | |
| US7098141B1 (en) | Use of silicon containing gas for CD and profile feature enhancements of gate and shallow trench structures | |
| US7510976B2 (en) | Dielectric plasma etch process with in-situ amorphous carbon mask with improved critical dimension and etch selectivity | |
| WO2012154429A2 (en) | Methods of dry stripping boron-carbon films | |
| JP5823160B2 (en) | Deposit removal method | |
| WO2008073906A2 (en) | Dry photoresist stripping process and apparatus | |
| US9177816B2 (en) | Deposit removal method | |
| JP2626913B2 (en) | Silicon surface treatment method | |
| JPH03261138A (en) | Method and apparatus for cleaning semiconductor | |
| US5514621A (en) | Method of etching polysilicon using a thin oxide mask formed on the polysilicon while doping | |
| JP2002261081A (en) | Semiconductor wafer etcher and etching method | |
| TWI806871B (en) | Porous low-k dielectric etch | |
| WO2003056617A1 (en) | Etching method and plasma etching device | |
| CN112635317A (en) | Etching method, method for removing damaged layer, and storage medium | |
| KR100549204B1 (en) | Method for anisotropically etching silicon | |
| JPH11214356A (en) | Dry etching method of silicon board | |
| TWI495009B (en) | A Plasma Etching Method with Silicon Insulating Layer | |
| KR20030051971A (en) | In-situ etch | |
| KR101711647B1 (en) | Method for dielectric material removal between conductive lines | |
| KR100373460B1 (en) | Dry etching process for the high Efficient SiC devices | |
| KR100271763B1 (en) | Apparatus and method for etching polysilicon layer | |
| KR960006171B1 (en) | Method of eliminating chlorocarbon polymer | |
| JPH0722391A (en) | Dry etching method | |
| JPH06181190A (en) | Fabrication of semiconductor device | |
| CN117055310A (en) | Method for removing photoresist |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| WITN | Withdrawal due to no request for examination |