KR20030049364A - Qpsk receiver - Google Patents

Abstract

PURPOSE: A QPSK receiver is provided to obtain an improved band margin and improve a frequency characteristic by applying a baseband interpolator to the QPSK receiver and forming a symbol recovery loop of a short block. CONSTITUTION: A delay/Hilbert filter(302) receives a complex signal from an A/D converter(301) and generates an I and a Q signal. A complex multiplier(303) is used for demodulating the I and the Q signals by using a tone signal received from a carrier recovery portion(306). A baseband interpolator(304) receives the I and the Q signals from the complex multiplier and interpolates a sample by using an offset value received from a mask flag generator(308). An SQRC filter(305) is used for filtering the interpolated I and Q signals. A timing recovery portion(307) detects and accumulates timing errors to generate a DC offset. The mask flag generator is used for generating a mask flag for a timing offset value and a mask clock.

Description

GPPS receiver {QPSK RECEIVER}

The present invention relates to a design technique of a QPSK receiver using a baseband interpolator, and in particular, it is possible to prevent distortion of a signal due to passband interpolation and to improve performance of a system that is degraded by a long symbol recovery loop. So it relates to one QPSK receiver.

Currently, the OpenCable standard adopts the QPSK method as a transmission / reception method used for out-of-band (OOB) in a cable system. Transmission and reception of various control signals for cable broadcasting is performed based on the QPSK method, and the spec is specified in the open cable standard.

The QPSK modulated control signal has three data rates of 1.544 Mbps, 3.088 Mbps (DVS167) and 2.048 Mbps (DVS178). It is standardized to have an RF tuning range of 130MHz. Also, -15 The RF input signal with + 15dBmV intensity should be able to be received and the frequency tracking range should be over +/- 50ppm. In addition, some additional functionality is required for accurate interpretation of cable system control signals.

1 shows a QPSK receiver according to the prior art. The input signal (2nd IF) modulated in the general manner of the QPSK receiver is transmitted to the mixers 101 and 102, and the mixers 101 and 102 demodulate the input signal into a cos, sin signal through a carrier regenerator. Processing separates the signal for the video channel I and the signal for the quadrature channel Q.

Subsequently, low-pass filters the signals output from the mixers 101 and 102 to separate the signals in the baseband through the low pass filters 103 and 104, and then the limiters 105 and 106 and The multiplexer 107 performs demodulation by switching and combining the signals of the I and Q channels.

However, since the QPSK receiver has a structure for demodulating by simply multiplying a reproduced carrier tone signal and a modulated input signal, a low pass filter must be provided at the stage next to the mixer. Such added filter causes noise to be added and SNR attenuation of the signal, resulting in deterioration of system performance and complexity of hardware configuration. In addition, since the conventional symbol recovery structure can support only one type of transmission rate, there is a defect that cannot be applied to a demodulator of a transmission / reception system having multiple transmission rates.

Another conventional QPSK receiver for solving such a defect is shown in FIG. 2. In the QPSK receiver of FIG. 2, a delay / hilbert filter is used to prevent performance degradation caused by the mixers 101, 102 and the low pass filters 103, 104 of the QPSK receiver shown in FIG. 1. 203 and complex multiplier 204 are used.

In such a structure, it is not necessary to use a low pass filter because aliasing of an information signal by an image can be effectively removed from the demodulated signal. In addition, since the passband interpolator 202 is used, it is also useful as a demodulator of a transmission / reception system having various data rates.

However, in the conventional QPSK receiver, the signal is interpolated in the passband, and the frequency characteristic of the interpolator output signal is considerably worsened due to the lack of the band margin of the input signal. The symbol recovery convergence is delayed due to the increase in the length), and the timing recovery performance is degraded due to the addition of the noise component caused in the long symbol loop, and for this reason, the receiver performance is degraded.

Accordingly, it is an object of the present invention to improve the band margin of a signal and to shorten the long symbol recovery loop in the passband to improve the demodulation convergence performance. Band)) for providing a QPSK receiver.

1 is a block diagram of a QPSK receiver according to the prior art.

2 is a block diagram of another QPSK receiver in the prior art;

3 is a block diagram of a QPSK receiver in accordance with the present invention.

4 is a detailed block diagram of the delay / hilbert filter in FIG.

FIG. 5 is a detailed block diagram of the complex multiplier in FIG. 3. FIG.

FIG. 6 is a detailed block diagram of the SQRC filter in FIG. 3. FIG.

FIG. 7 is a detailed block diagram of a mask flag generator in FIG. 3. FIG.

8 is a detailed block diagram of the timing recoverer of FIG.

9A is an input / output spectrum diagram of a passband interpolator in the frequency domain.

9B is an input / output spectrum diagram of a baseband interpolator in the frequency domain.

10 is a table showing optimized coefficients of a second order 8-tap interpolator.

11A illustrates a baseband interpolator implemented in a Farrow method.

11B is an illustration of a typical H filter.

11C is an illustration of an H filter in the case of a second order 8 tap.

12 is a graph showing the frequency characteristics of a second order Farrow interpolator in the baseband.

13 is a detailed block diagram of the carrier restorer in FIG.

*** Description of the symbols for the main parts of the drawings ***

301: A / D converter 302: Delay / Hilbert filter

303: complex multiplier 304: baseband interpolator

305: SQRC filter 306: carrier restorer

307: timing restorer 308: mask flag generator

309: baseband automatic gain regulator

310: upsampler

3 is a block diagram showing an embodiment of a QPSK receiver according to the present invention. As shown in FIG. A D converter 301; A delay / hilbert filter (302) for generating I, Q signals from the composite signal input from the A / D converter (301); A complex multiplier 303 for demodulating the I and Q signals using tone signals (cos, sin) input from a carrier recoverer 306 through an upsampler 310; A baseband interpolator (304) for receiving I, Q signals from the complex multiplier (303) at a baseband and interpolating samples at a new position using offset values input from a mask flag generator (308); An SQRC filter (305) for filtering intersymbol interference by filtering I, Q signals interpolated by the baseband interpolator (304); A carrier reconstructor (306) for receiving baseband I and Q signals from the SQRC filter (305) to compensate for a broken phase of a carrier and to perform frequency tracking for frequency locking; A timing decompressor 307 for receiving a baseband I, Q signal from the SQRC filter 305 to detect a timing error and accumulating the error to generate a DC offset; A mask flag generator (308) for receiving an output signal of the timing recoverer (307) to find a correct sample position and generating a mask flag for a timing offset value and a mask clock; The baseband automatic gain regulator 309 receives the baseband I and Q signals from the SQRC filter 305 and adjusts the gains of the intermediate frequency signal IF and the radio frequency signal RF. When described in detail with reference to Figures 4 to 13 attached to the operation of the present invention.

The intermediate frequency modulated signal IF is converted into a digital signal by the A / D converter 301. At this time, although the order is different, the sampling frequency of the input symbol is converted using an interpolator, and a sample of a new position is generated in a direction of reducing a timing error with the actual sample position. The A / D converter 301 subsamples the modulated signal IF of a predetermined frequency (for example, 44 MHz) to a predetermined frequency (for example, 14 MHz), and thus modulates the modulated signal IF of a specific frequency (for example, 2nd IF), the analog device for the conversion can be omitted.

The delay / hilbert filter 302 generates I, Q signals from the complex signal input from the A / D converter 301 (see FIG. 4), and the complex multiplier 303 generates an upsampler 310. The I and Q signals are demodulated as shown in FIG. 5 by using tone signals (cos, sin) input from the carrier recoverer 306.

SQRC filter 305 is used to reduce the intersymbol interference (Intersymbol Interference), Figure 6 shows an example implemented in the FIR structure.

The mask flag generator (Interpolator NCO) 308 receives the output signal of the timing reconstructor 307 to find the correct sample position, and generates a timing offset value and a mask flag for the mask clock. This mask flag contains the position information of the sample to be removed due to the low sampling frequency of the output to the baseband interpolator 304 input and is for generating a mask clock in association with the system clock of the receiver. The function of the mask flag generator 308 is represented by Equation 1 below with respect to the timing error, and is implemented as shown in FIG.

here, Is the maximum integer that does not exceed x.

The timing error and DC offset for the mask flag generator 308 are supplied from a timing recoverer 307, which is an embodiment of this timing recoverer 307. The DC offset is a value corresponding to the ratio of the input / output frequency of the baseband interpolator 304, and this value is added to the output of the timing loop filter 801 and provided to the input of the mask flag generator 308. The timing loop filter 801 generates an error offset by accumulating an error of a signal detected by the timing error detector 802. The timing error detector 802 is implemented by a Gardner method, which is represented by Equation 2 below.

The baseband interpolator 304 interpolates the sample at the new position based on the input offset value. For reference, in the conventional QPSK receiver, since the interpolator operates in the passband, the characteristics of the output frequency are limited according to the maximum frequency of the input signal. That is, as the frequency band of the input signal is larger, the band margin for the image of the output signal is significantly reduced. Since the interpolation is performed in the direction of reducing the sample rate, the maximum frequency of the input signal of the interpolator is changed to the increased signal at the output, and thus the maximum frequency of the input signal of the interpolator is changed to the increased signal at the output. It results in worsening frequency characteristics.

FIG. 9A illustrates the input / output spectrum of the passband interpolator in the frequency domain. As shown here, the input band margin is small, and the output of the interpolator shows that the image signal and aliasing next to each other occur. In contrast, it can be seen that the aliasing does not occur in the baseband interpolator 304 as shown in FIG. Because the baseband receives its input, its maximum frequency is half of the signal band and is provided to the input of the baseband interpolator 304 with sufficient band margin. This improves the frequency characteristics of the baseband interpolator 304 and improves the overall performance of the receiver.

In addition, unlike the passband interpolator, the baseband interpolator 304 is optimized in a specific order and the number of taps, thereby reducing the size of the entire system. The baseband interpolator 304 has coefficients with a constant regularity without degrading its performance at the second even tap. FIG. 10 shows the optimized coefficients of the second eight tap interpolator.

FIG. 11A illustrates an embodiment of the baseband interpolator 304, which is comprised of filters H0, H1, H2 and a U _k multiplier. Referring to the numerical values of FIG. 10, it can be seen that the filter coefficients of the FIR structures of H1 and H2 are the same in pairs in both directions. In this case, as shown in FIG. 11C, the number of constant multipliers used as the H filter can be reduced by half, so that the baseband interpolator 304 can be more simply implemented. Therefore, frequency characteristics can be improved by interpolating signals using baseband demodulation, and chip area and power consumption can be reduced. The coefficient of the baseband interpolator 304 is obtained through an algorithm for minimizing an error represented by Equation 3 below.

The frequency characteristics of the baseband interpolator 304 having the coefficients of the quadratic 4,6,8,10 taps thus obtained are 0.3 (3) in the baseband regardless of the 4,6,8,10 taps, as shown in FIG. It can be seen that it is almost flat in the band below 2MHz). Since the bandwidth of the input signal required by the open cable standard is up to 2MHz, it is 1MHz when viewed from the baseband. Accordingly, the baseband interpolator 304 may be implemented in a simple structure without degrading performance even though it is a secondary.

The baseband interpolator 304 is interlocked with the timing recoverer 307 and reduces the error with the actual sample by using the offset information input through the mask flag generator 308. The mask flag generator 308 calculates a timing offset value from a timing error signal.

The symbol recovery loop in conjunction with this timing is formed considerably longer in the passband interpolation receiver as described above. In this case, the symbol recovery convergence time is long and the symbol characteristics are deteriorated due to the noise error applied to each block in the loop LOOP1. In contrast, since the symbol recovery loop LOOP2 according to the present invention is formed short, the performance of the receiver can be further improved.

Meanwhile, the baseband signals I and Q output from the SQRC filter 305 are provided to the carrier decompressor 306, and an embodiment of the carrier decompressor 306 is illustrated in FIG. 13. The carrier decompressor 306 is composed of a phase derotator 1301 for compensating for a broken phase of a carrier and a frequency tracking 1302 for frequency locking.

The derotator 1301A generates a restored carrier output (I, Q), which is fed back through the slicer 1301B and then compared with the output of the SQRC filter 305 to minimize the error. Converge.

In addition, in order to lock the frequency in the frequency tracking unit 1302, the frequency locking detector 1302A detects the locking of the frequency, and the gear shifter 1302B automatically adjusts the frequency tracking bandwidth, and the frequency loop filter 1302C. ) Accumulates a frequency error and outputs an offset value, and the NCO 1302D generates a tone signal having a frequency tracked by the frequency error.

As described in detail above, the present invention improves frequency characteristics by applying a baseband interpolator to a QPSK receiver and implementing a symbol recovery loop of shorter intervals, thereby improving band margin compared to the case of applying a passband interpolator. Optimized coefficients can be obtained, reducing the footprint.

Claims (6)

A delay / hilbert filter 302 for generating I, Q signals from the composite signal input through the A / D converter 301; A complex multiplier (303) for demodulating the I, Q signals using tone signals (cos, sin) input from a carrier recoverer (306) side; A baseband interpolator 304 for receiving I, Q signals output from the complex multiplier 303 from a baseband and interpolating samples at a new position using an offset value input from a mask flag generator 308; ; An SQRC filter (305) for filtering intersymbol interference by filtering I, Q signals interpolated by the baseband interpolator (304); A timing decompressor 307 for receiving a baseband I, Q signal from the SQRC filter 305 to detect a timing error and accumulating the error to generate a DC offset; And a mask flag generator (308) configured to receive an output signal of the timing recoverer (307) to generate a timing offset value and a mask flag for a mask clock to find an accurate sample position. 2. The QPSK receiver of claim 1, wherein the baseband interpolator (304) is configured to be optimized at a particular order and number of taps. The QPSK receiver according to claim 1, wherein the coefficient of the baseband interpolator (304) is obtained by the following equation. The QPSK receiver according to claim 1, wherein the DC offset is a value corresponding to a ratio of input / output frequencies of the baseband interpolator (304). The timing recovery device (307) of claim 1, further comprising: the timing loop filter (801) for accumulating errors in signals detected by the timing error detector (802) to generate an error offset; And a timing error detector (802) for detecting timing errors in a Gardner manner. 2. The system of claim 1, wherein the mask flag generator 308 generates a mask flag containing the position information of the sample to be removed due to the low sampling frequency of the output relative to the baseband interpolator 304 input. And generate a mask clock in association with the clock.