KR20030047087A - Multi-layer pcb manufacturing method and package manufacturing method using the pcb - Google Patents

Abstract

PURPOSE: A method is provided to fabricate a multi-layer board simply without affecting a bonding part and a circuit pattern. CONSTITUTION: An opening part is formed on an insulation substrate on which a copper film(2) is coated. An inner wiring(4) is formed by forming and patterning a copper-coated film on the copper film. A stack body(12) is made such that a cavity(11) having an opened top is formed, by inserting and attaching an inside substrate(5) between an upper substrate(8) and a lower substrate(9). A high polymer organic substance is filled in the cavity of the stack body so that a pad copper film part is protected by the high polymer organic substance. A penetration hole is formed at the stack body to be penetrated in a vertical direction. An outer wire is formed on the upper and lower substrates by forming and patterning a copper-coated film on the penetration hole, the upper and lower substrates and the high polymer organic substance so as for a through hole to be formed, and simultaneously a surface of the high polymer organic substance is exposed. The high polymer organic substance filled in the cavity is removed. An inside pad part(28) is formed by coating gold on an exposed high polymer organic substance, and a PSR is coated such that an outside pad part(31) is formed on an upper outer wire. An opening part is formed by removing a center portion of the lower substrate.

Description

MULTI-LAYER PCB MANUFACTURING METHOD AND PACKAGE MANUFACTURING METHOD USING THE PCB

The present invention relates to a method for manufacturing a substrate and a package, and more particularly, in the manufacture of highly integrated packages, the substrate is formed in multiple layers, and the plating is performed after masking the bonding portion with an organic material before plating the laminate. The present invention relates to a method for manufacturing a multilayer printed circuit board using organic material masking to protect a bonding pad part by performing the method, and a method for manufacturing a semiconductor package using the substrate.

The multilayer boards used for semiconductor packages such as PPGA PKG (PLASTIC PIN GRID ARRAY PACKAGE), PBGA PKG (PLASTIC BALL GRID ARRAY PACKAGE), PLGA PKG (PLASTIC PIN LAND GRID ARRAY PACKAGE) The multilayer substrate is laminated, and the laminated substrate is electrically connected to circuit patterns of the respective substrates through through holes.

For example, a general method of manufacturing a laminated substrate for manufacturing a PPGA PKG is to form a laminate, and then form through-holes for electrically connecting the internal circuit pattern and the external circuit pattern to the laminate, and through the laminate. After electroless / electrolytic copper plating is performed on the inner surface of the ball, nickel / gold plating is performed on the surface thereof to form through holes for electrically connecting circuit patterns of the respective substrates.

However, when a through hole is formed in such a way, a problem occurs that is easily broken due to thermal shock, so that a pin may be inserted into the through hole or filled with lead to solve such a problem. There is a problem that the work process is complicated, followed by environmental problems due to the use of lead, and another method may be nickel plating in two layers through the through hole, but this method has a disadvantage in forming a fine pattern.

Another method introduced as a method for solving the above problems is to manufacture an inner layer substrate having an opening in the center, and to laminate the inner layer substrate, and then to the outermost layer to block the opening of the laminate. The outer substrate is bonded and laminated.

Then, through holes are formed in the laminate manufactured by the above method, and an electroless copper plating film and an electrolytic copper plating film are formed on the inner surface of the through hole, and then a first nickel plated film is formed in this case. The bonding portion of the substrate is covered with an outer substrate so that plating is not performed.

In the above state, a process of forming a wiring pattern by etching, applying S / R, removing a portion of the outer layer substrate at a position corresponding to the opening of the inner layer substrate, and then performing second nickel plating. To form through holes.

However, the manufacturing method of the laminated substrate as described above has a problem that the process is difficult because the outer layer substrate must be mechanically processed during the process, and the circuit patterns formed in advance due to the impact or other effects generated during the process are damaged.

SUMMARY OF THE INVENTION An object of the present invention devised in view of the above problems is a method of manufacturing a multilayer printed circuit board using an organic material masking suitable for making it possible to simply manufacture a multilayer board without affecting the bonding portion and the circuit pattern and the substrate. It is to provide a method of manufacturing a semiconductor package using.

1 to 10 is a cross-sectional view showing an embodiment of the present invention.

11 to 16 are cross-sectional views showing another embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

1,101: insulation board 1a, 7, 33, 103, 113: opening

2: copper foil pattern 3: copper plating pattern

4,105: Internal wiring 5,106: Inner board

6,102,112: copper foil 8: upper substrate

9: lower substrate 10,111: adhesive sheet

11: cavity 12,110: laminate

16,121: polymer organic matter 17,122: through hole

18,104,131: Copper plating film 20,133: External wiring

21: filling material 26,141: bonding part

27,142: gold plated film 28,143: inner pad portion

31,151: outer pad portion 32,152: PSR

114: through hole 132, 19: through hole

In order to achieve the above object of the present invention, a method for manufacturing a multilayer printed circuit board for manufacturing a semiconductor package having a cavity in which a semiconductor chip is seated,

An inner substrate fabrication process of forming an inner substrate by forming an opening in an insulating substrate having copper foil deposited on the surface thereof, forming a copper plating film on the surface of the copper foil, and then patterning the inner wiring;

The laminated body is manufactured to form a cavity in which the upper side is opened by inserting an inner substrate between the upper substrate having the copper foil deposited on the upper surface and the lower substrate having the opening and the lower substrate having the opening without the opening and adhering with an adhesive sheet. Laminate manufacturing process,

A masking process of filling the polymer organic material in the cavity of the laminate to protect the bonding portion by the polymer organic material;

A through-hole forming step of forming a through-hole penetrating the laminate in a vertical direction;

Through-holes formed in the laminate, and upper and lower substrates and the surface of the polymer organic material to form a copper plated film to form a through hole and pattern the copper plated film to form external wiring on the upper and lower substrates as well as the polymer organic material External wiring forming process to expose the surface,

A mask removing process of removing the polymer organic matters filled in the cavity;

A pad forming process of applying PSR to form the inner pad part by removing the polymer organic matter and gold plating the exposed bonding part and forming the outer pad part on the surface of the upper outer wiring;

Provided is a method of manufacturing a multilayer printed circuit board using organic material masking, wherein a routing process of forming an opening by removing a central portion of the lower substrate is sequentially performed.

In addition, in the method for manufacturing a multilayer printed circuit board for manufacturing a semiconductor package having a cavity in which a semiconductor chip is seated,

An inner substrate fabrication process of forming an inner substrate by forming an opening in an insulating substrate having copper foil deposited on the surface thereof, forming a copper plating film on the surface of the copper foil, and then patterning the inner wiring;

A laminate manufacturing process of manufacturing a laminate having a through-hole so that the upper and lower substrates are coated with copper foil on the upper surface and have an opening, and the upper and lower sides are bonded by an adhesive sheet;

A masking process of applying a polymer organic material to the inner surface of the through-hole of the laminate at a predetermined thickness so that the bonding portion of the inner substrate positioned inside the cavity is protected by the polymer organic material;

A through-hole forming step of forming a through-hole penetrating the laminate in a vertical direction;

Forming an copper plating film on the surface of the through-hole and the upper substrate and the polymer organic material formed in the laminate, and patterning the copper plating film to form an external wiring on the surface of the upper substrate and to expose the surface of the polymer organic material; ,

A mask removing step of removing the polymer organic matter applied to the inner surface of the through hole;

The process of forming a pad (PSR) is sequentially performed to remove the polymer organic matter and to form an inner pad part by gold plating the exposed bonding part and to form an outer pad part on the upper outer wiring surface. Provided is a method of manufacturing a multilayer board using organic material masking.

In addition, in the method of manufacturing a multilayer printed circuit board for manufacturing a semiconductor package having a cavity in which a semiconductor chip is seated,

Stacking a plurality of substrates having internal wirings and openings in the center thereof, to fabricate a semiconductor chip mounting cavity and a multilayer substrate having a pad portion connected to the semiconductor chip inside the cavity;

Filling a polymer organic material into the cavity;

Forming a through hole in the multi-layer substrate and plating the through hole to electrically connect the internal wiring;

A mask removing step of removing the polymer organic material; Provided is a method of manufacturing a multilayer printed circuit board for manufacturing a semiconductor package.

In addition, in the method of manufacturing a semiconductor package using a multilayer printed circuit board having a cavity in which a semiconductor chip is seated,

Stacking a plurality of substrates having internal wirings and openings in the center thereof to manufacture a semiconductor chip mounting cavity and a multilayer substrate having a pad portion connected to the semiconductor chip inside the cavity;

Filling a polymer organic material into the cavity;

Forming a through hole in the multi-layer substrate and plating the through hole to electrically connect the internal wiring;

A mask removing step of removing the polymer organic material;

Bonding pad portion forming step of gold plating the pad portion;

A wire connection step of electrically connecting the semiconductor chip and the bonding pad part with a wire;

Provided is a method of manufacturing a semiconductor package including a filling step of filling a protective material in the cavity.

Hereinafter, a method of manufacturing a multilayer substrate using the organic material masking of the present invention manufactured as described above will be described in more detail with reference to an embodiment of the accompanying drawings.

An embodiment of the present invention will be described with reference to FIGS. 1 to 10.

In the present invention, the first step is an inner substrate fabrication process, which will be described with reference to FIG. 1 to deposit and form a copper foil 2 on the upper and lower surfaces of the insulating substrate 1. Then, in order to form a cavity, which will be described later, the center portion of the insulating substrate is processed to form the opening 1a, and the outer surface and the opening 1a of the copper foil 2 for electrically connecting the copper foil 2 formed on the upper and lower surfaces. After the plated film 3 is formed on the inner circumferential surface of the substrate 9), the inner substrate 5 is fabricated so as to form the inner wiring 4 having the copper foil pattern 2 and the copper plating pattern 3 formed in this order.

The insulating substrate 1 is a resin material having electrical insulation properties such as glass, epoxy, glass, polyimide, and BT resin.

The internal wiring 4 is formed by the copper foil 2 and the plating film 3 by patterning the photoresist on the surface of the plating film, exposing / developing the copper foil of the portion except for the portion coated with the photoresist. And the plating film are etched and removed, followed by removing the remaining photoresist.

In the following process, the copper foil 6 is deposited on the upper surface using a separate manufacturing process, the upper substrate 8 having the opening 7 and the lower substrate 9 having the copper foil 6 deposited on the lower surface without the opening. Laminated body 12 is manufactured by inserting two inner substrates 5 having openings 1a therebetween and bonding them with an adhesive sheet 10 to form a cavity 11 having an open upper side. In the process, the laminated body 12 thus produced is shown in FIG. 2.

The opening 11a of the two inner substrates 5 and the opening 7 of the upper substrate 8 are made to be larger toward the upper side so that the cavity 11 is formed in multiple stages.

The pad copper foil 13 located in the cavity 11 is a portion to which a wire for connecting with a semiconductor chip, which will be described later, is connected.

The adhesive sheet 10 for adhering the inner substrate 5 and the upper and lower substrates 8 and 9 used a sheet material called a prepreg. The prepreg is a glass fiber hardened on the sheet by an adhesive, and the prepreg is inserted between the upper inner substrate 5 and the lower inner substrate 5 and between the upper and lower substrates 8 and 9. In this case, when the substrate is heated for a certain time while being pressurized in a vacuum, the adhesive is completely cured to obtain an integrated laminate 12.

Then, a masking process is performed such that the bonding part is protected by the polymer organic material 16 by filling the polymer organic material 16 into the cavity 11 of the laminate 12 in the following process. The state filled in the cavity 11 of 16 is shown in FIG.

S / R ink, an epoxy resin, and the like may be used as the polymer organic material 16, and may be repeatedly applied several times using a screen printing method until the same as the surface of the upper substrate 8 is filled.

Thereafter, a through hole forming process of forming a through hole 17 in the vertical direction in the stack 12 is performed. As shown in FIG. 4, the through hole forming process is performed. Is shown.

The through hole 17 is used to electrically connect the wires in a later process and is formed to penetrate the internal wires 4.

When copper plating is performed in the above state, a copper plating film 18 is formed on the inner surface of the through hole 17 to form a through hole 19 through which the inner wiring 4 of the inner substrate is electrically connected. The copper plating film 18 is plated on the outer surface of the copper foil 6 deposited on the upper and lower substrates 8 and 9 so that the copper foil 6 and the inner substrate 5 of the upper and lower substrates 8 and 9 are plated. The internal wiring 4 of) is electrically connected. A state in which the copper plating film 18 is formed is shown in FIG.

That is, since the copper plating film 18 is formed in the state in which the polymer organic material 16 is filled in the cavity 11, the copper plating film 18 is formed on the pad copper foil 13 inside the cavity 11. Will not be.

In such a state, the copper foil 6 formed on the lower surface of the lower substrate 9 and the double layer of the copper plating film 18 are patterned, and as shown in FIG. 6, the lower external wiring on the lower surface of the lower substrate 9 is shown. 20 to be formed.

Thereafter, the inside of the through hole 19 is filled with the filler 21, and the adhesive sheet 10 ′ is attached to the lower surface of the lower substrate 9, which is illustrated in FIG. 7. As the filler 21, a conductive paste, a resin material, or the like can be used, and the adhesive sheet 10 'is attached to the heat sink in a later step.

Thereafter, the copper plating film 18 plated on the upper surface of the upper substrate 8 is removed while the copper plating film 18 plated on the upper surface of the polymer organic material 16 filled in the cavity 11 is removed using a conventional etching method. Is patterned to form the upper outer wiring 22, which is shown in FIG.

In the above state, a mask removal process for removing the polymer organic matter 16 filled in the cavity 11 is performed, wherein the exposed polymer organic matter 16 is precipitated in an alkaline solution such as caustic soda. Will be removed.

The solution does not affect the copper thin film.

The polymer organic material 16 is removed to form a gold plated film 27 on the exposed pad copper foil 13 to form an inner pad part 28 and an outer pad part on the surface of the upper outer wiring 22. A pad forming process is performed in which a PSR 32 is applied to an upper surface of the upper substrate 8 so that the 31 is formed. Thus, the inner and outer pad portions 28 and 31 are formed. Is shown in FIG. 9.

After the pad forming process as described above, a routing step of forming the opening 33 by removing the central portion of the lower substrate 9 is performed. The routing process is performed to open the central portion of the lower substrate 9. Forming 33 results in a multi-layer substrate 100 of the present invention. The multi-layer substrate 100 thus completed is shown in FIG.

Here, it is obvious that the openings 33 of the inner substrate 1 and the lower substrate 9 in the opening 7 of the upper substrate 8 should be gradually enlarged.

Then, the completed multi-layer substrate 100 as described above, the heat sink is attached to the lower surface in a later step, the die bonding for attaching a semiconductor chip to the upper surface inside the cavity 11 of the heat sink, the inner pad portion 28 And a wire bonding connecting the semiconductor chip with a metal wire, a potting potting the inside of the cavity 11 as a protective material, and a ball bonding attaching a solder ball to the outer pad portion 31, thereby producing a BGA package.

11 to 16 are cross-sectional views showing another embodiment of the present invention, another embodiment of the present invention is almost the same as one embodiment. Only the three substrates having the openings are stacked, and the polymer organic material is applied to a part of the inner side of the openings of the stacked substrates with a predetermined thickness, and then patterning is different from the embodiment. Therefore, it will be described in detail with the focus on the differences between the embodiment.

First, the inner substrate 106 is fabricated, and as shown in FIG. 11, the copper foil 102 is deposited on the upper surface of the insulating substrate 101, and the center portion of the insulating substrate 101 on which the copper foil 102 is deposited is processed. Thus, the opening 103 is formed. Thereafter, the copper plating film 104 is formed on the surface of the copper foil 102, and then patterned to form the internal wiring 105 to fabricate the inner substrate 106.

Then, the laminate 110 is manufactured. The manufacture of the laminate 110 includes two inner substrates 106 having different sizes of the openings 103, and the adhesive sheet 111 so that the openings 103 are larger. A laminate 110 having a cavity 107 by attaching the upper substrate 114 having the opening 113 to the upper surface of the copper foil 112 on the upper surface thereof. The laminate 110 thus constructed is shown in FIG. 12. Reference numeral 108 denotes a pad copper foil portion which is later gold plated and connected with a semiconductor chip and a gold wire.

In the stack 110, the openings 113 and 103 are formed to gradually increase from the lowermost inner substrate 106 to the upper substrate 114.

The masking process is performed in the above state, and the masking is performed by coating the polymer organic material 121 with a predetermined thickness on the pad copper foil 108 of the inner surface of the cavity 107 of the stack 110. The through-hole forming process of forming the through-hole 122 for drilling the pad copper foil portion 108 of the high-molecular organic material 121 and electrically connecting the internal wiring 105 is carried out. As shown in FIG. 13, the through-holes 122 are formed.

S / R ink or a resin material may be used as the polymer organic material 121, and the polymer organic material 121 is repeatedly applied by using a screen printing method to be applied to a predetermined thickness.

Thereafter, the external wiring forming process is performed, and the lamination 110 is copper plated, and as shown in FIG. 14, the through hole 122 and the upper substrate 114 and the polymer organic material 121 formed in the laminate 110 are provided. The copper plating film 131 is formed on the surface of the through hole 132 through which the internal wirings 105 are electrically connected. Then, the upper and lower surfaces of the laminate 110 are patterned to form the external wiring 133 on the surface of the upper substrate 114 by a conventional etching method as shown in FIG. 15. At this time, the copper plating film formed on the polymer organic material 121 is removed during the etching.

After the external wiring 133 is formed as described above, a mask removal process for removing the polymer organic matter 121 formed on the inner surface of the cavity 107 of the laminate 110 is performed. 121) can be removed using an alkaline solution such as caustic soda.

After performing the mask removing process as described above, the gold plating film 142 is formed on the exposed bonding portion 141 to form the inner pad portion 143, and the outer pad portion 151 is formed on the surface of the outer wiring 133. A pad forming process of applying PSR 152 to be formed is sequentially performed to complete the multilayer substrate 200. The multilayer substrate 200 thus completed is illustrated in FIG.

In the above-described multilayer board 200, a heat sink is attached to a lower surface in a later step, and die bonding attaches a semiconductor chip to an upper surface of the inner side of the cavity 107 of the heat sink. Wire bonding to connect the wire with a metal wire, potting potting the inside of the cavity 107 as a protective material and ball bonding to attach the solder ball to the outer pad portion BGA package is produced.

The through hole 132 of the multilayer substrate 200 may be filled with any one of a conductive paste or a resin material in some cases.

As described in detail above, in the method of manufacturing a multilayer board using the masking of the organic material of the present invention, after masking using a polymer organic material on the inner surface of the through-hole of the laminate having the internal wiring exposed through the bonding part, plating is performed. By forming a through hole that electrically connects the internal wiring to the ball, and patterning to form an external wiring, and then removing the polymer organic matter by a simple method and proceeding to the subsequent process to produce a multilayer board, as in the prior art There is an effect of producing a multi-layer substrate in a simple way without going through a complicated process.

Claims (16)

In the method for manufacturing a multilayer printed circuit board for manufacturing a semiconductor package having a cavity in which a semiconductor chip is seated, An inner substrate fabrication process of forming an inner substrate by forming an opening in an insulating substrate having copper foil deposited on the surface thereof, forming a copper plating film on the surface of the copper foil, and then patterning the inner wiring; The laminated body is manufactured to form a cavity in which the upper side is opened by inserting an inner substrate between the upper substrate having the copper foil deposited on the upper surface and the lower substrate having the opening and the lower substrate having the opening without the opening and adhering with an adhesive sheet. Laminate manufacturing process, A masking process of filling the polymer organic material into the cavity of the laminate to protect the pad copper foil by the polymer organic material; A through-hole forming step of forming a through-hole penetrating the laminate in a vertical direction; Through-holes formed in the laminate, and upper and lower substrates and the surface of the polymer organic material to form a copper plated film to form a through hole and pattern the copper plated film to form external wiring on the surface of the upper and lower substrates as well as the polymer organic material External wiring forming process to expose the surface, A mask removing process of removing the polymer organic matters filled in the cavity; A pad forming process of removing the polymer organic matter and plating the exposed pad copper foil to form an inner pad part and applying a PSR to form an outer pad part on the surface of the upper outer wiring; A method of manufacturing a multilayer printed circuit board using organic material masking, characterized in that a routing step of forming an opening by removing a central portion of the lower substrate is sequentially performed. The method of claim 1, wherein the insulating substrate is any one of glass epoxy, glass polyimide, and BT resin. The method of claim 1, wherein the adhesive sheet is a prepreg formed by hardening glass fibers on an sheet with an adhesive. The method of claim 1, wherein the polymer organic material is filled with one of S / R ink and an epoxy resin by a screen printing method. The method of claim 1, wherein the organic polymer is removed by precipitation in an alkaline solution such as caustic soda. The method of claim 1, wherein the opening is formed to gradually increase from the lower substrate toward the upper substrate. In the method for manufacturing a multilayer printed circuit board for manufacturing a semiconductor package having a cavity in which the semiconductor chip is seated, An inner substrate fabrication process of forming an inner substrate by forming an opening in an insulating substrate having copper foil deposited on the surface thereof, forming a copper plating film on the surface of the copper foil, and then patterning the inner wiring; A laminate manufacturing process of manufacturing a laminate having a through-hole so that the upper and lower substrates are coated with copper foil on the upper surface and have an opening, and the upper and lower sides are bonded by an adhesive sheet; A masking process of coating the polymer organic material with a predetermined thickness on the inner surface of the through-hole of the laminate to protect the pad copper foil of the inner substrate positioned inside the cavity by the polymer organic material; A through-hole forming step of forming a through-hole penetrating the laminate in a vertical direction; Forming an copper plating film on the surface of the through-hole and the upper substrate and the polymer organic material formed in the laminate, and patterning the copper plating film to form an external wiring on the surface of the upper substrate and to expose the surface of the polymer organic material; , A mask removing step of removing the polymer organic matter applied to the inner surface of the through hole; In order to form the inner pad part by gold-plating the exposed pad copper foil by removing the polymer organic matter, the pad forming step of sequentially applying the PSR to form the outer pad part on the surface of the upper outer wiring is sequentially performed. Method of manufacturing a multilayer printed circuit board using an organic material masking, characterized in that. The method of claim 7, wherein the insulating substrate is any one of glass epoxy, glass polyimide, and BT resin. 8. The method of claim 7, wherein the adhesive sheet is a prepreg formed by hardening glass fibers on an sheet with an adhesive. The method of claim 7, wherein the polymer organic material is filled with one of S / R ink and epoxy resin by screen printing. The method of claim 7, wherein the organic polymer is removed by precipitating in an alkaline solution such as caustic soda. The method of claim 7, wherein the opening is formed to gradually increase from the lower substrate toward the upper inner substrate. In the method for manufacturing a multilayer printed circuit board for manufacturing a semiconductor package having a cavity in which the semiconductor chip is seated, Stacking a plurality of substrates having internal wirings and openings in the center thereof, to fabricate a semiconductor chip mounting cavity and a multilayer substrate having a pad portion connected to the semiconductor chip inside the cavity; Filling a polymer organic material into the cavity; Forming a through hole in the multi-layer substrate and plating the through hole to electrically connect the internal wiring; A mask removing step of removing the polymer organic material; Method of manufacturing a multi-layer printed circuit board for manufacturing a semiconductor package that includes. The method of manufacturing a multilayer printed circuit board for manufacturing a semiconductor package according to claim 13, further comprising a step of gold plating the pad part after the mask removing step. The method of claim 13, wherein the polymer organic material is filled with one of S / R ink and an epoxy resin by screen printing. In the semiconductor package manufacturing method using a multilayer printed circuit board having a cavity in which a semiconductor chip is seated, Stacking a plurality of substrates having internal wirings and openings in the center thereof, to fabricate a semiconductor chip mounting cavity and a multilayer substrate having a pad portion connected to the semiconductor chip inside the cavity; Filling a polymer organic material into the cavity; Forming a through hole in the multi-layer substrate and plating the through hole to electrically connect the internal wiring; A mask removing step of removing the polymer organic material; Bonding pad portion forming step of gold plating the pad portion; A wire connection step of electrically connecting the semiconductor chip and the bonding pad part with a wire; Method of manufacturing a semiconductor package comprising a filling step of filling a protective material in the cavity