KR20030044391A - Generator for sustain pulse of plasma display panel - Google Patents

Abstract

PURPOSE: An apparatus for generating a sustain pulse of a plasma display device is provided to simplify the configuration of the circuit thereof by integrating a conventional DC/DC converting block and a sustain pulse supplying block. CONSTITUTION: An apparatus for generating a sustain pulse of a plasma display device includes a direct current(DC) converter(60) for converting an alternative voltage into a direct voltage, a switching block(62) for converting the direct voltage into a square wave by switching the direct voltage, a transformer(6T) for inducing the square wave to a secondary coil connected thereto and a rectifier(64) for rectifying the square wave induced by the secondary coil and supplying the induced square wave to the panel(70).

Description

Sustain pulse generator of plasma display panel {GENERATOR FOR SUSTAIN PULSE OF PLASMA DISPLAY PANEL}

The present invention relates to a sustain pulse generator of a plasma display panel, and more particularly to a sustain pulse generator of a plasma display panel to simplify the circuit configuration of the sustain pulse generator.

Plasma Display Panels (hereinafter referred to as "PDPs") display an image including characters or graphics by emitting phosphors by ultraviolet rays of 147 nm generated upon discharge of He + Xe or Ne + Xe gas. Such a PDP is not only thin and easy to enlarge, but also greatly improved in quality due to recent technology development.

Such a PDP is driven by dividing one frame into several subfields having different emission counts in order to realize gray levels of an image. Each subfield is further divided into a reset period for uniformly generating discharge, an address period for selecting a discharge cell, and a sustain period for implementing gray scale according to the number of discharges. When the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. Each of the eight subfields SF1 to SF8 is divided into a reset period, an address period, and a sustain period.

The reset period and the address period of each subfield are the same for each subfield. The address discharge for selecting a cell is caused by the voltage difference between the data electrode and the scan electrode. The sustain period is increased at a rate of 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. In this way, the gray scale necessary for displaying an image is realized by adjusting the number of sustain discharges in the sustain period in each subfield. The sustain discharge is caused by a high voltage sustain pulse which is alternately supplied to the scan electrode and the sustain electrode.

Referring to FIG. 1, a conventional sustain pulse generator for generating sustain pulses of a PDP improves a power factor of an AC input unit 1 supplying an AC voltage and a voltage supplied from the AC input unit 1, and generates harmonics. Power Factor Collection (PFC unit) 10 for removing, DC / DC converter 20 for converting DC voltage generated by PFC unit 10 into square wave, and transforming A sustain pulse supply unit 30 for supplying a square wave of the DC voltage transformed by the / DC converter 20 to the PDP panel 40 is provided.

The PFC unit 10 controls the current input from the AC input unit 1 to generate a sinusoidal wave having an in-phase, improve the power factor, and remove harmonic noise.

To this end, the PFC unit 10 improves the rectification circuit 12 for rectifying the AC input from the AC input unit 1 to DC, as shown in FIG. 2, and improves the power factor of the DC rectified in the rectifying circuit 12. A power factor improving circuit 14 is provided.

The rectifier circuit 12 is arranged in a full bridge shape and forward biased during the positive half of the AC input and the second and second diodes DF1 and DF2, and the forward bias during the negative half of the AC input. Consisting of third and fourth diodes DF3 and DF4. The rectifier circuit 12 stores the DC generated by full-wave rectifying the AC input input from the AC input unit 1 in the smoothing capacitor 2C.

The power factor correction circuit 14 is provided between the coil 2L for charging the current component of DC stored in the smoothing capacitor 2C of the rectifier circuit 12, and is provided between the coil 2L and the rectifier circuit 12 to provide the current of DC. First transistor 2T1 for switching the component to be stored in coil 2L, first capacitor Cdc1 for charging the voltage component of DC supplied from smoothing capacitor 2C by switching of first transistor 2T1. It is provided.

When the first transistor 2T1 is turned on by a control signal (not shown), a loop is formed between the smoothing capacitor 2C, the first transistor 2T1, and the coil 2L, so that a current of DC is applied to the coil 2L. The ingredients are stored. In addition, when the first transistor 2T1 is turned off by a control signal (not shown), the voltage component of DC stored in the smoothing capacitor 2C is stored in the first capacitor Cdc1.

The power factor improving circuit 14 is provided with a diode Do for blocking a reverse current flowing from the second capacitor Cdc1 to the coil 2L between the coil 2L and the first capacitor Cdc1.

Referring to FIG. 3, the DC / DC converter 20 may include a bridge switch 22 connected to both ends of the first capacitor Cdc1 of the PFC unit 10, and a voltage supplied by switching of the bridge switch 22. The middle tap transformer 3T for transforming the circuit, the second capacitor 3C2 and the first inductor 3L1 connected in series between the middle tap transformer 3T and the bridge switch 22, and the middle tap transformer 3T. A full-wave rectifier 24 connected to the secondary winding of the rectifier to rectify the voltage induced in the secondary winding of the intermediate tap transformer 3T, and a smoothing capacitor 3Cdc2 for charging the voltage output from the full-wave rectifier 24; And a second inductor 3L2 disposed in series between the smoothing capacitor 3Cdc2 and the full-wave rectifier 24.

The bridge switch 22 includes first to fourth switches 3Q1, 3Q2, 3Q3, and 3Q4 arranged in full bridges at both ends of the first capacitor Cdc1.

The first and third switches 3Q1 and 3Q3 are connected in parallel to one end of the first capacitor Cdc1, and the second and fourth switches 3Q2 and 3Q4 are connected in parallel to the other end of the first capacitor Cdc1. do. Here, the first to fourth switches 3Q1, 3Q2, 3Q3, and 3Q4 are field effect transistors.

The first node 3N1 to which the first switch 3Q1 and the fourth switch 3Q4 are connected is connected to the upper end of the primary winding of the intermediate tap transformer 3T through the second capacitor 3C2 and the first inductor 3L1. The second node 3N2 to which the second switch 3Q2 and the third switch 3Q3 are connected is connected to the lower end of the primary winding of the middle tap transformer 3T. The bridge switch 22 converts the voltage supplied from the first capacitor Cdc1 into a square wave by alternating switching of the first to fourth switches 3Q1, 3Q2, 3Q3, and 3Q4 into a square wave to convert the intermediate tap transformer 3T. Supply to primary winding of.

The second capacitor 3C2 is a DC blocking capacitor for preventing a current of a DC component supplied to the intermediate tap transformer 3T through the bridge switch 22.

The first inductor 3L1 is a resonant coil to eliminate switching losses of the first to fourth switches 3Q1, 3Q2, 3Q3, and 3Q4 of the bridge switch 22.

The middle tap transformer 3T insulates the primary winding and the secondary winding and converts the input voltage. That is, the intermediate tap transformer 3T converts the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding. The middle tap transformer 3T induces the voltage supplied to the primary winding to the secondary winding by the turns ratio between the primary winding and the intermediate tap of the secondary winding. One end of the primary winding of the intermediate tap transformer 3T is connected to the first inductor 3L1, and the other end of the primary winding is connected to the second node 3N2.

The full-wave rectifier 24 includes a first diode 3D1 disposed across the secondary winding of the intermediate tap transformer 3T, in order to rectify the AC pulse induced in the secondary winding of the intermediate tap transformer 3T, and the first diode. A second diode 3D2 is disposed between the diode 3D1 and the positive terminal + of the middle tap transformer 3T.

The second diode 3D2 rectifies the square wave of the positive polarity induced between the positive terminal (+) of the secondary winding and the middle tap and supplies it to the smoothing capacitor (3Cdc2) through the second inductor (3L2). The first diode 3D1 rectifies the negative square wave induced between the middle tap of the secondary winding and the negative terminal and supplies it to the smoothing capacitor 3Cdc2 through the second inductor 3L2. do. Here, the second inductor 3L2 serves to smooth the square wave rectified by the first and second diodes 3D1 and 3D2 to DC.

The DC / DC converter 20 is the same as the circuit configuration of a general DC-DC converter, and the voltage stored in the smoothing capacitor 3Cdc2 of the DC / DC converter 20 is supplied to the sustain pulse supply unit 30. .

The sustain generator 30 includes third and third capacitors 3C3 for removing ripple of a voltage supplied from the smoothing capacitor 3Cdc2, and fifth and fifth terminals connected in parallel to both ends of the third capacitor 3C3. 6 switches 3Q5 and 3Q6.

The third capacitor 3C3 is connected in parallel with the smoothing capacitor 3Cdc2 of the DC / DC converter 20. The third capacitor 3C3 compensates for the ripple generated by the line resistance of the voltage supplied from the smoothing capacitor 3Cdc2.

The fifth and sixth switches 3Q5 and 3Q6 switch the DC voltage stored in the third capacitor 3C3 to be supplied to the panel capacitor Cp. Here, the fifth and sixth switches 3Q5 and 3Q6 are field effect transistors.

In the conventional sustain pulse generator, since the first switch 3Q1 is turned on by a switching control signal (not shown), the second switch 3Q2 is turned on so that the voltage of the first capacitor Cdc1 is changed to the first switch 3Q1. ), The second capacitor 3C2, the first inductor 3L1, the primary winding of the intermediate tap transformer 3T, and the second switch 3Q2. Accordingly, the voltage stored in the first capacitor Cdc1 is induced as a positive voltage (+ SUS) in the secondary winding of the intermediate tap transformer 3T. Positive voltage (+ SUS) induced in the secondary winding is rectified by the positive sustain pulse by the second diode 3D2 and stored in the smoothing capacitor 3Cdc2 and the third capacitor 3C3 to the panel capacitor Cp. Supplied.

Subsequently, the first and second switches 3Q1 and 3Q2 are turned off, and the fourth switch 3Q4 is turned on after the third switch 3Q3 is turned on by a switching control signal (not shown), whereby the first capacitor ( The voltage of Cdc1 flows through the third switch 3Q3, the primary winding of the intermediate tap transformer 3T, the first inductor 3L1, the two capacitors 3C2, and the fourth switch 3Q4. Accordingly, the voltage stored in the first capacitor Cdc1 is induced as a negative voltage (-SUS) in the secondary winding of the intermediate tap transformer 3T. The negative voltage (-SUS) induced in the secondary winding is rectified into a positive sustain pulse by the first diode 3D1 and supplied to the panel capacitor Cp through the smoothing capacitor 3Cdc2 and the third capacitor 3C3. do.

As described above, the conventional sustain pulse generator converts the AC input voltage into the sustain pulse through the PFC unit 10, the DC / DC converter 20, and the sustain pulse supply unit 30, and thus is connected to many circuit elements during the conversion process. Not only does the circuit loss such as loss and switching loss increase, but the circuit is complicated and the circuit cost increases.

Accordingly, an object of the present invention is to provide a sustain pulse generator of a plasma display panel which can simplify the circuit configuration of the sustain pulse generator.

1 is a block diagram showing a sustain pulse generator of a conventional PDP.

FIG. 2 is a circuit diagram showing the power factor improvement circuit shown in FIG. 1 in detail. FIG.

3 is a circuit diagram showing in detail the sustain pulse generator of the conventional PDP shown in FIG.

4 is a block diagram illustrating a driving unit of a plasma display panel according to an exemplary embodiment of the present invention.

FIG. 5 is a block diagram illustrating a sustain pulse generator of each of the Y and Z driving units shown in FIG. 4. FIG.

6 is a circuit diagram illustrating a sustain pulse generator of a PDP according to a first embodiment of the present invention.

7 is a drive waveform diagram of the sustain pulse generator of the PDP shown in FIG.

8 is a circuit diagram illustrating a sustain pulse generator of a PDP according to a second embodiment of the present invention.

FIG. 9 is a drive waveform diagram of the sustain pulse generator of the PDP shown in FIG. 8; FIG.

10 is a circuit diagram illustrating a sustain pulse generator of a PDP according to a third embodiment of the present invention.

FIG. 11 is a drive waveform diagram of the sustain pulse generator of the PDP shown in FIG. 10; FIG.

12 is a circuit diagram illustrating a sustain pulse generator of a PDP according to a fourth embodiment of the present invention.

FIG. 13 is a drive waveform diagram of the sustain pulse generator of the PDP shown in FIG. 12; FIG.

14 is a circuit diagram illustrating a sustain pulse generator of a PDP according to a fifth embodiment of the present invention.

FIG. 15 is a drive waveform diagram of the sustain pulse generator of the PDP shown in FIG. 14; FIG.

16 is a circuit diagram illustrating a sustain pulse generator of a PDP according to a sixth embodiment of the present invention.

FIG. 17 is a drive waveform diagram of the sustain pulse generator of the PDP shown in FIG. 16; FIG.

18 is a circuit diagram illustrating a sustain pulse generator of a PDP according to a seventh embodiment of the present invention.

19 is a circuit diagram illustrating a sustain pulse generator of a PDP according to an eighth embodiment of the present invention.

20 is a drive waveform diagram of the sustain pulse generator of the PDP shown in FIG. 19;

21 is a circuit diagram illustrating a sustain pulse generator of a PDP according to a ninth embodiment of the present invention.

Fig. 22 is a circuit diagram showing a sustain pulse generator of a PDP according to a tenth embodiment of the present invention.

FIG. 23 is a drive waveform diagram of the sustain pulse generator of the PDP shown in FIG. 22; FIG.

Fig. 24 is a circuit diagram showing another embodiment of the sustain pulse generator of the PDP according to the tenth embodiment of the present invention.

FIG. 25 is a drive waveform diagram of the sustain pulse generator of the PDP shown in FIG. 24; FIG.

FIG. 26 is a block diagram illustrating a sustain pulse generator of a PDP according to an eleventh embodiment of the present invention; FIG.

Fig. 27 is a circuit diagram showing a sustain pulse generator of a PDP according to an eleventh embodiment of the present invention.

FIG. 28 is a block diagram illustrating a sustain pulse generator of a PDP according to a twelfth embodiment of the present invention; FIG.

29 is a circuit diagram showing a sustain pulse generator of a PDP according to a twelfth embodiment of the present invention;

30 is a circuit diagram illustrating a sustain pulse generator of a PDP according to a thirteenth embodiment of the present invention;

FIG. 31 is a drive waveform diagram of the sustain pulse generator of the PDP shown in FIG. 30; FIG.

<Description of Symbols for Main Parts of Drawings>

1, 51, 201, 251: AC input unit

10, 50, 200, 250: Power factor improvement circuit

12: rectifier circuit

14 power factor improvement circuit

20,60,100,110,120,130,140,150,160,170,180,210,260,315,315 ': DC / DC converter

22, 62, 102, 112, 212, 312: switch bridge

24, 114, 144, 174, 314, 314 ': full-wave rectifier

30: sustain supply unit

40, 70, 220,280: PDP panel

64, 124, 154, 214, 274: bridge rectifier

In order to achieve the above object, a sustain pulse generator of a plasma display panel according to the present invention includes a DC converter for converting an AC voltage into a DC voltage, a switching unit for converting the DC voltage into a square wave, and the square wave panel. And a transformer for guiding to the secondary side connected to the rectifier, and a rectifier for rectifying and supplying the square wave guided to the secondary side to the panel.

The DC converter includes a plurality of diodes connected in a bridge form between an input voltage source and the switching unit, a first capacitor connected between the bridge type diode and the switching unit, and between the first capacitor and the switching unit. And a second capacitor connected between the power factor improving circuit portion and the switching portion.

The second capacitor includes a third capacitor and a fourth capacitor connected in parallel between the power factor improving circuit and the switching unit.

The switching unit includes a plurality of transistors connected in a bridge form between the second capacitor and the transformer.

The switching section includes a transistor connected between the second capacitor and the transformer.

The switching unit includes a first transistor connected between the third capacitor and the transformer, and a second transistor connected between the first transistor and the fourth capacitor.

The switching section includes third and fourth capacitors connected in parallel between the second capacitor and the transformer.

It is further provided with a smoothing capacitor connected between the switch and the transformer.

And an inductor connected between the smoothing capacitor and the transformer.

The rectifier has a plurality of diodes connected in a bridge form between the transformer and the panel.

The diodes include a first diode connected across the secondary side of the transformer and a second diode connected across the first diode and the secondary side of the transformer.

The rectifier has a diode connected between the transformer and the panel.

The transformer has an intermediate tab in the primary winding.

The intermediate tab is connected to the second capacitor.

The transformer is characterized in that it comprises an intermediate tab in the secondary winding.

The intermediate tab is connected to the panel.

The transformer has a first intermediate tap connected to the primary winding and a second intermediate tap connected to the secondary winding.

The first intermediate tab is connected to the second capacitor, and the second intermediate tab is connected to the panel.

The sustain pulse generator of the plasma display panel according to the present invention includes a DC converter for converting an AC voltage into a DC voltage, a detector for detecting the level of the AC voltage, a switch for converting the DC voltage into a square wave, A transformer for guiding the square wave to the secondary side connected to the panel, a control unit for controlling the winding ratio of the transformer according to the detected AC voltage level, and a rectifier for rectifying and supplying the square wave induced to the secondary side to the panel. It is provided.

The transformer has an auxiliary winding.

The auxiliary winding is characterized in that connected to any one of the primary winding and the secondary winding of the transformer.

The control unit includes a first switch connected between the auxiliary winding and the primary winding, a second switch connected between the auxiliary winding and the switching unit and interlocked with the first switch, and between the auxiliary winding and the primary winding. And a third switch for serially connecting the auxiliary winding to be connected with the primary winding.

The control unit includes a first switch connected between the auxiliary winding and the secondary winding, a second switch connected between the auxiliary winding and the rectifier and interlocked with the first switch, and connected between the auxiliary winding and the secondary winding. And a third switch connecting the auxiliary winding and the secondary winding in series.

Further provided with a smoothing capacitor disposed between the switching unit and the control unit.

The DC converter further includes a diode full-wave bridge rectifier for converting the AC voltage into a square wave, a capacitor for storing the square wave, and a power factor improving circuit for improving the power factor of the voltage stored from the capacitor and converting it into a DC voltage. do.

The sustain pulse generator of the plasma display panel according to the present invention includes a DC converter for converting an AC voltage into a DC voltage, a switching unit for converting the DC voltage into a square wave, and inducing the square wave to a secondary side connected to the panel. A voltage stabilizer for maintaining a constant input voltage of the transformer and a voltage stabilizer provided between the DC converter and the transformer, And a control unit for controlling the voltage stabilizer and a rectifier for rectifying and supplying the square wave guided to the secondary side to the panel.

The voltage stabilizer is a buck circuit connected between the second capacitor and the switching unit.

The buck circuit includes a switch connected between the second capacitor and the switching unit, an inductor connected between the switch and the switching unit, a third capacitor connected between the inductor and the switching unit, And a diode connected between the inductor and the third capacitor.

The sustain pulse generator of the plasma display panel according to the present invention includes a sustain driving circuit for inverting the polarity of the square wave and rectifying the square wave to generate a sustain waveform of at least two steps or more. Generator.

The sustain driving circuit includes a first driving part connected to the first electrode of the panel to supply the sustain waveform to the first electrode, and a sustain waveform connected to the second electrode of the panel having an antiphase with the sustain waveform. A second drive unit for supplying the second electrode is further provided.

The first driving unit includes a first DC converter for converting an AC voltage into a DC voltage, a first switching unit for converting the DC voltage into a square wave, and a first for inducing the square wave to a secondary side connected to the panel. A transformer and a first rectifier for rectifying the square wave guided to the secondary side and supplying the rectified wave to the first electrode of the panel.

The second driving unit includes a second DC converter for converting an AC voltage into a DC voltage, a second switching unit for converting the DC voltage into a square wave, and a second for inducing the square wave to a secondary side connected to the panel. A transformer and a second rectifier for rectifying the square wave guided to the secondary side for supplying to the second electrode of the panel.

The first switch includes a plurality of transistors connected in a bridge form between the first DC converter and the first transformer.

And a first smoothing capacitor connected between the first switching unit and the first transformer.

And a first inductor connected between the first smoothing capacitor and the first transformer.

The first rectifier has a plurality of diodes connected in a bridge form between the first transformer and the panel.

The second switching unit includes a plurality of transistors connected in a bridge form between the second DC converter and the second transformer.

And a second smoothing capacitor connected between the second switching unit and the second transformer.

And a second inductor connected between the second smoothing capacitor and the second transformer.

The second rectifier has a plurality of diodes connected in a bridge form between the second transformer and the panel.

The sustain waveform is characterized by three steps of positive potential, base potential and negative potential.

Other objects and features of the present invention in addition to the above objects will be apparent from the description of the embodiments with reference to the accompanying drawings.

A preferred embodiment of the present invention will be described with reference to FIGS. 4 to 31.

Referring to FIG. 4, a driving device of a plasma display panel (hereinafter referred to as “PDP”) according to the present invention includes a Y driver 90 for driving scan / sustain electrode lines Y1 to Ym. And a Z driver 92 for driving the common sustain electrode lines Z1 to Zm, and an X driver 94 for driving the address electrode lines X1 to Xn.

The Y driver 90 sequentially supplies the scanning pulse and the sustain pulse to the scan / sustain electrode lines Y1 to Ym. The Z driver 92 simultaneously supplies the sustain pulses to the common sustain electrode lines Z1 to Zm. The X driver 94 supplies data pulses synchronized with the scan pulses to the address electrode lines X1 through Xn.

As described above, each of the Y driver 90 and the Z driver 92 generates a sustain pulse by the sustain pulse generator as shown in FIG. 5.

Referring to FIG. 5, the sustain pulse generator of the PDP according to the embodiment of the present invention improves the power factor of the AC input unit 51 for supplying AC voltage and the voltage supplied from the AC input unit 1, and generates harmonics. Power Factor Collection (PFC section) 50 for removal, and DC voltage for converting and converting the DC voltage generated in PFC section 50 into a square wave, rectifying and supplying to PDP panel 70 The / DC converter 60 is provided.

The PFC unit 50 controls the current input from the AC input unit 51 to generate a sinusoidal wave having an in-phase, improve the power factor, and remove harmonic noise.

To this end, the PFC unit 50 improves the rectification circuit 12 for rectifying the AC input from the AC input unit 51 to DC and the power factor of the DC rectified in the rectifying circuit 12. A power factor improving circuit 14 is provided.

The rectifier circuit 12 is arranged in a full bridge shape and forward biased during the positive half of the AC input and the second and second diodes DF1 and DF2, and the forward bias during the negative half of the AC input. Consisting of third and fourth diodes DF3 and DF4. The rectifier circuit 12 stores the DC generated by full-wave rectifying the AC input input from the AC input unit 1 in the smoothing capacitor 2C.

The power factor correction circuit 14 is provided between the coil 2L for charging the current component of DC stored in the smoothing capacitor 2C of the rectifier circuit 12, and is provided between the coil 2L and the rectifier circuit 12 to provide the current of DC. First transistor 2T1 for switching the component to be stored in coil 2L, first capacitor Cdc1 for charging the voltage component of DC supplied from smoothing capacitor 2C by switching of first transistor 2T1. It is provided.

When the first transistor 2T1 is turned on by a control signal (not shown), a loop is formed between the smoothing capacitor 2C, the first transistor 2T1, and the coil 2L, so that a current of DC is applied to the coil 2L. The ingredients are stored. In addition, when the first transistor 2T1 is turned off by a control signal (not shown), the voltage component of DC stored in the smoothing capacitor 2C is stored in the first capacitor Cdc1.

The power factor improving circuit 14 is provided with a diode Do for blocking a reverse current flowing from the second capacitor Cdc1 to the coil 2L between the coil 2L and the first capacitor Cdc1.

Referring to FIG. 6, the DC / DC converter 60 according to the first embodiment of the present invention may include a bridge switch 62 connected to both ends of the first capacitor Cdc1 in which the output voltage of the PFC unit 50 is stored. And a transformer 6T for converting a square wave connected to the bridge switch 62 and supplied by the switching of the bridge switch 62, and a second capacitor connected in series between the transformer 6T and the bridge switch 62. 6C2) and the first inductor 6L1, and a bridge rectifier 64 in full bridge form connected to the secondary winding of the transformer 6T.

The bridge switch 62 includes first to fourth switches 6Q1, 6Q2, 6Q3, and 6Q4 disposed in a full bridge form at both ends of the first capacitor Cdc1.

The first and third switches 6Q1 and 6Q3 are connected in parallel to one end of the first capacitor Cdc1, and the second and fourth switches 6Q2 and 6Q4 are connected in parallel to the other end of the first capacitor Cdc1. do. Here, the first to fourth switches 6Q1, 6Q2, 6Q3, and 6Q4 are field effect transistors.

The first node 6N1, to which the first switch 6Q1 and the fourth switch 6Q4 are connected, is connected to the upper end of the primary winding of the transformer 6T through the second capacitor 6C2 and the first inductor 6L1. The second node 6N2 to which the second switch 6Q2 and the third switch 6Q3 are connected is connected to the lower end of the primary winding of the transformer 6T. Here, the first and second switches 6Q1 and 6Q2 are simultaneously switched or the second switch 6Q2 is switched after the first switch 6Q1 is switched. In addition, the third and fourth switches 6Q3 and 6Q4 are simultaneously switched or the fourth switch 6Q4 is switched after the third switch 6Q3 is switched.

The bridge switch 62 converts the voltage supplied from the first capacitor Cdc1 into a square wave by alternating switching of the first to fourth switches 6Q1, 6Q2, 6Q3, and 6Q4 to form a square wave 1. Supply to the car winder.

The second capacitor 6C2 is a DC blocking capacitor for preventing a current of a DC component supplied to the transformer 6T through the bridge switch 62.

The first inductor 6L1 is a resonant coil to eliminate switching losses of the first to fourth switches 6Q1, 6Q2, 6Q3, and 6Q4 of the bridge switch 62.

The transformer 6T insulates the primary winding and the secondary winding and transforms the input voltage. That is, the transformer 6T transforms the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding. One end of the primary winding of the transformer 6T is connected to the first inductor 6L1, and the other end of the primary winding is connected to the second node 6N2.

The bridge rectifier 64 is the first to fourth connected in the form of full bridges on both ends of the secondary winding of the transformer 6T, in order to rectify the polarity of the AC pulse (Vsec) induced in the secondary winding of the transformer 6T. It consists of diodes 6D1, 6D2, 6D3, 6D4.

The first and second diodes 6D1 and 6D2 rectify the positive AC pulses induced in the secondary winding of the transformer 6T into positive sustain pulses, and the third and fourth diodes 6D3 and 6D4. ) Rectifies the negative AC pulses induced in the secondary winding of the transformer 6T into positive sustain pulses. The sustain pulse of the amount rectified by the bridge rectifier 64 is supplied to the panel capacitor Cp.

The operation of the sustain pulse generator of the PDP according to the first embodiment of the present invention will be described with reference to FIG. 7 as follows.

After the first switch 6Q1 is turned on by the switching control signal, the second switch 6Q2 is turned on so that the voltages of the first capacitor Cdc1 are changed by the first switch 6Q1, the second capacitor 6C2, and the first inductor. 6L1), the primary winding of the transformer 6T, and the second switch 6Q2. Accordingly, the voltage stored in the first capacitor Cdc1 is induced as a positive voltage (+ SUS) in the secondary winding of the transformer 6T. The positive voltage (+ SUS) induced in the secondary winding is rectified to the positive sustain pulse Vcp by the first and second diodes 6D1 and 6D2 and supplied to the panel capacitor Cp.

Subsequently, the first and second switches 6Q1 and 6Q2 are turned off, and after the third switch 6Q3 is turned on by the switching control signal, the fourth switch 6Q4 is turned on so that the voltage of the first capacitor Cdc1 is turned on. Flows through the third switch 6Q3, the primary winding of the transformer 6T, the first inductor 6L1, the two capacitors 6C2, and the fourth switch 6Q4. Accordingly, the voltage stored in the first capacitor Cdc1 is induced as a negative voltage (-SUS) in the secondary winding of the transformer 6T. The negative voltage (-SUS) induced in the secondary winding is rectified to the positive sustain pulse Vcp by the third and fourth diodes 6D3 and D4 and supplied to the panel capacitor Cp.

Referring to FIG. 8, the sustain pulse generator of the PDP according to the second embodiment of the present invention includes a first capacitor Cdc1 and a first capacitor Cdc1 in which a voltage output from the PFC unit 50 (not shown) is stored. And a DC / DC converter 60 for converting the DC voltage supplied from the square wave into a square wave, rectifying the voltage, and rectifying the DC voltage.

In the first capacitor Cdc1, the voltage supplied from the AC input unit (not shown) is stored by eliminating harmonics and improving the power factor.

The DC / DC conversion unit 100 converts the square switch 102 connected to both ends of the first capacitor Cdc1 and the square wave connected to the bridge switch 102 to be supplied by the switching of the bridge switch 102. For the transformer 8T, the first capacitor 8C1 and the first inductor 8L1 connected in series between the transformer 8T and the bridge switch 102, and the diode connected to the secondary winding of the transformer 8T ( 8D1).

The bridge switch 102 includes first to fourth switches 8Q1, 8Q2, 8Q3, and 8Q4 disposed in a full bridge form at both ends of the first capacitor Cdc1.

The first and third switches 8Q1 and 8Q3 are connected in parallel to one end of the first capacitor Cdc1, and the second and fourth switches 8Q2 and 8Q4 are connected in parallel to the other end of the first capacitor Cdc1. do. Here, the first to fourth switches 8Q1, 8Q2, 8Q3, and 8Q4 are field effect transistors.

The first node 8N1, to which the first switch 8Q1 and the fourth switch 8Q4 are connected, is connected to the upper end of the primary winding of the transformer 8T through the second capacitor 8C2 and the first inductor 8L1. The second node 8N2 to which the second switch 8Q2 and the third switch 8Q3 are connected is connected to the lower end of the primary winding of the transformer 8T. The bridge switch 102 converts the voltage supplied from the first capacitor Cdc1 into a square wave by alternating switching of the first to fourth switches 8Q1, 8Q2, 8Q3, and 8Q4, thereby converting the voltage of the transformer 8T into a square wave. Supply to the car winder.

The second capacitor 8C2 is a DC blocking capacitor for preventing the current of the DC component supplied to the transformer 8T through the bridge switch 102.

The first inductor 8L1 is a resonant coil for eliminating switching losses of the first to fourth switches 8Q1, 8Q2, 8Q3, and 8Q4 of the bridge switch 102.

The transformer 8T insulates the primary winding and the secondary winding and transforms the input voltage. That is, the transformer 8T converts the voltage supplied to the primary winding by the winding ratio between the primary winding and the secondary winding. Transform into a car winding One end of the primary winding of the transformer 8T is connected to the first inductor 8L1, and the other end of the primary winding is connected to the second node 8N2.

The diode 8D1 half-waves rectifies the AC pulses induced in the secondary winding of the transformer 8T with positive sustain pulses and supplies them to the panel capacitor Cp.

The operation of the sustain pulse generator of the PDP according to the second embodiment of the present invention will be described with reference to FIG. 9 as follows.

Since the second switch 8Q2 is turned on after the first switch 8Q1 is turned on by the switching control signal, the voltage of the first capacitor Cdc1 is changed by the first switch 8Q1, the second capacitor 8C2, and the first inductor. It flows through 8L1, the primary winding of the transformer 8T, and the 2nd switch 8Q2. Accordingly, the voltage stored in the first capacitor Cdc1 is induced as a positive voltage (+ SUS) in the secondary winding of the transformer 8T. The positive voltage (+ SUS) induced in the secondary winding is rectified by the diode 8D1 into the positive sustain pulse Vcp and supplied to the panel capacitor Cp.

Subsequently, after the first and second switches 8Q1 and 8Q2 are turned off and the third switch 8Q3 is turned on by the switching control signal, the fourth switch 8Q4 is turned on so that the voltage of the first capacitor Cdc1 is decreased. It flows through the 3rd switch 8Q3, the primary winding of the transformer 8T, the 1st inductor 8L1, the 2nd capacitor 8C2, and the 4th switch 8Q4. Accordingly, the voltage stored in the first capacitor Cdc1 is induced by the negative voltage (-SUS) at the secondary winding of the transformer 8T but is blocked by the reverse biased diode 8D1 and supplied to the panel capacitor Cp. It doesn't work.

Referring to FIG. 10, a sustain pulse generator of a PDP according to a third embodiment of the present invention may be supplied from a first capacitor Cdc1 and a first capacitor Cdc1 in which a voltage output from a PFC unit (not shown) is stored. A DC / DC converter 110 for converting a DC voltage into a square wave, transforming the voltage, and rectifying and supplying the DC voltage to the PDP panel Cp is provided.

In the first capacitor Cdc1, the voltage supplied from the AC input unit (not shown) is stored by eliminating harmonics and improving the power factor.

The DC / DC converter 110 includes a bridge switch 112 connected to both ends of the first capacitor Cdc1, an intermediate tap transformer 10T for converting square waves supplied by the switching of the bridge switch 112, and The intermediate tap transformer 10T is connected to the first capacitor C1 and the first inductor L1 connected in series between the bridge switch 112 and the secondary winding of the intermediate tap transformer 10T. A full-wave rectifier 114 for rectifying the voltage induced in the secondary winding of 10T) and supplying it to the panel capacitor Cp.

The bridge switch 112 includes first to fourth switches 10Q1, 10Q2, 10Q3, and 10Q4 arranged in full bridges at both ends of the first capacitor Cdc1.

The first and third switches 10Q1 and 10Q3 are connected in parallel to one end of the first capacitor Cdc1, and the second and fourth switches 10Q2 and 10Q4 are connected in parallel to the other end of the first capacitor Cdc1. do. Here, the first to fourth switches 10Q1, 10Q2, 10Q3, and 10Q4 are field effect transistors.

The first node 10N1, to which the first switch 10Q1 and the fourth switch 10Q4 are connected, is connected to the upper end of the primary winding of the intermediate tap transformer 10T through the second capacitor 10C2 and the first inductor 10L1. The second node 10N2 to which the second switch 10Q2 and the third switch 10Q3 are connected is connected to the lower end of the primary winding of the intermediate tap transformer 10T. Here, the first and second switches 10Q1 and 10Q2 are simultaneously switched or the second switch 10Q2 is switched after the first switch 10Q1 is switched. In addition, the third and fourth switches 10Q3 and 10Q4 are simultaneously switched or the fourth switch 10Q4 is switched after the third switch 10Q3 is switched.

The bridge switch 112 converts the voltage supplied from the first capacitor Cdc1 into a square wave by alternating switching of the first to fourth switches 10Q1, 10Q2, 10Q3, and 10Q4 to the middle tap transformer 10T. Supply to primary winding of.

The second capacitor 10C2 is a DC blocking capacitor for preventing a current of a DC component supplied to the intermediate tap transformer 10T through the bridge switch 112.

The first inductor 10L1 is a resonance coil to eliminate switching losses of the first to fourth switches 10Q1, 10Q2, 10Q3, and 10Q4 of the bridge switch 112.

The middle tap transformer 10T insulates the primary winding and the secondary winding and transforms the input voltage. That is, the intermediate tap transformer 10T transforms the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding. The intermediate tap transformer 10T induces the voltage supplied to the primary winding to the secondary winding by the turns ratio between the primary tap and the intermediate tap of the secondary winding. One end of the primary winding of the intermediate tap transformer 10T is connected to the first inductor 10L1, and the other end of the primary winding is connected to the second node 10N2.

The full-wave rectifier 114 includes a first diode 10D1 disposed at both ends of the secondary winding of the intermediate tap transformer 10T and a first diode in order to rectify the AC pulse induced in the secondary winding of the intermediate tap transformer 10T. A second diode 10D2 is disposed between the diode 10D1 and the positive terminal + of the intermediate tap transformer 10T.

The second diode 10D2 rectifies the positive square wave, which is induced between the positive terminal (+) of the secondary winding and the middle tap, with a positive sustain pulse, and supplies it to the panel capacitor Cp. The first diode 10D1 rectifies the negative square wave, which is induced between the middle tab of the secondary winding and the negative terminal, with a positive sustain pulse, and supplies the same to the panel capacitor Cp.

The operation of the sustain pulse generator of the PDP according to the third embodiment of the present invention will be described with reference to FIG. 11 as follows.

After the first switch 10Q1 is turned on by the switching control signal, the second switch 10Q2 is turned on so that the voltage of the first capacitor Cdc1 may be changed by the first switch 10Q1, the second capacitor 10C2, and the first inductor. 10L1), the primary winding of the intermediate tap transformer 10T, and the second switch 10Q2. Accordingly, the voltage stored in the first capacitor Cdc1 is induced as a positive voltage (+ SUS) in the secondary winding of the intermediate tap transformer 10T. The positive voltage (+ SUS) induced in the secondary winding is rectified to the positive sustain pulse Vcp by the second diode 10D2 and supplied to the panel capacitor Cp.

Subsequently, the first and second switches 10Q1 and 10Q2 are turned off, and after the third switch 10Q3 is turned on by the switching control signal, the fourth switch 10Q4 is turned on so that the voltage of the first capacitor Cdc1 is turned on. Flows through the third switch 10Q3, the primary winding of the intermediate tap transformer 10T, the first inductor 10L1, the second capacitor 10C2, and the fourth switch 10Q4. Accordingly, the voltage stored in the first capacitor Cdc1 is induced as a negative voltage (-SUS) in the secondary winding of the intermediate tap transformer 10T. The negative voltage (-SUS) induced in the secondary winding is rectified to a positive sustain pulse by the first diode 10D1 and supplied to the panel capacitor Cp.

12, a sustain pulse generator of a PDP according to a fourth embodiment of the present invention includes first and second capacitors 12Cdc1 and 12Cdc2 in which voltages output from a PFC unit (not shown) are connected in series; A DC / DC converter 120 converts DC voltages stored in the first and second capacitors 12Cdc1 and 12Cdc2 into a square wave, transforms the voltage, and rectifies and supplies the DC voltage to the panel capacitor Cp.

In the first and second capacitors 12Cdc1 and 12Cdc2, harmonics are removed and power factor is stored and stored by a PFC unit not shown in the voltage supplied from an AC input unit not shown.

The DC / DC converter 120 may include the first and second switches 12Q1 and 12Q2 connected to both ends of the first and second capacitors 12Cdc1 and 12Cdc2, and the first and second switches 12Q1 and 12Q2. A transformer 12T for converting square waves supplied by switching, and a bridge rectifier 124 of a full bridge type connected to the secondary winding of the transformer 12T are provided.

The first switch 12Q1 is disposed between the first capacitor 12Cdc1 and the second node 12N2, and the second switch 12Q2 is disposed between the second capacitor 12Cdc2 and the second node 12N2. Here, the first and second switches 12Q1 and 12Q2 are field effect transistors. The first and second switches 12Q1 and 12Q2 convert the voltages supplied from the first and second capacitors 12Cdc1 and 12Cdc2 into square waves by alternating switching and supply them to the primary winding of the transformer 12T. .

The transformer 12T insulates the primary winding and the secondary winding and transforms the input voltage. That is, the transformer 12T transforms the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding. One end of the primary winding of the transformer 12T is connected to the second node 12N2, and the other end of the primary winding is connected to the first node 12N1 that is between the first and second capacitors 12Cdc1 and 12Cdc2. In addition, between one end of the primary winding and the second node 12N2, a DC blocking capacitor for preventing a current of a DC component supplied to the transformer 12T by switching of the first and second switches 12Q1 and 12Q2 ( 12C3) is further arranged.

The bridge rectifier 124 is a first to fourth connected to both ends of the secondary winding of the transformer 12T in the form of full bridge to rectify the polarity of the AC pulse (Vsec) induced in the secondary winding of the transformer 12T. It consists of diodes 12D1, 12D2, 12D3, 12D4.

The first and second diodes 12D1 and 12D2 rectify the positive AC pulses induced in the secondary winding of the transformer 12T into positive sustain pulses, and the third and fourth diodes 12D3 and 12D4. ) Rectifies the negative AC pulses induced in the secondary winding of the transformer 12T into positive sustain pulses. The amount of sustain pulse rectified by the bridge rectifier 124 is supplied to the panel capacitor Cp.

The operation of the sustain pulse generator of the PDP according to the fourth embodiment of the present invention will be described with reference to FIG. 13 as follows.

Since the first switch 12Q1 is turned on by the switching control signal, the voltage of the first capacitor 12Cdc1 is set to 1 of the first switch 12Q1, the second node 12N2, the third capacitor 12C3, and the transformer T. It flows through the primary winding 12N1. Accordingly, the voltage stored in the first capacitor 12Cdc1 is induced as a positive voltage (+ SUS) in the secondary winding of the transformer 12T. Positive voltage (+ SUS) induced in the secondary winding is rectified to positive sustain pulse (Vcp) by the first and second diodes 1212D1 and 12D2, and thus the panel capacitor (Cp) is rectified. Supplied to.

Subsequently, since the first switch 12Q1 is turned off and the second switch 12Q2 is turned on by the switching control signal, the voltage of the second capacitor 12Cdc2 is changed to the primary winding of the first node 12N1 and the transformer T. And flow through the third capacitor 12C3, the second node 12N2, and the second switch 12Q2. Accordingly, the voltage stored in the second capacitor 12Cdc2 is induced as a negative voltage (-SUS) in the secondary winding of the transformer 12T. The negative voltage (-SUS) induced in the secondary winding is rectified to the positive sustain pulse Vcp by the third and fourth diodes 12D3 and 12D4 and supplied to the panel capacitor Cp.

Referring to FIG. 14, a sustain pulse generator of a PDP according to a fifth embodiment of the present invention includes first and second capacitors 14Cdc1 and 14Cdc2 in which voltages output from a PFC unit (not shown) are connected in series; A DC / DC converter 130 for converting DC voltages stored in the first and second capacitors 14Cdc1 and 14Cdc2 into a square wave, transforming the voltage, and rectifying the rectified voltage is supplied to the panel capacitor Cp.

In the first and second capacitors 14Cdc1 and 14Cdc2, harmonics are removed and power factor is stored and stored by a PFC unit not shown in the voltage supplied from an AC input unit not shown.

The DC / DC converter 130 may include the first and second switches 14Q1 and 14Q2 connected to both ends of the first and second capacitors 14Cdc1 and 14Cdc2, and the first and second switches 14Q1 and 14Q2. A transformer 14T for converting square waves supplied by the switching, and a diode 14D1 connected to the secondary winding of the transformer 14T are provided.

The first switch 14Q1 is disposed between the first capacitor 14Cdc1 and the second node 14N2, and the second switch 14Q2 is disposed between the second capacitor 14Cdc2 and the second node 14N2. Here, the first and second switches 14Q1 and 14Q2 are field effect transistors. The first and second switches 14Q1 and 14Q2 convert the voltages supplied from the first and second capacitors 14Cdc1 and 14Cdc2 into square waves by alternating switching and supply them to the primary winding of the transformer 14T. .

The transformer 14T insulates the primary winding and the secondary winding and transforms the input voltage. That is, the transformer 14T transforms the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding. One end of the primary winding of the transformer 14T is connected to the second node 14N2, and the other end of the primary winding is connected to the first node 14N1 that is between the first and second capacitors 14Cdc1 and 14Cdc2. In addition, between one end of the primary winding and the second node 14N2, a DC blocking capacitor for preventing a current of a DC component supplied to the transformer 14T by switching of the first and second switches 14Q1 and 14Q2. 14C3) is further arranged.

The diode 14D1 half-waves rectifies the AC pulse induced in the secondary winding of the transformer 14T with a positive sustain pulse and supplies it to the panel capacitor Cp.

The operation of the sustain pulse generator of the PDP according to the fifth embodiment of the present invention will be described with reference to FIG. 15 as follows.

Since the first switch 14Q1 is turned on by the switching control signal, the voltage of the first capacitor 14Cdc1 is set to 1 of the first switch 14Q1, the second node 14N2, the third capacitor 14C3, and the transformer 14T. The primary winding flows through the first node 14N1. Accordingly, the voltage stored in the first capacitor 14Cdc1 is induced as a positive voltage (+ SUS) in the secondary winding of the transformer 14T. The positive voltage (+ SUS) induced in the secondary winding is rectified by the diode 14D1 into the positive sustain pulse Vcp and supplied to the panel capacitor Cp.

Subsequently, since the first switch 14Q1 is turned off and the second switch 14Q2 is turned on by the switching control signal, the voltage of the second capacitor 14Cdc2 is changed to the primary winding of the first node 14N1 and the transformer 14T. And flow through the third capacitor 14C3, the second node 14N2, and the second switch 14Q2. Accordingly, the voltage stored in the first capacitor 14Cdc1 is induced by the negative voltage (-SUS) in the secondary winding of the transformer 14T but is blocked by the reverse biased diode 14D1 and supplied to the panel capacitor Cp. It doesn't work.

Referring to FIG. 16, a sustain pulse generator of a PDP according to a sixth embodiment of the present invention includes first and second capacitors 16Cdc1 and 16Cdc2 in which voltages output from a PFC unit (not shown) are connected in series; A DC / DC converter 140 converts DC voltages stored in the first and second capacitors 16Cdc1 and 16Cdc2 into a square wave, transforms the voltage, and rectifies and supplies the DC voltage to the panel capacitor Cp.

In the first and second capacitors 16Cdc1 and 16Cdc2, harmonics are removed and power factor is stored and stored by the PFC unit, which is not shown, the voltage supplied from the AC input unit (not shown).

The DC / DC converter 140 may include the first and second switches 16Q1 and 16Q2 connected to both ends of the first and second capacitors 16Cdc1 and 16Cdc2, and the first and second switches 16Q1 and 16Q2. An intermediate tap transformer 16T for converting the square wave supplied by the switching, and a voltage connected to the secondary winding of the intermediate tap transformer 16T to rectify the voltage induced in the secondary winding of the transformer 16T to form a panel capacitor Cp. A full wave rectifier 144 is provided to the.

The first switch 16Q1 is disposed between the first capacitor 16Cdc1 and the second node 16N2, and the second switch 16Q2 is disposed between the second capacitor 16Cdc2 and the second node 16N2. Here, the first and second switches 16Q1 and 16Q2 are field effect transistors. The first and second switches 16Q1 and 16Q2 convert the voltages supplied from the first and second capacitors 16Cdc1 and 16Cdc2 into square waves by alternating switching and supply them to the primary winding of the transformer 16T. .

The middle tap transformer 16T insulates the primary winding and the secondary winding and transforms the input voltage. The intermediate tap transformer 16T transforms the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding. One end of the primary winding of the intermediate tap transformer 16T is connected to the second node N2, and the other end of the primary winding is connected to the first node 16N1 which is between the first and second capacitors 16Cdc1 and 16Cdc2. do. In addition, a DC blocking capacitor for preventing a current of a DC component supplied to the transformer 16T by switching of the first and second switches 16Q1 and 16Q2 between one end of the primary winding and the second node 16N2. 16C3) is further arranged.

The full-wave rectifier 144 is provided with a first diode 16D1 disposed across the secondary winding of the intermediate tap transformer 16T, in order to rectify the AC pulse induced in the secondary winding of the intermediate tap transformer 16T, and the first diode. A second diode 16D2 is disposed between the diode 16D1 and the positive terminal + of the middle tap transformer 16T.

The second diode 16D2 rectifies the positive square wave, which is induced between the positive terminal (+) and the middle tap of the secondary winding, to the panel capacitor Cp by rectifying the positive sustain pulse. The first diode 16D1 rectifies the negative square wave, which is induced between the middle tab of the secondary winding and the negative terminal, with a positive sustain pulse, and supplies the same to the panel capacitor Cp.

The operation of the sustain pulse generator of the PDP according to the sixth embodiment of the present invention will be described with reference to FIG. 17 as follows.

As the first switch 16Q1 is turned on by the switching control signal, the voltage of the first capacitor 16Cdc1 is set to 1 of the first switch 16Q1, the second node 16N2, the third capacitor 16C3, and the transformer 16T. The primary winding flows through the first node 16N1. Accordingly, the voltage stored in the first capacitor 16Cdc1 is induced to the positive voltage (+ SUS) in the secondary winding of the transformer 16T. The positive voltage (+ SUS) induced in the secondary winding is rectified to the positive sustain pulse Vcp by the second diode 16D1 and supplied to the panel capacitor Cp.

Subsequently, since the first switch 16Q1 is turned off and the second switch 16Q2 is turned on by the switching control signal, the voltage of the second capacitor 16Cdc2 becomes the primary winding of the first node 16N1 and the transformer 16T. And flows through the third capacitor 16C3, the second node 16N2 and the second switch 16Q2. Accordingly, the voltage stored in the second capacitor 16Cdc2 is induced to the negative voltage (-SUS) in the secondary winding of the transformer 16T. The negative voltage (-SUS) induced in the secondary winding is rectified by the first diode 16D1 into the positive sustain pulse Vcp and supplied to the panel capacitor Cp.

Referring to FIG. 18, a sustain pulse generator of a PDP according to a seventh embodiment of the present invention uses a capacitor (18Cdc) in which a voltage output from a PFC unit (not shown) and a DC voltage supplied from a capacitor (18Cdc) are square waves. And a DC / DC converter 150 for rectifying and supplying the same to the PDP panel Cp.

In the capacitor 18Cdc, the voltage supplied from the AC input unit (not shown) is stored by eliminating harmonics and improving the power factor.

The DC / DC converter 150 includes first and second switches 18Q1 and 18Q2 connected to one end of the capacitor 18Cdc; It is installed between the first and second switches 18Q1 and 18Q2, and an intermediate tap is connected to the other end of the capacitor 18Cdc to transform the voltage supplied by the switching of the first and second switches 18Q1 and 18Q2. An intermediate tap transformer 18T; A bridge rectifier 154 connected to the secondary winding of the intermediate tap transformer 18T, rectifies the voltage induced in the secondary winding of the intermediate tap transformer 18T, and supplies the rectified voltage to the panel capacitor Cp.

The first switch 18Q1 is connected to one end of the capacitor 18Cdc and the lower end of the primary winding of the middle tap transformer 18T, and the second switch 18Q2 is connected to one end of the capacitor 18Cdc and the middle tap transformer 18T. It is connected to the top of the primary winding. Here, the first and second switches 18Q1 and 18Q2 are field effect transistors. The alternating switching of the first and second switches 18Q1 and 18Q2 converts the voltage supplied from the capacitor 18Cdc into a square wave and supplies it to the primary winding of the intermediate tap transformer 18T.

The middle tap transformer 18T insulates the primary winding and the secondary winding and transforms the input voltage. That is, the intermediate tap transformer 18T transforms the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding. One end of the primary winding of the middle tap transformer 18T is connected with the first switch 18Q1, the other end is connected with the second switch 18Q2, and the middle tap is connected with the capacitor 18Cdc.

The bridge rectifier 154 is connected to both ends of the secondary winding of the intermediate tap transformer 18T in the form of a full bridge in order to rectify the polarity of the AC pulse Vsec induced in the secondary winding of the intermediate tap transformer 18T. 1 to 4 diodes 18D1, 18D2, 18D3, and 18D4.

The first and second diodes 18D1 and 18D2 rectify the positive AC pulses induced in the secondary winding of the intermediate tap transformer 18T with positive sustain pulses, and the third and fourth diodes 18D3. , 18D4 rectifies the negative AC pulses induced in the secondary winding of the intermediate tap transformer 18T into positive sustain pulses. The amount of sustain pulse rectified by the bridge rectifier 154 is supplied to the panel capacitor Cp.

The operation of the sustain pulse generator of the PDP according to the seventh embodiment of the present invention will be described with reference to FIG. 17 as follows.

The first switch 18Q1 is turned on by the switching control signal so that the voltage of the capacitor 18Cdc flows through the middle tap of the middle tap transformer 18T and the first switch 18Q1. As a result, the voltage stored in the capacitor 18Cdc is induced as a positive voltage (+ SUS) to the secondary winding of the intermediate tap transformer 18T. The positive voltage (+ SUS) induced in the secondary winding is rectified to the positive sustain pulse Vcp by the first and second diodes 18D1 and 18D2 and supplied to the panel capacitor Cp.

Subsequently, the first switch 18Q1 is turned off and the second switch 18Q2 is turned on by the switching control signal so that the voltage of the capacitor 18Cdc causes the middle tap and the second switch 18Q2 of the middle tap transformer 18T to turn off. It flows via. Accordingly, the voltage stored in the capacitor 18Cdc is induced to a negative voltage (-SUS) in the secondary winding of the intermediate tap transformer 18T. The negative voltage (-SUS) induced in the secondary winding is rectified to the positive sustain pulse Vcp by the third and fourth diodes 18D3 and 18D4 and supplied to the panel capacitor Cp.

Referring to FIG. 19, a sustain pulse generator of a PDP according to an eighth embodiment of the present invention is a square wave of a capacitor 19Cdc in which a voltage output from a PFC unit (not shown) and a DC voltage supplied from a capacitor 19Cdc are stored. And a DC / DC converter 160 for rectifying and supplying the same to the PDP panel Cp.

In the capacitor 19Cdc, the voltage supplied from the AC input unit (not shown) is stored by eliminating harmonics and improving the power factor.

The DC / DC converter 160 includes first and second switches 19Q1 and 19Q2 connected to one end of a capacitor 19Cdc; It is installed between the first and second switches 19Q1 and 19Q2, and an intermediate tap is connected to the other end of the capacitor 19Cdc to transform the voltage supplied by the switching of the first and second switches 19Q1 and 19Q2. An intermediate tap transformer 19T; A diode 19D1 is connected to the secondary winding of the intermediate tap transformer 19T to rectify the voltage induced in the secondary winding of the intermediate tap transformer 19T and supply it to the panel capacitor Cp.

The first switch 19Q1 is connected to one end of the capacitor 19Cdc and the lower end of the primary winding of the middle tap transformer 19T, and the second switch 19Q2 is connected to one end of the capacitor 19Cdc and the middle tap transformer 19T. It is connected to the top of the primary winding. Here, the first and second switches 19Q1 and 19Q2 are field effect transistors. The alternating switching of the first and second switches 19Q1 and 19Q2 converts the voltage supplied from the capacitor 19Cdc into a square wave and supplies it to the primary winding of the intermediate tap transformer 19T.

The middle tap transformer 19T insulates the primary winding and the secondary winding and transforms the input voltage. That is, the intermediate tap transformer 19T transforms the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding. One end of the primary winding of the middle tap transformer 19T is connected to the first switch 19Q1, the other end is connected to the second switch 19Q2, and the middle tap is connected to the capacitor 19Cdc.

The diode 19D1 half-wave rectifies the AC pulse Vsec induced in the secondary winding of the intermediate tap transformer 19T with a positive sustain pulse and supplies it to the panel capacitor Cp.

The operation of the sustain pulse generator of the PDP according to the eighth embodiment of the present invention will be described with reference to FIG. 20 as follows.

The first switch 19Q1 is turned on by the switching control signal so that the voltage of the capacitor 19Cdc flows through the middle tap of the middle tap transformer 19T and the first switch 19Q1. Accordingly, the voltage stored in the capacitor 19Cdc is induced to a positive voltage (+ SUS) in the secondary winding of the intermediate tap transformer 19T. The positive voltage (+ SUS) induced in the secondary winding is rectified by the diode 19D1 into the positive sustain pulse Vcp and supplied to the panel capacitor Cp.

Subsequently, since the first switch 19Q1 is turned off and the second switch 19Q2 is turned on by the switching control signal, the voltage of the capacitor 19Cdc causes the middle tap and the second switch 19Q2 of the middle tap transformer 19T to turn off. It flows via. Accordingly, the voltage stored in the capacitor 19Cdc is induced by the negative voltage (-SUS) at the secondary winding of the intermediate tap transformer 19T but is blocked by the reverse biased diode 19D1 and supplied to the panel capacitor Cp. It doesn't work.

Referring to FIG. 21, in the sustain pulse generator of the PDP according to the ninth embodiment of the present invention, a capacitor 21Cdc storing a voltage output from a PFC unit (not shown) and a DC voltage supplied from the capacitor 21Cdc are square waves. And a DC / DC converter 170 for rectifying and supplying the same to the PDP panel Cp.

In the capacitor 21Cdc, the voltage supplied from the AC input unit (not shown) is stored by eliminating harmonics and improving the power factor.

The DC / DC converter 170 includes first and second switches 21Q1 and 21Q2 connected to one end of the capacitor 21Cdc; It is installed between the first and second switches 21Q1 and 21Q2, and an intermediate tap is connected to the other end of the capacitor 21Cdc to change the voltage supplied by the switching of the first and second switches 21Q1 and 21Q2. An intermediate tap transformer 21T; A full-wave rectifier 174 connected to the secondary winding of the middle tap transformer 21T, rectifies the voltage induced in the secondary winding of the intermediate tap transformer 21T, and supplies the rectified voltage to the panel capacitor Cp.

The first switch 21Q1 is connected to one end of the capacitor 21Cdc and the lower end of the primary winding of the middle tap transformer 21T, and the second switch 21Q2 is connected to one end of the capacitor 21Cdc and the middle tap transformer 21T. It is connected to the top of the primary winding. Here, the first and second switches 21Q1 and 21Q2 are field effect transistors. By alternately switching the first and second switches 21Q1 and 21Q2, the voltage supplied from the capacitor 21Cdc is converted into a square wave and supplied to the primary winding of the intermediate tap transformer 21T.

The middle tap transformer 21T insulates the primary winding and the secondary winding and transforms the input voltage. That is, the intermediate tap transformer 21T transforms the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding. One end of the primary winding of the middle tap transformer 21T is connected to the first switch 21Q1, the other end is connected to the second switch 21Q2, and the middle tap is connected to the capacitor 21Cdc.

The full-wave rectifier 174 includes a first diode 21D1 disposed at both ends of the secondary winding of the intermediate tap transformer 21T, in order to rectify the AC pulses induced in the secondary winding of the intermediate tap transformer 21T, and the first diode. A second diode 21D2 is disposed between the diode 21D1 and the positive terminal + of the middle tap transformer 21T.

The second diode 21D2 rectifies the positive polarity (+) square wave induced between the positive terminal (+) of the secondary winding and the middle tap with a positive sustain pulse and supplies it to the panel capacitor (Cp). The first diode 21D1 rectifies a negative square wave, which is induced between the middle tab of the secondary winding and the negative terminal, with a positive sustain pulse, and supplies the same to the panel capacitor Cp.

The operation of the sustain pulse generator of the PDP according to the ninth embodiment of the present invention will be described with reference to FIG. 17 as follows.

The first switch 21Q1 is turned on by the switching control signal so that the voltage of the capacitor 21Cdc flows through the middle tap of the middle tap transformer 21T and the first switch 21Q1. Accordingly, the voltage stored in the capacitor 21Cdc is induced to be a positive voltage (+ SUS) in the secondary winding of the intermediate tap transformer 21T. The negative voltage (-SUS) induced in the secondary winding is rectified by the first diode 21D1 into the positive sustain pulse Vcp and supplied to the panel capacitor Cp.

Subsequently, since the first switch 21Q1 is turned off and the second switch 21Q2 is turned on by the switching control signal, the voltage of the capacitor 21Cdc causes the middle tap and the second switch 21Q2 of the middle tap transformer 21T to turn off. It flows via. Accordingly, the voltage stored in the capacitor 21Cdc is induced to a negative voltage (-SUS) in the secondary winding of the intermediate tap transformer 21T. The negative voltage (-SUS) induced in the secondary winding is rectified by the first diode 21D1 into the positive sustain pulse Vcp and supplied to the panel capacitor Cp.

Referring to FIG. 22, a sustain pulse generator of a PDP according to a tenth embodiment of the present invention is supplied from a first capacitor 22Cdc1 and a first capacitor 22Cdc1 in which a voltage output from a PFC unit (not shown) is stored. A DC / DC converter 180 for converting a DC voltage into a square wave, transforming the voltage, and rectifying and supplying the DC voltage to the PDP panel Cp is provided.

In the first capacitor 22Cdc1, harmonics are removed and power factor is improved and stored by a PFC unit not shown with a voltage supplied from an AC input unit not shown.

The DC / DC converter 180 is provided between a transformer 22T connected to both ends of the capacitor 22Cdc, and a switch 22Q1 installed between the transformer 22T and the capacitor 22Cdc1 to supply a square wave to the transformer 22T. And a diode 22D1 connected to the secondary winding of the transformer 22T to rectify the voltage induced in the secondary winding of the transformer 22T and supply it to the panel capacitor Cp.

The switch 22Q1 is connected to one end of the capacitor 22Cdc1 and the lower end of the primary winding of the transformer 22T. Here, the switch 22Q1 is a field effect transistor, and converts the voltage supplied from the capacitor 22Cdc1 by the switching into a square wave and supplies it to the primary winding of the transformer 22T.

The transformer 22T insulates the primary winding and the secondary winding and transforms the input voltage. That is, the transformer 22T transforms the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding. The transformer 22T induces the voltage supplied to the primary winding to the secondary winding by the turns ratio between the primary tap and the intermediate tap of the secondary winding. One end of the primary winding of the transformer 22T is connected to the switch 22Q1, and the other end of the primary winding is connected to the capacitor 22Cdc1.

The diode 22D1 half-waves rectifies the AC pulse induced in the secondary winding of the transformer 22T with a positive sustain pulse and supplies it to the panel capacitor Cp.

The operation of the sustain pulse generator of the PDP according to the tenth embodiment of the present invention will be described with reference to FIG. 23 as follows.

When the switch 22Q1 is turned on by the switching control signal, the voltage of the capacitor 22Cdc flows through the primary winding of the transformer 22T and the first switch 22Q1. As a result, the voltage stored in the capacitor 22Cdc1 is induced as a positive voltage (+ SUS) to the secondary winding of the transformer 22T. The positive voltage (+ SUS) induced in the secondary winding is rectified by the diode 22D1 into the positive sustain pulse Vcp and supplied to the panel capacitor Cp.

Then, the switch 22Q1 is turned off and no switching control signal is supplied for one period. When the switch 22Q1 is turned on by the switching control signal again after one cycle, the above-described process is repeated.

As a result, the voltage supplied from the capacitor 22Cdc1 by switching of the switch 22Q1 and induced in the secondary winding of the transformer 22T is half-wave rectified by the diode 22D1 and supplied to the panel capacitor Cp.

Meanwhile, referring to FIG. 24, the secondary winding of the transformer 24T is wound by changing the positive terminal (+) and the negative terminal (−). Accordingly, when the switch 24Q1 is turned on by the switching control signal and then turned off, as shown in FIG. 25, the voltage induced in the secondary winding of the transformer 24T flows in the reverse direction and is positive by the diode 24D1. It is rectified by the sustain pulse Vcp and supplied to the panel capacitor Cp.

Subsequently, when the switch 24Q1 is turned on again, the voltage induced in the secondary winding of the transformer 24T flows in the forward direction, and thus is blocked by the diode 24D1 and is not supplied to the panel capacitor Cp.

Referring to FIG. 26, the sustain pulse generator according to the eleventh embodiment of the present invention improves the power factor of the AC input unit 201 for supplying AC voltage and the voltage supplied from the AC input unit 201, and generates harmonics. Power factor correction circuit (PFC unit 200) to remove the power (200), DC voltage generated by the PFC unit 200 to convert the square wave, transform, and rectified DC to supply to the PDP panel 220 It is installed between the / DC converter 210, the AC input unit 201 and the PFC unit 200 detects the magnitude of the voltage input from the AC input unit 201 to the PFC unit 200 of the PFC unit 200 And a voltage sensing unit 230 for varying the output voltage and maintaining the output voltage of the arranging DC / DC converter 210 constant.

The PFC unit 200 controls a current input from the AC input unit 201 to generate a sinusoidal wave having an in-phase, improve power factor, and remove harmonic noise. To this end, the PFC unit 50 improves the rectification circuit 12 for rectifying the AC input from the AC input unit 51 to DC and the power factor of the DC rectified in the rectifying circuit 12. A power factor improving circuit 14 is provided.

The rectifier circuit 12 is arranged in a full bridge shape and forward biased during the positive half of the AC input and the second and second diodes DF1 and DF2, and the forward bias during the negative half of the AC input. Consisting of third and fourth diodes DF3 and DF4. The rectifier circuit 12 stores the DC generated by full-wave rectifying the AC input input from the AC input unit 1 in the smoothing capacitor 2C.

The power factor correction circuit 14 is provided between the coil 2L for charging the current component of DC stored in the smoothing capacitor 2C of the rectifier circuit 12, and is provided between the coil 2L and the rectifier circuit 12 to provide the current of DC. First transistor 2T1 for switching the component to be stored in coil 2L, first capacitor Cdc1 for charging the voltage component of DC supplied from smoothing capacitor 2C by switching of first transistor 2T1. It is provided.

When the first transistor 2T1 is turned on by a control signal (not shown), a loop is formed between the smoothing capacitor 2C, the first transistor 2T1, and the coil 2L, so that a current of DC is applied to the coil 2L. The ingredients are stored. In addition, when the first transistor 2T1 is turned off by a control signal (not shown), the voltage component of DC stored in the smoothing capacitor 2C is stored in the first capacitor Cdc1.

The power factor improving circuit 14 is provided with a diode Do for blocking a reverse current flowing from the second capacitor Cdc1 to the coil 2L between the coil 2L and the first capacitor Cdc1.

The voltage detector 230 detects a voltage supplied from the AC input unit 201 to the PFC unit 200, and converts the transformer control signal BS generated according to the sensed voltage into a first transistor (PFC) of the PFC unit 200. 27T1) and to the DC / DC converter 210. Accordingly, the output voltage of the PFC unit 200 varies according to the transformer control signal BS supplied to the first transistor 2T1.

For example, when the input voltage of the PFC unit 200 is 110V, the transformer control signal BS causes the output of the DC 200V from the PFC unit 200, and the input voltage of the PFC unit 200 is 220V. In this case, DC 400V is output from the PFC unit 200.

As such, the voltage detector 230 detects a change in the voltage supplied from the AC input unit 201 to the PFC unit 200 and changes the output voltage of the PFC unit 200 to a predetermined constant value.

Referring to FIG. 27, the DC / DC converter 210 according to the eleventh embodiment of the present invention may include a bridge switch 212 connected to both ends of the first capacitor Cdc1 in which the output voltage of the PFC unit 200 is stored. A transformer 27T connected to the bridge switch 212 for converting a square wave supplied by the switching of the bridge switch 212, and a second capacitor connected in series between the transformer 27T and the bridge switch 212. 27C2) and a bridge rectifier 214 of a full bridge type connected to the secondary winding of the transformer 27T.

The bridge switch 212 includes first to fourth switches 27Q1, 27Q2, 27Q3, and 27Q4 disposed in a full bridge shape at both ends of the first capacitor Cdc1.

The first and third switches 27Q1 and 27Q3 are connected in parallel to one end of the first capacitor Cdc1, and the second and fourth switches 27Q2 and 27Q4 are connected in parallel to the other end of the first capacitor Cdc1. do. Here, the first to fourth switches 27Q1, 27Q2, 27Q3, and 27Q4 are field effect transistors (Field EffecT TransisTor).

The first node 27N1, to which the first switch 27Q1 and the fourth switch 27Q4 are connected, is connected to the upper end of the primary winding of the transformer 27T through the second capacitor 27C2, and the second switch 27Q2. And the second node 27N2 to which the third switch 27Q3 is connected are connected to the lower end of the primary winding of the transformer 27T. Here, the first and second switches 27Q1 and 27Q2 are simultaneously switched or the second switch 27Q2 is switched after the first switch 27Q1 is switched. In addition, the third and fourth switches 27Q3 and 27Q4 are simultaneously switched or the fourth switch 27Q4 is switched after the third switch 27Q3 is switched.

The second capacitor 27C2 is a DC blocking capacitor for preventing a current of a DC component supplied to the transformer 27T through the bridge switch 212.

The bridge switch 212 converts the voltage supplied from the first capacitor Cdc1 into a square wave by alternating switching of the first to fourth switches 27Q1, 27Q2, 27Q3, and 27Q4, thereby converting the voltage of the transformer 27T into a square wave. Supply to the car winder.

The transformer 27T insulates the primary winding and the secondary winding and transforms the input voltage. That is, the transformer 27T transforms the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding.

The primary winding of the transformer 27T consists of a first winding L1 and an auxiliary winding L1 'arranged in parallel. In addition, the first relay (RE1) disposed between one end of each of the first winding (L1) and the auxiliary winding (L1 ') to selectively connect the first winding (L1) and the auxiliary winding (L1') in parallel, It is disposed between the other end of the auxiliary winding L1 'and the second node 27N2 to include a second relay RE2, and to connect the first winding L1 and the auxiliary winding L1' in series, the primary winding ( A third relay RE3 is disposed between one end of L1 and the other end of the auxiliary winding L1 '.

Each of the first to third relays RE1, RE2, and RE3 is operated by a transformer control signal BS supplied from the voltage sensing unit 230. At this time, the first relay RE1 and the second relay RE2 operate simultaneously with each other.

When the first and second relays RE1 and RE2 are interlocked with each other by the transformer control signal BS, the primary winding L1 of the transformer 27T is connected in parallel with the auxiliary winding L1 'and is connected to the primary. The winding ratio is twice that of the winding L1. In addition, when only the third relay RE3 is operated by the transformer control signal BS, the first winding L1 and the auxiliary winding L1 'are connected in series to have a turns ratio of 1/2. Here, the primary winding L1 and the auxiliary winding L1 'have the same number of turns.

When the first and second relays RE1 and RE2 are interlocked with each other and when only the third relay RE3 is operated, the voltage induced in the secondary winding L2 of the transformer 27T is the same. Accordingly, the voltage induced in the secondary winding L2 of the transformer 27T is set to be constant and the number of turns of the primary winding L1 is adjusted.

For example, when the output voltage of the PFC unit 200 is DC 110V by the voltage sensing unit 230, the first and second relays RE1 and RE2 are interlocked by the transformer control signal BS, and DC In the case of 220V, only the third relay RE3 is operated without the first and second relays RE1 and RE2 operating by the transformer control signal BS.

The bridge rectifier 214 may include first to fourth diodes connected in a full bridge form at both ends of the secondary winding of the transformer 27T to rectify the AC pulse generated in the secondary winding L2 of the transformer 27T. 27D1, 27D2, 27D3, 27D4).

The first and second diodes 27D1 and 27D2 rectify the positive AC pulses induced in the secondary winding of the transformer 27T into positive sustain pulses, and the third and fourth diodes 27D3 and 27D4. ) Rectifies the negative AC pulses induced in the secondary winding of the transformer 27T into positive sustain pulses. The amount of sustain pulse rectified by the bridge rectifier 274 is supplied to the panel capacitor Cp.

The operation of the sustain pulse generator of the PDP according to the eleventh embodiment of the present invention will be described below.

The AC input supplied from the AC input unit 201 is improved by harmonics and power factor by the PFC unit 200 and output as a DC voltage. The DC voltage output from the PFC unit 200 detects a voltage change rate by the voltage detecting unit 230, and the output DC voltage of the PFC unit 200 varies according to the sensed voltage to adjust the DC / DC conversion unit ( 210 is supplied. In this case, it is assumed that the primary winding of the transformer 27T is connected in parallel with the first winding L1 and the auxiliary winding L1 'by the transformer sense signal BS supplied from the voltage sensing unit 230. .

The DC voltage supplied to the DC / DC converter 210 is stored in the first capacitor Cdc1. The voltage stored in the first capacitor Cdc1 is turned on by the first switch 27Q1 after the first switch 27Q1 is turned on by a switching control signal (not shown), so that the first switch 27Q1, the second capacitor 27C2, The first relay RE1 and the second relay RE2 interlock with each other to flow through the primary winding of the transformer 27T and the second switch 27Q2 connected in parallel. Accordingly, the voltage stored in the first capacitor Cdc1 is induced as a positive voltage (+ SUS) in the secondary winding of the transformer 27T. The positive voltage (+ SUS) induced in the secondary winding is rectified to the positive sustain pulse Vcp by the first and second diodes 27D1 and 27D2 and supplied to the panel capacitor Cp.

Subsequently, the first and second switches 27Q1 and 27Q2 are turned off and the fourth switch 27Q4 is turned on after the third switch 27Q3 is turned on by the switching control signal so that the voltage of the first capacitor Cdc1 is set to the first. The third switch 27Q3, the second capacitor 27C2, the first relay RE1 and the second relay RE2 interlock with each other to flow through the primary winding of the transformer 27T connected in parallel and the fourth switch 27Q4. do. Accordingly, the voltage stored in the first capacitor Cdc1 is induced as a negative voltage (-SUS) in the secondary winding of the transformer 27T. The negative voltage (-SUS) induced in the secondary winding is rectified to the positive sustain pulse Vcp by the third and fourth diodes 27D3 and 27D4 and supplied to the panel capacitor Cp.

On the other hand, the adjustment of the winding ratio of the primary winding and the secondary winding of the transformer 27T is not limited to the primary winding of the transformer 27T1, but the first to the second to the secondary winding of the transformer 27T in parallel or in series The third relays RE1, RE2, and RE3 can be connected. That is, the secondary winding of the transformer 37T may constitute the first winding and the auxiliary winding. At this time, the number of turns of the first winding and the auxiliary winding may be the same or different.

Referring to FIG. 28, the sustain pulse generator according to the twelfth embodiment of the present invention improves the power factor of the AC input unit 201 and AC voltage supplied from the AC input unit 201 and provides harmonics. Power FacTor CollecTion (PFC unit) 250 for removal and DC voltage generated by the PFC unit 250 converts and transforms the square wave, and rectifies and supplies DC to the PDP panel 280. Disposed between the / DC converter 270 and the PFC unit 250 and the DC / DC converter 270 to stabilize the voltage supplied from the PFC unit 250 to the DC / DC converter 270 to a constant voltage. A buck converter 260 and a voltage detector 290 for detecting the output voltage of the DC / DC converter 210 to control the buck converter 260.

The PFC unit 250 includes a rectifier circuit 12 for rectifying the AC input input from the AC input unit 251 to DC and a power factor for improving the power factor of the DC rectified in the rectifier circuit 12. An improvement circuit 14 is provided.

The rectifier circuit 12 is arranged in a full bridge shape and forward biased during the positive half of the AC input and the second and second diodes DF1 and DF2, and the forward bias during the negative half of the AC input. Consisting of third and fourth diodes DF3 and DF4. The rectifier circuit 12 stores the DC generated by full-wave rectifying the AC input input from the AC input unit 1 in the smoothing capacitor 2C.

The power factor correction circuit 14 is provided between the coil 2L for charging the current component of DC stored in the smoothing capacitor 2C of the rectifier circuit 12, and is provided between the coil 2L and the rectifier circuit 12 to provide the current of DC. First transistor 2T1 for switching the component to be stored in coil 2L, first capacitor Cdc1 for charging the voltage component of DC supplied from smoothing capacitor 2C by switching of first transistor 2T1. It is provided.

When the first transistor 2T1 is turned on by a control signal (not shown), a loop is formed between the smoothing capacitor 2C, the first transistor 2T1, and the coil 2L, so that a current of DC is applied to the coil 2L. The ingredients are stored. In addition, when the first transistor 2T1 is turned off by a control signal (not shown), the voltage component of DC stored in the smoothing capacitor 2C is stored in the first capacitor Cdc1.

The power factor improving circuit 14 is provided with a diode Do for blocking a reverse current flowing from the second capacitor Cdc1 to the coil 2L between the coil 2L and the first capacitor Cdc1.

Referring to FIG. 29, the buck converter 260 may include the transistor TR and the first inductor 29L1 disposed in series at one end of the first capacitor Cdc1, the transistor TR, and the first inductor 29L1. The diode 29DB disposed between the first node 29N1 and the other end of the first capacitor Cdc1 connected to the second node 29N1 and the second capacitor 29Cdc2 disposed between the first inductor L1 and the diode 29DB are connected to each other. Equipped.

The voltage output from the PFC unit 250 is stored in the first capacitor Cdc1. The transistor TR switches the voltage input from the first capacitor Cdc1 to the first inductor 29L1 according to the voltage detection signal of the voltage sensing unit 290. The first inductor 29L1 smoothes the voltage input by switching of the transistor TR. The diode 29DB is a free wheeling diode in which a closed loop of current flowing in the first inductor 29L1 is formed when the transistor TR is turned off. The second capacitor 29Cdc2 charges the voltage input through the first inductor 29L1.

In detail, when the buck converter 260 turns on the transistor TR by the voltage detection signal, the input voltage from the first capacitor Cdc1 is transferred through the first inductor 29L1 to the second capacitor 29Cdc2. ) Is charged. On the other hand, when the transistor TR is turned off, the current flowing in the first inductor 29L1 forms a current loop through the second capacitor 29Cdc2 and the diode 29DB. Accordingly, the input voltage of the buck converter 260 is smaller than the output voltage, the output voltage is stabilized to a constant voltage.

The voltage detector 290 detects the magnitude of the output voltage of the transformer 29T to be described later, generates a voltage detection signal corresponding to the detected voltage, and supplies it to the buck converter 260. That is, the voltage detection signal controls the switching of the transistor TR of the buck converter 260 to stabilize the voltage supplied to the primary winding of the transformer 29T to a constant voltage.

The DC / DC converter 270 is connected to the bridge switch 272 connected to both ends of the second capacitor 29Cdc2 in which the output voltage of the buck converter 260 is stored, and the bridge switch 272 is connected to the bridge switch 272. Transformer 29T for transforming the voltage of the square wave supplied by the switching of the &lt; RTI ID = 0.0 &gt;), &lt; / RTI &gt; Full bridge type bridge rectifier 274 connected to the winding is provided.

The bridge switch 272 includes first to fourth switches 29Q1, 29Q2, 29Q3, and 29Q4 disposed in a full bridge at both ends of the second capacitor 29Cdc2.

The first and third switches 29Q1 and 29Q3 are connected in parallel to one end of the second capacitor 29Cdc2, and the second and fourth switches 29Q2 and 29Q4 are connected in parallel to the other end of the first capacitor 29Cdc2. do. Here, the first to fourth switches 29Q1, 29Q2, 29Q3, and 29Q4 are field effect transistors.

The second node 29N2, to which the first switch 29Q1 and the fourth switch 29Q4 are connected, is connected to the upper end of the primary winding of the transformer 29T through the third capacitor 29C3 and the second inductor 29L2. The third node 29N3 to which the second switch 29Q2 and the third switch 29Q3 are connected is connected to the lower end of the primary winding of the transformer 29T. Here, the first and second switches 29Q1 and 29Q2 are simultaneously switched or the second switch 29Q2 is switched after the first switch 29Q1 is switched. In addition, the third and fourth switches 29Q3 and 29Q4 are simultaneously switched or the fourth switch 29Q4 is switched after the third switch 29Q3 is switched.

The bridge switch 272 converts the voltage supplied from the second capacitor 29Cdc2 into a square wave by alternating switching of the first to fourth switches 29Q1, 29Q2, 29Q3, and 29Q4, thereby converting the voltage of the transformer 29T into a square wave. Supply to the car winder.

The third capacitor 29C3 is a DC blocking capacitor for preventing a current of a DC component supplied to the transformer 29T through the bridge switch 272.

The second inductor 29L2 is a resonant coil to eliminate switching losses of the first to fourth switches 29Q1, 29Q2, 29Q3, and 29Q4 of the bridge switch 272.

The transformer 29T insulates the primary winding and the secondary winding and transforms the input voltage. That is, the transformer 29T transforms the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding. One end of the primary winding of the transformer 29T is connected to the second inductor 29L2, and the other end of the primary winding is connected to the third node 29N3.

The bridge rectifier 274 is a first to fourth connected to both ends of the secondary winding of the transformer 29T in the form of full bridge in order to rectify the polarity of the AC pulse (Vsec) induced in the secondary winding of the transformer 29T. It consists of the diodes 29D1, 29D2, 29D3, 29D4.

The first and second diodes 29D1 and 29D2 rectify the positive (+) alternating pulses induced in the secondary winding of the transformer 29T into positive sustain pulses, and the third and fourth diodes 29D3 and 29D4. ) Rectifies the negative AC pulses induced in the secondary winding of the transformer 29T into positive sustain pulses. The amount of sustain pulse rectified by the bridge rectifier 274 is supplied to the panel capacitor Cp.

The operation of the sustain pulse generator of the PDP according to the twelfth embodiment of the present invention is as follows.

AC power supplied from the AC input unit 251 is improved by harmonics and power factor by the PFC unit 250 and is output as a DC voltage. The voltage output from the PFC unit 250 is supplied to the buck converter 260, and the voltage supplied to the buck converter 260 is stabilized to a constant voltage by the voltage detection signal of the voltage detector 290. The output voltage of the buck converter 260 stabilized to a constant voltage is stored in the second capacitor 29Cdc2.

The voltage stored in the second capacitor (29Cdc2) is the first switch 29Q1, the third capacitor (29C3), the second inductor by turning on the second switch 29Q2 after the first switch (29Q1) is turned on by the switching control signal It flows through 29L2, the primary winding of the transformer 29T, and the 2nd switch 29Q2. Accordingly, the voltage stored in the second capacitor 29Cdc2 is induced to the positive voltage (+ SUS) in the secondary winding of the transformer 29T. The positive voltage (+ SUS) induced in the secondary winding is rectified to the positive sustain pulse Vcp by the first and second diodes 29D1 and 29D2 and supplied to the panel capacitor Cp.

Subsequently, the first and second switches 29Q1 and 29Q2 are turned off, and after the third switch 29Q3 is turned on by the switching control signal, the fourth switch 29Q4 is turned on so that the voltage of the second capacitor 29Cdc2 is turned on. Flows through the third switch 29Q3, the primary winding of the transformer 29T, the second inductor L2, the third capacitor 29C3, and the fourth switch 29Q4. Accordingly, the voltage stored in the second capacitor 29Cdc2 is induced as a negative voltage (-SUS) in the secondary winding of the transformer 29T. The negative voltage (-SUS) induced in the secondary winding is rectified to the positive sustain pulse Vcp by the third and fourth diodes 29D3 and 29D4 and supplied to the panel capacitor Cp.

In the sustain pulse generator of the PDP according to the twelfth embodiment of the present invention, the buck converter 260 may be connected to the DC / DC converter as in the first to eleventh embodiments of the present invention.

Referring to FIG. 30, a sustain pulse generator of a PDP according to a thirteenth embodiment of the present invention is connected to one end of a panel capacitor Cp, and supplies a Y driver 320 to supply a first step of three steps of sustain pulses. A Z driving part 330 is connected to the other end of the capacitor Cp to supply a 3-step sustain pulse having an antiphase with a 3-step second sustain pulse.

The Y driver 320 converts the DC voltage supplied from the first capacitor 30Cdc1 and the DC capacitor supplied from the first capacitor 30Cdc1 into which the voltage output from the PFC unit (not shown) is converted into a square wave, rectifies and rectifies the panel capacitor. And a first DC / DC converter 315 for supplying Cp).

In the first capacitor 30Cdc1, harmonics are removed and power factor is improved and stored by the PFC unit, which is not shown, the voltage supplied from the AC input unit, which is not shown.

The first DC / DC converter 315 is connected to the first bridge switch 312 connected to both ends of the first capacitor 30Cdc1 and the first bridge switch 312 to switch the first bridge switch 312. A first transformer 30T1 for converting the square wave supplied by the second capacitor, a second capacitor 30C2 and a first inductor 30L1 connected in series between the first transformer 30T1 and the first bridge switch 312; A first rectifier circuit 314 is provided between the secondary winding of the first transformer 30T1 and the panel capacitor Cp.

The first bridge switch 312 is composed of first to fourth switches 30Q1, 30Q2, 30Q3, and 30Q4 arranged in full bridges at both ends of the first capacitor 30Cdc1.

The first and third switches 30Q1 and 30Q3 are connected in parallel to one end of the first capacitor 30Cdc1, and the second and fourth switches 30Q2 and 30Q4 are connected in parallel to the other end of the first capacitor 30Cdc1. do. Here, the first to fourth switches 30Q1, 30Q2, 30Q3, and 30Q4 are field effect transistors.

The first node 30N1, to which the first switch 30Q1 and the fourth switch 30Q4 are connected, is connected to the upper end of the primary winding of the transformer T through the second capacitor 30C2 and the first inductor 30L1. The second node 30N2 to which the second switch 30Q2 and the third switch 30Q3 are connected is connected to the lower end of the primary winding of the first transformer 30T1.

The first bridge switch 312 converts the voltage supplied from the first capacitor 30Cdc1 into a square wave by alternating switching of the first to fourth switches 30Q1, 30Q2, 30Q3, and 30Q4 to form a first transformer. Supply to the primary winding of 30T1).

The second capacitor 30C2 is a DC blocking capacitor for preventing a current of a DC component supplied to the first transformer 30T1 through the first bridge switch 312.

The first inductor 30L1 is a resonant coil for eliminating switching losses of the first to fourth switches 30Q1, 30Q2, 30Q3, and 30Q4 of the first bridge switch 312.

The first transformer 30T1 insulates the primary winding and the secondary winding and transforms the input voltage. That is, the first transformer 30T1 transforms the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding. One end of the primary winding of the first transformer 30T1 is connected to the first inductor 30L1, and the other end of the primary winding is connected to the second node 30N2.

The first rectifier circuit 314 is disposed between the one end of the secondary winding of the first transformer 30T1 and the panel capacitor Cp in order to rectify the AC pulse induced in the secondary winding of the first transformer 30T1. 5th switch 30Q5 and 6th switch 30Q6 arrange | positioned between the 5th switch 30Q5 and the other end of the secondary winding of the 1st transformer 30T1.

The fifth switch 30Q5 rectifies the AC signal induced in the secondary winding of the first transformer 30T1 by the switching control signal and supplies the rectified AC signal to the panel capacitor Cp. The sixth switch 30Q6 discharges the voltage stored in the panel capacitor Cp to the base voltage source GND by the switching control signal. Here, the fifth and sixth switches 30Q5 and 30Q6 are field effect transistors.

The Z driver 330 converts the DC voltage supplied from the third capacitor 30Cdc3 and the third capacitor 30Cdc3 stored with the voltage output from the PFC unit (not shown) into square waves, rectifies the voltage, and rectifies the panel capacitor. And a second DC / DC converter 315 'for supplying to Cp).

In the third capacitor 30Cdc3, the voltage supplied from the AC input unit (not shown) is stored by eliminating harmonics and improving the power factor.

The second DC / DC conversion unit 315 'is connected to the second bridge switch 312' connected to both ends of the third capacitor 30Cdc3, and the second bridge switch 312 'is connected to the second bridge switch 312'. The second transformer 30T2 for converting the square wave supplied by the switching of), the fourth capacitor 30C4 and the second inductor connected in series between the second transformer 30T2 and the second bridge switch 312 ' 30L2 and a second rectifier circuit 314 'provided between the secondary winding of the second transformer 30T2 and the panel capacitor Cp.

The second bridge switch 312 ′ is composed of seventh to tenth switches 30Q7, 30Q8, 30Q9, and 30Q10 arranged in full bridges at both ends of the third capacitor 30Cdc3.

The seventh and ninth switches 30Q7 and 30Q9 are connected in parallel to one end of the third capacitor 30Cdc3, and the eighth and tenth switches 30Q8 and 30Q10 are connected in parallel to the other end of the third capacitor 30Cdc3. do. Here, the seventh to tenth switches 30Q7, 30Q8, 30Q9, and 30Q10 are field effect transistors.

The fourth node 30N4, to which the eighth switch 30Q8 and the ninth switch 30Q9 are connected, is connected to the upper end of the primary winding of the second transformer 30T2 through the third capacitor 30C4 and the second inductor 30L2. The third node 30N3 connected to the seventh switch 30Q7 and the tenth switch 30Q10 is connected to the lower end of the primary winding of the second transformer 30T2.

The second bridge switch 312 ′ converts a voltage supplied from the third capacitor 30Cdc3 into a square wave by alternating switching of the seventh to tenth switches 30Q7, 30Q8, 30Q9, and 30Q10 to a second wave. Supply to the primary winding of (30T2).

The fourth capacitor 30C4 is a DC blocking capacitor for preventing a current of the DC component supplied to the second transformer 30T2 through the second bridge switch 312 '.

The second inductor 30L2 is a resonance coil to eliminate switching losses of the seventh to tenth switches 30Q7, 30Q8, 30Q9, and 30Q10 of the second bridge switch 312 ′.

The second transformer 30T2 insulates the primary winding and the secondary winding and transforms the input voltage. That is, the second transformer 30T2 transforms the voltage supplied to the primary winding into the secondary winding by the turns ratio of the primary winding and the secondary winding. One end of the primary winding of the second transformer 30T2 is connected to the second inductor 30L2, and the other end of the primary winding is connected to the third node 30N3.

The second rectifier circuit 314 ′ is disposed between one end of the secondary winding of the second transformer 30T2 and the panel capacitor Cp to rectify the AC pulse induced in the secondary winding of the second transformer 30T2. An eleventh switch 30Q11 and a twelfth switch 30Q12 disposed between the eleventh switch 30Q11 and the other end of the secondary winding of the second transformer 30T2 are provided.

The eleventh switch 30Q11 rectifies the AC signal induced in the secondary winding of the second transformer 30T2 by the switching control signal and supplies the rectified AC signal to the panel capacitor Cp. The twelfth switch 30Q12 discharges the voltage stored in the panel capacitor Cp to the base voltage source GND by the switching control signal. Here, the eleventh and twelfth switches 30Q11 and 30Q12 are field effect transistors.

The operation of the sustain pulse generator of the PDP according to the thirteenth embodiment of the present invention will be described with reference to FIG. 31 as follows.

After the first switch 30Q1 of the Y driver 320 is turned on by the switching control signal, the second switch 30Q2 is turned on so that the voltage of the first capacitor 30Cdc1 is changed to the first switch 30Q1 and the second capacitor 30C2. ), The first inductor 30L1, the primary winding of the first transformer 30T1, and the second switch 30Q2. Accordingly, the voltage stored in the first capacitor 30Cdc1 is induced to a positive voltage (+ SUS) in the secondary winding of the first transformer 30T1. The positive voltage + SUS induced in the secondary winding is supplied to the panel capacitor Cp by switching of the fifth switch 30Q5.

At the same time, the Z driving unit 330 also turns on after the seventh switch 30Q7 is turned on by the switching control signal, so that the voltage of the third capacitor 30Cdc3 is changed to the seventh switch 30Q7 and the fifth switch 30Q8. It flows through the primary winding of the 2nd transformer 30T2, the 2nd inductor 30L2, the 4th capacitor 30C4, and the 8th switch 30Q8. Accordingly, the voltage stored in the third capacitor 30Cdc3 is induced as a negative voltage (-SUS) in the secondary winding of the second transformer 30T2. The negative voltage -SUS induced in the secondary winding is supplied to the panel capacitor Cp by switching of the eleventh switch 30Q11.

Subsequently, when the first and second switches 30Q1 and 30Q2 of the Y driving unit 320 are turned off and the Z driving unit 330 also turns off the seventh and eighth switches 30Q7 and 30Q8, the switching control signal is applied. As a result, the sixth switch 30Q6 and the twelfth switch 30Q12 are turned on to discharge the voltage stored in the panel capacitor Cp to the ground voltage cloud GND.

Then, after the third switch 30Q3 of the Y driver 320 is turned on by the switching control signal, the fourth switch 30Q4 is turned on, so that the voltage of the first capacitor 30Cdc1 is changed to the third switch 30Q3, the third. It flows through the primary winding of the 1st transformer 30T1, the 1st inductor 30L1, the 2nd capacitor 30C2, and the 4th switch 30Q4. Accordingly, the voltage stored in the first capacitor 30Cdc1 is induced as a negative voltage (-SUS) in the secondary winding of the first transformer 30T1. The negative voltage -SUS induced in the secondary winding is supplied to the panel capacitor Cp by switching of the fifth switch 30Q5.

At the same time, after the ninth switch 30Q9 of the Z driving unit 330 is turned on by the switching control signal, the tenth switch 30Q10 is turned on so that the voltage of the third capacitor 30Cdc3 is changed to the ninth switch 30Q9, 4. It flows through the capacitor 30C4, the 2nd inductor 30L2, the primary winding of the 2nd transformer 30T2, and the 10th switch 30Q10. Accordingly, the voltage stored in the third capacitor 30Cdc3 is induced as a positive voltage (+ SUS) in the secondary winding of the second transformer 30T2. The positive voltage + SUS induced in the secondary winding is supplied to the panel capacitor Cp by switching of the eleventh switch 30Q11.

Subsequently, when the first and second switches 30Q1 and 30Q2 of the Y driving unit 320 are turned off and the Z driving unit 330 also turns off the seventh and eighth switches 30Q7 and 30Q8, the switching control signal is applied. As a result, the sixth switch 30Q6 and the twelfth switch 30Q12 are turned on to discharge the voltage stored in the panel capacitor Cp to the ground voltage cloud GND.

The sustain pulse of the PDP panel is supplied to the panel capacitor Cp by supplying a sustain pulse having three steps having reverse phases to each other, that is, a positive potential (+ SUS) and a base potential (0 V) and a negative potential (-SUS). The voltage at can be reduced in half.

As described above, the sustain pulse generator of the plasma display panel according to the embodiment of the present invention simplifies the circuit configuration by integrating the conventional DC / DC converter and the sustain pulse supply. Accordingly, the circuit loss generated in the process of converting the AC power source into the sustain pulse can be minimized, and heat and power consumption generated in the plasma display panel due to the circuit loss are reduced.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (63)

A DC converter for converting AC voltage into DC voltage, A switching unit for converting the DC voltage into a square wave; A transformer for guiding the square wave to a secondary side connected to the panel; And a rectifier for rectifying and supplying the square wave guided to the secondary side to the panel. The method of claim 1, The DC converter, A plurality of diodes connected in a bridge form between an input voltage source and the switching unit, A first capacitor connected between the bridge type diode and the switching unit, A power factor improving circuit connected between the first capacitor and the switching unit; And a second capacitor connected between the power factor improving circuit portion and the switching portion. The method of claim 2, And the second capacitor includes a third capacitor and a fourth capacitor connected in parallel between the power factor improving circuit and the switching unit. The method of claim 2, The switching unit includes a plurality of transistors connected in a bridge form between the second capacitor and the transformer. The method of claim 2, And the switching unit includes a transistor connected between the second capacitor and the transformer. The method of claim 3, wherein The switch unit, A first transistor connected between the third capacitor and the transformer, And a second transistor connected between the first transistor and the fourth capacitor. The method of claim 2, And the switching unit includes third and fourth capacitors connected in parallel between the second capacitor and the transformer. The method of claim 1, And a smoothing capacitor connected between the switching unit and the transformer. The method of claim 8, And an inductor connected between the smoothing capacitor and the transformer. The method of claim 1, The rectifier includes a plurality of diodes connected in a bridge form between the transformer and the panel sustain pulse generator of the plasma display panel. The method of claim 10, The diodes, First diodes connected to both ends of the secondary side of the transformer; And a second diode connected to said first diode and a secondary side of said transformer. The method of claim 1, And said rectifier comprises a diode connected between said transformer and said panel. The method of claim 1, The transformer is a sustain pulse generator of the plasma display panel, characterized in that the first winding has an intermediate tab. The method of claim 13, And the intermediate tab is connected to the second capacitor. The method of claim 1, The transformer is a sustain pulse generator of the plasma display panel, characterized in that it comprises an intermediate tab in the secondary winding. The method of claim 15, And the intermediate tab is connected to the panel. The method of claim 1, The transformer comprises a first intermediate tap connected to the primary winding; And a second intermediate tab connected to the secondary winding. The method of claim 17, The first intermediate tab is connected to the second capacitor, And the second intermediate tab is connected to the panel. A DC converter for converting AC voltage into DC voltage, A detector for detecting the level of the AC voltage; A switching unit for converting the DC voltage into a square wave; A transformer for guiding the square wave to a secondary side connected to the panel; A controller for controlling a turns ratio of the transformer according to the detected AC voltage level; And a rectifier for rectifying and supplying the square wave induced on the secondary side to the panel. The method of claim 19, The DC converter, A plurality of diodes connected in a bridge form between an input voltage source and the switching unit, A first capacitor connected between the bridge type diode and the switching unit, A power factor improving circuit connected between the first capacitor and the switching unit; And a second capacitor connected between the power factor improving circuit portion and the switching portion. The method of claim 20, And the second capacitor includes a third capacitor and a fourth capacitor connected in parallel between the power factor improving circuit and the switching unit. The method of claim 20, The switching unit includes a plurality of transistors connected in a bridge form between the second capacitor and the transformer. The method of claim 20, And the switching unit includes a transistor connected between the second capacitor and the transformer. The method of claim 20, The switch unit, A first transistor connected between the third capacitor and the transformer, And a second transistor connected between the first transistor and the fourth capacitor. The method of claim 20, And the switching unit includes third and fourth capacitors connected in parallel between the second capacitor and the transformer. The method of claim 19, And a smoothing capacitor connected between the switching unit and the transformer. The method of claim 26, And an inductor connected between the smoothing capacitor and the transformer. The method of claim 19, The rectifier includes a plurality of diodes connected in a bridge form between the transformer and the panel sustain pulse generator of the plasma display panel. The method of claim 28, The diodes, First diodes connected to both ends of the secondary side of the transformer; And a second diode connected to said first diode and a secondary side of said transformer. The method of claim 19, And said rectifier comprises a diode connected between said transformer and said panel. The method of claim 19, The transformer is a sustain pulse generator of the plasma display panel, characterized in that the auxiliary winding. The method of claim 31, wherein And the auxiliary winding is connected to any one of a primary winding and a secondary winding of the transformer. The method of claim 32, The control unit includes a first switch connected between the auxiliary winding and the primary winding; A second switch connected between the auxiliary winding and the switching unit and interlocked with the first switch; And a third switch which connects the auxiliary winding and the primary winding in series to be connected between the auxiliary winding and the primary winding. The method of claim 32, The control unit includes a first switch connected between the auxiliary winding and the secondary winding, A second switch connected between the auxiliary winding and the rectifier and interlocked with the first switch; And a third switch which connects the auxiliary winding and the secondary winding in series to be connected between the auxiliary winding and the secondary winding. The method of claim 19, And a smoothing capacitor disposed between the switching unit and the control unit. The method of claim 19, The DC converter, A diode full-wave bridge rectifier for converting the AC voltage into a square wave; A capacitor for storing the square wave, And a power factor improvement circuit for improving the power factor of the voltage stored from the capacitor and converting the voltage into a DC voltage. A DC converter for converting AC voltage into DC voltage, A switching unit for converting the DC voltage into a square wave; A transformer for guiding the square wave to a secondary side connected to the panel; A detector for detecting an output voltage of the transformer; A voltage stabilizer installed between the DC converter and the transformer to maintain a constant input voltage of the transformer; A control unit controlling the voltage stabilizer according to the detected output voltage of the transformer; And a rectifier for rectifying and supplying the square wave guided to the secondary side to the panel. The method of claim 37, The DC converter, A plurality of diodes connected in a bridge form between an input voltage source and the switching unit, A first capacitor connected between the bridge type diode and the switching unit, A power factor improving circuit connected between the first capacitor and the switching unit; And a second capacitor connected between the power factor improving circuit portion and the switching portion. The method of claim 38, And the second capacitor includes a third capacitor and a fourth capacitor connected in parallel between the power factor improving circuit and the switching unit. The method of claim 38, The switching unit includes a plurality of transistors connected in a bridge form between the second capacitor and the transformer. The method of claim 38, And the switching unit includes a transistor connected between the second capacitor and the transformer. The method of claim 39, The switch unit, A first transistor connected between the third capacitor and the transformer, And a second transistor connected between the first transistor and the fourth capacitor. The method of claim 38, And the switching unit includes third and fourth capacitors connected in parallel between the second capacitor and the transformer. The method of claim 37, And a smoothing capacitor connected between the switching unit and the transformer. The method of claim 44, And an inductor connected between the smoothing capacitor and the transformer. The method of claim 37, The rectifier includes a plurality of diodes connected in a bridge form between the transformer and the panel sustain pulse generator of the plasma display panel. The method of claim 46, The diodes, First diodes connected to both ends of the secondary side of the transformer; And a second diode connected to said first diode and a secondary side of said transformer. The method of claim 37, And said rectifier comprises a diode connected between said transformer and said panel. The method of claim 38, The voltage stabilizer, And a buck circuit connected between the second capacitor and the switching unit. The method of claim 49, The buck circuit is, A switch connected between the second capacitor and the switching unit, An inductor connected between the switch and the switching unit; A third capacitor connected between the inductor and the switching unit, And a diode connected between the switch and the inductor and between the third capacitor. And a sustain drive circuit for inverting the polarity of the square wave and rectifying the square wave to generate a sustain waveform of at least two steps or more. The method of claim 51, wherein The sustain drive circuit, A first driver connected to the first electrode of the panel to supply the sustain waveform to the first electrode; And a second driving part connected to the second electrode of the panel to supply a sustain waveform having an antiphase with the sustain waveform to the second electrode, wherein the sustain pulse generator of the plasma display panel is further provided. The method of claim 52, wherein The first driving unit, A first DC converter for converting an AC voltage into a DC voltage, A first switching unit which converts the DC voltage into a square wave, A first transformer for guiding the square wave to a secondary side connected to the panel; And a first rectifier for rectifying and supplying the square wave guided to the secondary side to the first electrode of the panel. The method of claim 52, wherein The second drive unit, A second DC converter for converting an AC voltage into a DC voltage, A second switching unit converting the DC voltage into a square wave, A second transformer for guiding the square wave to a secondary side connected to the panel; And a second rectifier for rectifying the square wave guided to the secondary side and supplying the square wave to the second electrode of the panel. The method of claim 53, wherein And the first switching unit comprises a plurality of transistors connected in a bridge form between the first DC converter and the first transformer. The method of claim 55, And a first smoothing capacitor connected between the first switching unit and the first transformer. The method of claim 56, wherein And a first inductor connected between the first smoothing capacitor and the first transformer. The method of claim 53, wherein The first rectifier includes a plurality of diodes connected in a bridge form between the first transformer and the panel. The method of claim 54, wherein The second switching unit includes a plurality of transistors connected in a bridge form between the second DC converter and the second transformer. The method of claim 54, wherein And a second smoothing capacitor connected between the second switching unit and the second transformer. The method of claim 60, And a second inductor connected between the second smoothing capacitor and the second transformer. The method of claim 54, wherein And the second rectifier comprises a plurality of diodes connected in a bridge form between the second transformer and the panel. The method of claim 51, wherein And the sustain waveform is three steps of a positive potential, a ground potential, and a negative potential.