KR20030043622A - Encoding/decoding apparatus for coordinate interpolator, and recordable medium containing coordinate interpolator encoded bit stream - Google Patents

Abstract

PURPOSE: A system for encoding/decoding key data and key value data of coordinate interpolator and a recording medium storing bit streams obtained by encoding the coordinate interpolator are provided to encode animation key data with high efficiency and encode key value data in consideration of time and spatial correlations. CONSTITUTION: A bit stream recorded in a recording medium includes key data encoding/decoding information and key value data encoding/decoding information. The key data encoding/decoding information includes inverse DND calculation information that extends the range of differential data generated by entropy-decoding the key data bit stream, the first inverse DPCM calculation information for converting the differential data for which inverse DND calculation has been carried out into quantized key data, and the first inverse quantization information used for inverse quantization that inverse-quantizes the quantized key data to generate restored key data. The key value data encoding/decoding information includes previous decoding information of previously encoded key value data that is entropy-decoded from key value data bit stream, the second inverse DPCM calculation information used for converting previously decoded differential data into quantized key value data, and the second inverse quantization information used for inverse quantization for inverse-quantizing the quantized key value data to generate restored key data.

Description

An apparatus for encoding / decoding key and key value data of a coordinate interpolator, and a recording medium for recording a bitstream encoding the coordinate interpolator. {Encoding / decoding apparatus for coordinate interpolator, and recordable medium containing coordinate interpolator encoded bit stream}

The present invention relates to an apparatus and method for encoding and decoding composite images. Specifically, the present invention relates to an apparatus and method for encoding and decoding a coordinate interpolator that expresses a position of an object in coordinates of vertices including x, y, and z components in a key frame-based graphic animation scheme.

It is well known that the 3D animation representation technique is used in a 3D computer game or a virtual reality environment of a computer. VRML (Virtual Reality Modeling Language) is a representative example of 3D animation.

International multimedia standards such as MPEG-4 BIFS (Binary Format for Scene) and VRML (Virtual Reality Modeling Language) support key frame-based three-dimensional animation using interpolator nodes. There are several types of interpolators in MPEG-4 BIFS and VRML, among which are scalar interpolators, position interpolators, coordinate interpolators, rotation interpolators, normal interpolators, and color interpolators. The types, functions, and features of each interpolator are shown in Table 1 below.

Kinds Characteristic function Scalar interpolator Linear Insertion of Scalar Variance Representation of area, radius, strength, etc. Position interpolator Linear insertion in three-dimensional coordinates Parallel translation in three dimensions Rotary interpolator Linear Insertion of 3D Coordinate Axis and Rotation Amount Rotation in 3D Space Coordinate interpolator Coordinate Variation and Linear Insertion in 3D Models 3D morphing Normal interpolator Linear insertion of three-dimensional normal coordinates Change representation of 3D normal vector Color interpolator Linear insertion of color information Representation of the amount of color change

The coordinate interpolator, which is one of the interpolators described in Table 1, is used to indicate position information of each vertex included in a three-dimensional object of a key frame-based animation, and includes a key and a key-value field. It consists of. The key field represents the time when the key frame is located in the range (−∞, + ∞) as a discrete number. The key value field represents position information of each vertex included in the 3D object at the time indicated by each key, and each vertex has three components, x, y, and z. Thus, the key value field contains the same number of key values as the key field. In such a key frame-based animation scheme, a predetermined key frame is located at an arbitrary time on the time axis, and animation data between each key frame is interpolated by a linear interpolation method.

Since MPEG-4 BIFS and VRML use linear interpolation, a very large amount of key data and key value data is required for smooth and natural animation using a linear interpolator. In addition, storing or transmitting such smooth and natural animations requires a large amount of storage and a lot of time. Therefore, compressing the interpolator is effective for storing and transmitting these interpolators.

In MPEG-4 BIFS, there is a method called Predictive MF Coding (PMFC) as a method of encoding and decoding an interpolator node. Like the conventional encoding apparatus shown in FIG. 1, the PMFC method encodes the key and key value data of the coordinate interpolator using a quantizer, a differential pulse code modulation (DPCM), and an entropy encoder. The quantizer and the DPCM module remove redundancy of the key and key value data, and the output of the DPCM module is output to the entropy encoder. However, this method entropy encodes differential data obtained by a general DPCM operation, so that the coding efficiency is not high. In addition, the conventional encoding apparatus only considers the spatial correlation between the vertices constituting the shape of the three-dimensional object, and does not consider the temporal correlation, which occupies a considerable weight in the key frame animation method, so that the encoding efficiency is low. Not high.

SUMMARY OF THE INVENTION The first technical problem to be solved by the present invention is a key data encoder which compresses animation key data with high efficiency by removing data redundancy in consideration of the nature of key data, and a key value in consideration of not only spatial correlation but also temporal correlation. An apparatus for encoding a coordinate interpolator including a key value data encoder for encoding data is provided.

The second technical problem of the present invention is to provide a decoding apparatus for decoding a bitstream encoded by the above-described coordinate interpolator encoding apparatus of the present invention.

The third technical problem to be solved by the present invention is a bitstream encoded by the encoding method and apparatus of the coordinate interpolator of the present invention, which can provide high compression ratio and high quality animation, and is decoded by the decoding method and apparatus of the present invention. It is to provide a recording medium recording the recording.

1 is a block diagram showing a configuration of a coding / decoding apparatus of a conventional coordinate interpolator node.

2 is a block diagram showing the configuration of a coordinate interpolator encoding apparatus according to a preferred embodiment of the present invention.

3A is a block diagram showing the configuration of a key data encoder according to a preferred embodiment of the present invention.

FIG. 3B is a block diagram showing the configuration of the DND processing unit shown in FIG. 3A.

4A to 4E are flowcharts illustrating a key data encoding method according to a preferred embodiment of the present invention.

5 is a diagram illustrating an example of the encodeSignedAAC function.

6A to 6J are diagrams showing key data after operations for encoding key data are performed according to a preferred embodiment of the present invention.

7A is a block diagram showing the configuration of a coordinate interpolator key value data encoder according to a preferred embodiment of the present invention, and FIG. 7B is a flowchart illustrating a method of encoding coordinate interpolator key value data according to a preferred embodiment.

8A is a block diagram showing the configuration of a DPCM processing unit of a key value data encoder according to the preferred embodiment of the present invention, and FIG. 8B is a block diagram showing the configuration of a pre-encoder.

9A is a flowchart illustrating a quantization method according to a preferred embodiment of the present invention, FIG. 9B is a flowchart illustrating a DPCM calculation method, FIG. 9C is a flowchart illustrating a precoding method, and FIG. 9D is a key of the present invention. It is a flowchart explaining the entropy encoding method of the value data encoder.

10A to 10C are diagrams illustrating quantized key value data, DPCM computed key value data, and cyclic quantized key value data of the present invention, respectively.

FIG. 11A illustrates a DPCM mode encoding method according to a preferred embodiment of the present invention, FIG. 11B illustrates a generation mode encoding method, and FIG. 11C illustrates an incremental mode encoding method.

12 is a block diagram showing the configuration of a coordinate interpolator decoding apparatus of the present invention.

13 is a block diagram showing the construction of a key data decoder according to a preferred embodiment of the present invention.

14A is a flowchart illustrating a key data decryption method according to a preferred embodiment of the present invention, and FIG. 14B is a detailed flowchart of step S14500 of FIG. 14A.

15A is a block diagram showing a configuration of a key value data decrypting apparatus according to a preferred embodiment of the present invention, and FIG. 15B is a flowchart illustrating a key value data decrypting method according to a preferred embodiment of the present invention.

FIG. 16A is a block diagram showing the configuration of a pre-decoder according to a preferred embodiment of the present invention, and FIG. 16B is a block diagram showing the configuration of an inverse DPCM processing unit of the key value data decoder of the present invention.

17A is a flowchart for explaining a pre-decoding method according to a preferred embodiment of the present invention, and FIG. 17B is a flowchart for explaining an inverse DPCM calculation method.

FIG. 18A illustrates a bitstream structure of each vertex of the coordinate interpolator and component data of each vertex. FIG.

18B is a diagram illustrating an example of program code implementing the decodeSignedQuasiAAC () function used in the entropy decoder of the present invention.

19A is a diagram illustrating a DPCM mode decoding method, FIG. 19B is a diagram illustrating a generation mode decoding method, and FIG. 19C is a diagram illustrating an incremental mode decoding method.

According to an aspect of the present invention, there is provided a coordinate interpolator encoding apparatus, including: a first quantizer for quantizing key data of a coordinate interpolator with predetermined quantization bits, and a first quantizer for generating differential data of quantized key data A DPCM processing unit, a DND processing unit for performing a DND operation to reduce the range of the differential data according to the relationship between the difference data and the maximum and minimum values of the differential data, and a first entropy encoder for encoding the differential data input from the DND processing unit. A key data encoder; A second quantizer that quantizes key value data of the coordinate interpolator to a predetermined number of quantized bits, and performs differential mode DPCM operation on each vertex component of the quantized key value data to obtain differential data according to a temporal change of each vertex coordinate. And a second DPCM processor for generating differential data according to a spatial change, a pre-encoder for generating a symbol representing a differential data of each vertex component computed by DPCM and a DPCM operation mode performed on the differential data, and an index indicating a symbol position; A key value data encoder comprising a second entropy encoder for entropy encoding the symbol and the index; And a header encoder for encoding information necessary for decoding the bitstream encoded by the key data encoder and the key value data encoder.

The decryption apparatus of the present invention for achieving the above-mentioned second technical problem comprises: a header decoder for decoding and outputting header information necessary for decrypting key and key value data from an input bitstream; Entropy-decodes the input bitstream and performs an inverse DND operation on the difference data of the entropy-decrypted key data according to the DND order read from the first entropy decoder and the header decoder to output the difference data of the decrypted key data. An inverse DND processor for extending the range of the differential data, a first inverse DPCM processor for performing inverse DPCM operations on the difference data input from the inverse DND processor by the DPCM order input from the header decoder, and outputting the quantized key data; and quantization A key data decoder comprising a first inverse quantizer for inversely quantizing the keyed data and outputting the decrypted key data; And a second entropy decoder that entropy decodes the input bitstream to generate data to be pre-decrypted, including symbols of differential data of DPCM-operated key value data, an index indicating the position of the symbols, and a DPCM operation mode. Pre-decoder for performing pre-decoding operation according to the pre-decryption mode information input from the decoder to generate differential data of key value data, difference data between key frames inputted from the pre-decoder according to DPCM operation mode, and between each vertex And a second inverse DPCM processor configured to recover differential data to generate quantized data, and a second inverse quantizer to inversely quantize the quantized data to generate reconstructed key value data.

The bitstream recorded on the recording medium of the present invention for achieving the third technical problem of the present invention described above includes key data encoding / decoding information encoding key data and key value data encoding / decoding information encoding key value data. The key data encoding / decoding information is used for an inverse DND operation representing an inverse DND order representing the number of times to perform an inverse DND operation that entropy-decodes the key data bitstream and extending a range of differential data generated. Inverse DND operation information including the maximum value and the minimum value, including the number of reverse DPCM operations for converting the difference data on which the inverse DND operation is performed into quantized key data, and the intra key data used for each reverse DPCM operation. Inverse quantization for inversely quantizing the first inverse DPCM operation information and the quantized key data to generate reconstructed key data It comprises a first inverse quantization information used, and; The key value data encoding / decoding information includes information about a symbol representing difference data of pre-encoded key value data, entropy decoded from the key value data bitstream, a first position index indicating a symbol position, and a first position index. Pre-decryption information including a pre-decryption mode indicating a pre-decryption method to be performed, and a combination of inverse DPCM operation modes used for inverse DPCM operation for converting difference data of each pre-decoded vertex component into quantized key value data. Second inverse DPCM operation information including a second position index indicating a position of a symbol, and second inverse quantization information used for inverse quantization for inversely quantizing quantized key value data to generate reconstructed key data.

Hereinafter, a coordinate interpolator encoding apparatus according to a preferred embodiment of the present invention will be described with reference to the accompanying drawings.

2 is a block diagram showing the configuration of a coordinate interpolator encoding apparatus according to a preferred embodiment of the present invention.

2, a coordinate interpolator encoding apparatus of the present invention includes a key data encoder 300 for encoding key data of an input coordinate interpolator, and a key value data encoder for encoding key value data of an input coordinate interpolator ( 700, and a header encoder 500 for encoding information necessary for decoding the key and key value data encoded by the key data encoder 300 and the key value data encoder 700.

Hereinafter, a key data encoder 700 according to an exemplary embodiment of the present invention will be described with reference to FIGS. 3A to 6J.

3A is a block diagram showing the configuration of a key data encoder according to a preferred embodiment of the present invention.

The key data encoder 700 of the present invention includes a linear key encoder 310, a quantizer 320, a DPCM processor 330, a shifting unit 340, a folding processor 350, a DND processor 360, and an entropy encoder ( 370).

The linear key encoder 310 identifies and encodes an area where the key data increases linearly in the range of the entire key data. The quantizer 320 quantizes the input key data using a method of minimizing the quantization error. The DPCM processor 330 receives the quantized key data and generates difference data of the key data. The shifting unit 340 subtracts the highest frequency difference data from all the difference data. The folding processor 350 moves all difference data to a positive or negative region. The DND processor 360 selectively performs three operations of divide, divide up, and divide down to reduce the range of difference data of the key data. The entropy encoder 370 for the key data encodes the differential data using SignedAAC and UnsignedAAC functions that encode the differential data in bitplane units.

Hereinafter, the key data encoder 700 according to an exemplary embodiment of the present invention will be described with reference to FIG. 4A. 4A is a flowchart illustrating a key data encoding method of the present invention.

When the key data is input to the encoder, information such as the total number of key data and the number of digits of each key data is input to the header encoder 500 and encoded, and the linear key encoder 310 is a linear key region in the input key data. That is, the key frame is present at regular time intervals and the key data have the same difference, so that there is an area where the key data changes linearly, and the searched linear area is first encoded (S4000).

Popular 3D application software, such as 3Dmax and Maya, generate key frame-based animation using keys with specific time intervals. In such a case, the linear key data area can simply encode the key data by knowing only the key data at which the linear area begins, the key data at the end, and the number of key frames present in between, so that the key of a specific area in the interpolator It is very useful to use linear prediction for the coding of.

The equation used for the linear prediction is shown in Equation 1 below.

Where t _S represents the data of the key at which the partially linear region begins, t _E represents the data of the key at the end of the partially linear region, S is the index of t _S , and E is the index of t _E. Represent each. In a specific region corresponding to the S-th key data and the E-th key data, an error between the key data linearly predicted according to Equation 1 and the actual key data may be calculated according to Equation 2 below.

If the maximum error value among the error values calculated by Equation 2 is less than or equal to a predetermined threshold, t _i may be called a co-linearity within the interval [t _S , t _E ] and the predetermined error. Can be. Whether the maximum error value and the specific region are pseudolinear is determined by Equation 3 below.

if, T _i is pseudo-linear in the interval [t _S , t _E ]. Here, nBits represents the number of encoded bits used for encoding.

Once the linear key encoder 310 finds a partially linear region, the key data of the starting point of the region and the key data of the ending point are output to the real number converting unit 315, and the number of keys included in the linear key region is It is output to the header encoder 500 and encoded. It can be seen that by using such linear encoding, the amount of data to be encoded can be greatly reduced. The start key data and the end key data are encoded by the real conversion process described later by the real conversion unit 315.

The real number converting unit 315 converts the key data represented by the binary system to the decimal system in order to encode the start key data and the end key data.

Computers store floating-point numbers in 32-bit binary form. When a floating-point number is input in binary form, the real number converting unit 315 may convert the real number to the size of the decimal system (hereinafter referred to as "mantissa") and power of 10 (hereinafter, referred to as "mantissa"). To an "exponent" format.

For example, if the real number 12.34 is represented in binary form on a computer,

This number is expressed as a decimal number according to the above equation (4), as follows.

In order to include the mantis and exponents of the decimal system into the bitstream, each must calculate the number of bits required. First, since the exponent has a value in the range of -38 to 38, the exponent may be represented by 7 bits including a sign. Mantis yarn also determines the number of bits required depending on the number of digits. The values of Mantisa and the number of bits required (except sign bits) are shown in Table 2 below.

Meanwhile, the start key data and the end key data of the linear key region searched and converted by the above-described process are encoded according to the encoding process shown in FIG. 4B, and are output to the header encoder 500 and stored in the bitstream.

4B illustrates a process of encoding the two floating-point numbers inputted by the real conversion unit 315. Referring to FIG. 4B, a process of encoding the converted real number by the real number converting unit 315 will be described.

The real number converting unit 315 receives the original key digit (Kd) of the original key data, the key data (Start key, S) at which the linear region starts, and the key data (end, at which the linear region ends) from the linear key encoder (310). Key, E) is received and key data are converted by Equation 4 (S4040).

The real number converting unit 315 firstly S For encoding, if the number of digits of S is different from Kd, and if the number of digits is different, the number of digits of S is obtained and output to the header encoder 500 (S4042). At this time, the real number conversion unit 315 obtains the number of digits in S using the Digit () function.

After that, if the number of digits in S is larger than 7, the real number converting unit 315 uses a predetermined number of bits (in the present invention, 32 bits are used in the floating-point number method of the IEEE standard 754). The header encoder 500 outputs the header encoder 500 to be included in the stream (S4043).

On the other hand, if the number of digits in S is less than 0 and less than 7, the real number converting unit 315 outputs the sign of S to the header encoder 500 (S4044), and calculates the number of bits necessary for encoding the absolute value of the mentee of S. The absolute value of the Mentissa Co. is obtained from the table 4, and is output to the header encoder 500 using the obtained number of bits (S4045). Thereafter, the index of S is obtained, the code is output to the header encoder 500, and the index is output to the header encoder 500 at a predetermined number of bits (6 bits in the embodiment of the present invention) (S4046). Due to the conversion of the key data, the number of bits included in the bitstream is greatly reduced.

On the other hand, if the digit of S is 0, the encoding process of the start key data is terminated, and the process proceeds to converting the end key data. This is because if the number of digits is 0, the floating-point number means 0 and no further encoding process is necessary.

The real number converting unit 315 converts and encodes the start key data and then converts the end key data E. The conversion of E is repeated in the same process as the conversion of S, except that whether the exponent of E has the same value as the exponent of S (S4047). 500, and if different, the flag bits and the exponent of E are outputted to the header encoder 500 in the same manner as the exponent of S (S4048).

On the other hand, the key data excluding the linear region from the input key data are input to the quantizer 320 and quantized according to nKeyQBit, which is a predetermined quantization bit size.

However, when decrypting and using the quantized key data in the decoder, the original key data may not be completely recovered due to an error between the original key data and the quantized key data. Accordingly, the quantizer 320 of the present invention may not only obtain a maximum value and a minimum value from the input key data, and quantize using the obtained values, and also include a quantization error minimization unit 325 to correct the quantization error. It can be quantized using the maximum and minimum values modified to be minimized.

In order to minimize the quantization error, the quantization error minimizing unit 325 performs a quantization and inverse quantization on the input data in advance, and uses a method of controlling the range of quantization in which the error of quantization is minimized (S4100).

Specifically, the maximum value to be used for fixed quantization is called Max, the minimum value to be used for controlled quantization is Min, and when X _i is the input value and nQuantBit is the number of bits used for quantization, the quantized input value , Dequantized value , And error e _i are respectively calculated by the following equation (5).

There are two ways to reduce the sum of errors (∑e _i ). One is to adjust the Min value until the sum of the errors is minimal.

First, when Δx is the basic step size of the input data, n is a random integer, and ε _i is zero mean random noise, the input key data sequence X _i is defined as X _i = (i + n Assume that Δx + ε _i is a quantized value.

After _{that, d i ≡X i - X i} -1 = Δx + (ε i -ε i-1) referred to as, and Δ'x = E [d _i], the minimum value Min = Max - Δ'x * ( 2 ^nQuantBit -1)

The Min value that minimizes the quantization error obtained through this process is input to the Max value and the quantizer 320 and used for quantization of key data.

The quantizer 320 that has received the maximum value Max and the minimum value Min at which the quantization error is minimum performs quantization of the key data fKey _i using Equation 6 (S4200).

Here, i is an index of quantized key data, nQKey _i is an integer array of quantized data, fKey _i is a float array as input key data, and fKeyMax and fKeyMin are received by the quantization error minimizer 325. NKeyQBit represents the quantized bit size, respectively. Meanwhile, the function floor (v) used in Equation 6 is a function of receiving a real number v and outputting a maximum integer less than or equal to v.

Meanwhile, the quantizer 320 of the present invention may perform quantization by simply obtaining a maximum value fKeyMax and a minimum value fKeyMin among the input key data without using the above-described algorithm for minimizing the quantization error. .

The quantization process will be described in detail with reference to FIG. 4C, which describes the quantization process of the present invention.

The quantizer 320 receives key data (S4210) and checks whether the maximum value and the minimum value are input from the quantization error minimization unit 325 (S4220).

When the maximum value MAX and the minimum value MIN are input from the quantization error minimizer 325, the quantizer 320 sets the maximum value fKeyMax and the minimum value fKeyMin to be used for quantization as MAX and MIN (S4230). ), The set maximum value and the minimum value are outputted to the real number conversion unit 315 described above. The maximum and minimum values to be used for quantization are transformed, encoded, and output to the header encoder 500 through the real conversion process described above, so that the maximum and minimum values are included in the header for use in decoding.

If there is no value input from the quantization error minimizing unit 325, the quantizer 320 converts the first key data fKey ₀ to the minimum value fKeyMin among the input key data, and the last key data fKey _N-1 . The maximum value (fKeyMax) is set (S4240).

Thereafter, the quantizer 320 determines whether the set maximum value is less than 1 and the minimum value is greater than 0 (S4250). Otherwise, the quantizer 320 outputs the maximum value and the minimum value to the real number converter 315 described above. After converting and encoding through the above-described process, the maximum value and the minimum value are included in the key header to be output to the header encoder 500 for use in decoding (S4260).

On the other hand, if the maximum value and the minimum value satisfy the condition of step S9250, a flag indicating whether or not the maximum value and the minimum value are included in the key header data so as to be used for decryption is checked (S4270). If the flag is set to include the maximum value and the minimum value in the key header, after performing the above-described step S9260, the maximum value fKeyMax and the minimum value fKeyMin are encoded and output to the header encoder 500. If not, the quantizer 320 will not include the maximum and minimum values in the key header.

When the maximum value and the minimum value are not included in the key header, the key data encoder 700 and the key data decoder correspond to cases where encoding and decoding are performed by setting the maximum value to 1 and the minimum value to 0. The quantizer 320 sets the minimum value fKeyMin to 0 and the maximum value fKeyMax to 1, respectively (S4280). The maximum and minimum values used for the quantization thus set are already known to the decoder and are not separately included in the key header.

Meanwhile, the quantizer 320 quantizes the input key data by substituting the fKeyMax and fKeyMin set through the above process into Equation 6, and outputs the quantized key data to the DPCM processor 330 (S4290).

Upon receiving the quantized key data, the DPCM processor 330 performs a predetermined number of DPCMs, outputs the order and intra key data for which the minimum scatter is generated, to the header encoder 500, and the difference of the key data on which the DPCM operation is performed. The data are output to the shifting unit 340 (S4300).

Referring to FIG. 4D, the DPCM processing process is performed. The DPCM processing unit 330 first performs a DPCM operation on the input key data by a predetermined number of times, and stores the number of times that the DPCM is performed as a DPCM order (S4310). In a preferred embodiment of the present invention, three DPCM operations were performed.

Thereafter, the DPCM processing unit 330 calculates a scatter diagram for the DPCM calculation result of each order (S4320). A variance, standard deviation, quadrant deviation, etc. may be used as a statistical value representing a scatter plot at this time, and a quadrant deviation is used as a scatter plot in a preferred embodiment of the present invention.

When the scatter plot for the DPCM calculation result of each order is calculated, the DPCM processing unit 330 selects the DPCM order with the minimum scatter degree and the DPCM result of the corresponding order, and outputs the DPCM calculation result to the shifting unit 340. The order, intra key data of each order, and other information required for DPCM operation are output to the header encoder 500 (S4330). However, in the preferred embodiment of the present invention, if the number of keys is less than 5, only the first DPCM is performed. For example, when primary DPCM is performed, a DPCM operation is performed using Equation 7 below.

Δ _i = nQKey _{i + 1} -nQKey _i

I is an index of quantized key data, nQKey _i is an integer array, and Δ _i is differential data.

On the other hand, the DPCM processing unit 330 calculates the number of bits required for encoding the selected DPCM result and the difference data of the DPCM-keyed data, and stores them in a predetermined storage location (nQStep_DPCM in the embodiment of the present invention) (S4340). . However, it will be apparent to those skilled in the art that the calculating of the number of bits required for encoding may be performed at the step of selecting key data to be encoded, which will be described later.

Upon receiving the DPCM result, the shifting unit 340 selects the highest frequency differential data (hereinafter, referred to as a mode) among the input differential data and subtracts the mode from all the differential data, thereby concentrating data to be encoded around 0. The number of bits required for encoding is reduced by being distributed in step S4400.

The shifting operation is performed by subtracting the mode nKeyShift from the difference data of all the quantized key data. This shifting operation is represented by Equation 8 below.

shift (nQKey _i ) = nQKey _i -nKeyShift

i represents the index of the quantized key data, nQKey _i represents the integer array, and nKeyShift represents the mode value. After the shifting operation is performed, the difference data indicating the highest frequency among the difference data of the key data becomes 0, so that the number of bits required for encoding can be greatly reduced.

The key data on which the shifting operation is performed are output to the fold processing unit 350 and the DND processing unit 360, and the mode value nKeyShift is output to the header encoder 500 and included in the key header.

The folding processing unit 350 receiving the shifted data performs a folding operation as a preprocessing step for performing a DND operation, and outputs the folded operation key data to the DND processing unit 360 (S4500).

The folding operation is to reduce the range of the differential data by concentrating the differential data distributed in the negative area and the positive area around 0 to the positive area or the negative area. In the present embodiment, the folding operation is performed by Equation 9 below. Was performed to concentrate the distribution of the differential data into the positive region.

fold (nQKey _i ) = 2nQkey _i , (if nQkey _i ≥0)

= 2 | nQKey _i | -1, if nQkey _i <0

Where i represents the index of the quantized key data and nQKey _i represents the integer array. By the folding operation, positive data among the difference data of the shifted key data is converted into even positive numbers and negative data into odd positive numbers, respectively.

The folding processor 350 calculates the number of bits necessary for encoding the data on which the folding operation is performed and stores the number of bits in a predetermined storage location nQStep_fold. As in the step S9300, it will be apparent to those skilled in the art that the calculation of the number of bits required for encoding may be performed at the step of selecting difference data to be entropy encoded, which will be described later. Meanwhile, data in which the folding operation is performed by the folding processing unit 350 is output to the DND processing unit 360.

In order to increase entropy encoding efficiency, the DND processor 360 reduces the data range by performing a DND operation on the difference data of the input key data by a predetermined number of times (S4600).

Referring to FIG. 3B, the DND processor 360 may include a DND operator 362 performing a DND operation, a first difference data selector 364 for selecting differential data to be entropy encoded according to the number of encoded bits. When the difference data on which the DND operation is performed is selected in the first difference data selector, the shift-up operation unit 366 performs a shift-up operation on the difference data on which the DND operation is performed, and the difference data and the shift-up on the DND operation. The second difference data selector 368 selects difference data having a smaller dispersion from among the calculated difference data and outputs the difference data to the entropy encoder 370.

First, the DND operation performed by the DND calculator 362 will be described.

When the fold difference data is input to the DND calculator 362, the input difference data is divided in half, and the difference data located in the upper range is moved to the negative region by the divide function. The divide function is defined as in Equation 10 below.

divide (nQKey _j , nKeyMax)

= nQKey _j- (nKeyMax + 1), (if nQKey _j > nKeyMax / 2)

= nQKey _j , if nQKey _j ≤ nKeyMax / 2

Here, j is an index of the input difference data, nQKey _j is an integer array, and nKeyMax is the maximum value of the input folding calculated difference data, respectively. When the distribution of the difference data is concentrated in the boundary region of the range occupied by the entire difference data, the DND operation has an effect of greatly reducing the entire region of the data.

The scatter diagram is calculated after the divide operation, in which case the bit size necessary for encoding is used as the scatter diagram so that the minimum coded bit size is selected.

After the divide operation is performed, a divide-up operation or a divide-down operation, which is another DND operation similar to the divide operation, is performed, and the operation to be performed is determined according to the size of the positive side and the negative side range of the data after the divide operation.

If the range on the positive side is larger, the divide-down operation defined by Equation 11 below is performed.

divide-down (nQKey _j , nKeyMax)

= -2 (nKeyMax-nQKey _j +1) +1, (when nQKey _j > nKeyMax / 2)

_{= NQKey j, (0 ≤nQKey j} ≤nKeyMax / 2 if)

= 2nQKey _j , if nQKey _j <0

On the other hand, if the range of the negative side is larger, the divide-up operation defined by Equation 12 below is performed.

divide-up (nQKey _j , nKeyMin)

= nQKey _j , if nQKey _j > 0

= 2nQKey _j , (when nKeyMin / 2 ≤ nQKey _j ≤ ₀ )

= 2 (nKeyMin-nQKey _j -1) +1, (when nQKey _j <nKeyMin / 2)

In the above equation, j is the index of quantized key data, nQKey _j indicates an integer array, nKeyMax is a maximum value of nQKey _j, nKeyMin is a minimum value of nQKey _j.

Hereinafter, the DND calculation process will be described with reference to FIG. 4E, which illustrates the operation of the DND calculator 362.

When the difference data of the key data is input from the folding processor 350, the DND calculator 362 obtains a maximum value nKeyMax and a minimum value nKeyMin among the input difference data (S4610). Thereafter, the DND calculator 362 compares the absolute value of the maximum value with the minimum value (S4620). If the maximum value is greater than or equal to the absolute value of the minimum value, the DND calculator 362 sets the obtained maximum value to the maximum value of the current DND calculation order ( S4622).

The DND calculator 362 checks whether the DND calculation order is 1 (S4624), and if the order is 1, substitutes the maximum value nKeyMax in Equation 10 described above, and divides the difference data input to the DND calculation unit 362. The operation is performed (S4630).

After performing the divide operation, the DND operation unit 362 measures a bit size required for encoding the reduced differential data range by performing the divide operation by using a function getQBit () for obtaining a bit size required for encoding (S4640). After that, if the current DND operation order is 1 (S4650), the value is stored once as a value (nQBitDND) indicating the minimum coded bit size after the DND operation, and the DND order is increased by one (S4655).

Thereafter, the DND calculator 362 performs the above-described process again. If the degree is not 1 in step S9624, the divide-down operation is performed by substituting nKeyMax in Equation 11 (S4634). The DND calculating unit 362 calculates the number of bits necessary for encoding the differential data on which the divide-down operation is performed (S4640), and if this value is smaller than the minimum value (nQBitDND) required for encoding stored in the DND operation of the previous order (S4652). After the DND operation, the minimum bit size required for encoding is replaced with this value (S4658).

On the other hand, in step S9620, if the absolute value of the minimum value is larger than the maximum value, the maximum value of the order is updated to the input minimum value (S4623), and the divide-up operation is performed by substituting the minimum value in Equation 12 above. (S4638). Thereafter, the DND calculating unit 362 calculates the number of bits necessary for encoding the differential data on which the divide-up operation is performed (S4640), and this value is smaller than the minimum value (nQBitDND) required for encoding stored in the DND operation of the previous order. If it is (S4652), after the DND operation, the minimum bit size necessary for encoding is replaced with this value (S4658).

The DND calculation unit 362 repeats the above-described process until a predetermined number of times, and the number of times of performing the DND operation is variable. For example, in this embodiment, the number of times to perform the DND operation is set to seven circuits. The DND arithmetic operation unit 362 outputs the minimum bit size (nQBitDND) required for encoding and the difference data calculated at that time to the first difference data selection unit 364, and outputs the order at that time to the header encoder 500. To include in the bitstream.

The first difference data selector 364 receives the shifted difference data, the folding difference data, and the DND calculated difference data, and determines which calculation result is to be entropy encoded.

Referring back to FIG. 4A, if the minimum number of bits (nQBitDND) required for encoding after the DND operation is greater than or equal to the coded bit size (nQStep-DPCM) after the DPCM operation (S4700), the DPCM After selecting the result of the operation and performing the shifting operation, the shifted difference data is output to the entropy encoder 370 to be entropy encoded (S4710). In this case, the DND order is set to -1 and output to the header encoder 500 to be included in the key header.

However, if nQBitDND is smaller than the coded bit size after DPCM, but is greater than or equal to the coded bit size after the folding operation (S4720), the first difference data selection unit 364 outputs the folded operation difference data to the entropy encoder 370. Entropy encoding is performed (S4730). In this case, the DND order is set to 0 and output to the header encoder 500 to be included in the key header.

If the number of encoded bits of the difference data after the DND operation is the smallest, the first difference data selection unit 364 outputs the DND calculated difference data to the shift-up operation unit 366, and the shift-up operation unit 366. Receives the difference data, calculates a first scatter diagram on the DND-operated difference data (S4740), and performs a shift-up operation defined by Equation 13 on the DND-calculated difference data ( In operation S4810, the second scatter diagram of the shift-up difference data is calculated again.

shift-up (nQKey _j , nKeyMax)

= nQKey _j , (nQKey _j ≥0)

= nKeyMax-nQKey _j , (nQKey _j <0)

Here j is the index of the difference data of the quantized key data, nQKey _j is an integer array, nKeyMax represents the maximum value among the difference data, respectively.

The second difference data selection unit 368 receiving the DND-calculated difference data and the shift-up calculated difference data compares the magnitudes of the first scatter plot and the second scatter plot (S4900) to determine the second scatter plot after the shift-up calculation. If smaller than the first scatter diagram after the DND operation, the shift-up operation outputs the difference data to the entropy encoder 370 to entropy-encode (S4910), and the maximum value (nKeyMax) and minimum value (nKeyMin) used in the DND operation are performed. Then, the maximum value nKeyMax used in the shift-up operation is output to the header encoder 500 and included in the key header.

However, if the first scatter diagram after the DND operation is smaller than the second scatter diagram after the shift-up operation, the second difference data selector 368 outputs the difference data on which the DND operation is performed to the entropy encoder 370 to entropy encode the same. In operation S4920, only the maximum value nKeyMax and the minimum value nKeyMin used in the DND operation are output to the header encoder 500. In a preferred embodiment of the present invention, standard deviation is used as the above-mentioned first and second scatter plots.

The entropy encoder 370 encodes the difference data by performing two function operations according to the nature of the difference data to be encoded. For example, since the DPCM is performed and the differential data on which the shifting operation is performed and the differential data on which the divide operation is performed have both positive and negative numbers, encoding including the sign of the differential data is performed, and the folding calculated differential data and the shift- Since the up-computed difference data has only positive values, encoding is performed without sign.

According to a preferred embodiment of the present invention, differential data is encoded by using the encodeSignedAAC function as an encoding function including a sign, and by using the encodeUnsignedAAC function as an encoding function not including a sign.

5 is a diagram illustrating an example of the encodeSignedAAC function. Referring to Fig. 8, if the input value is 74 and the number of encoded bits for this value is 8, the sign of this value is 0, and the binary number of this value is 1001010. The code and all bit planes are encoded by the following process.

Step 1: Encode the binary number from MSB to LSB in bitplane units.

Step 2: During encoding, it is checked whether a bit currently encoded is not zero.

Third step: If the first non-zero value, the code is encoded after encoding the current encoding bit of the binary number.

Step 4: Encode the remaining bits of the binary number.

The encodeUnsignedAAC function encodes an unsigned value into an adaptive arithmetic encoded bitstream using a context for the values. This is similar to the processing of the encodeSignedAAC function described above, except that there is a sign context.

6A-6J illustrate key data after operations are performed in accordance with a preferred embodiment of the present invention. 6A to 6J, the horizontal axis represents the index of each key data, and the vertical axis represents the value of the key data.

6A illustrates original key data input to an encoder of the present invention. When the key data shown in FIG. 6A is output to the quantizer 320 and quantized with 9 bits of quantization bits, quantized key data shown in FIG. 6B is obtained. When DPCM is performed on the quantized key data, difference data of the key data as shown in FIG. 6C is obtained.

Thereafter, shifting the difference data of the quantized key data to a mode value of about 7 yields the difference data of the key data shown in FIG. 6D, and performing a folding operation on the shifted difference data, as shown in FIG. 6E. As can be seen, all of the data converted to positive numbers can be obtained.

Data performing a DND operation on the folded data is illustrated in FIGS. 6F to 12H.

The difference data after performing the divide operation among the DND operations with respect to the folded data is shown in FIG. 6F. As shown, the positive side is in the range of 0 to 28, and the negative side is in the range of 0 to -29, so the negative side is larger. Therefore, the divide-up operation is performed on the data shown in FIG. 9F, and the result of the divide-up operation is shown in FIG. 6G.

By the divide-up operation, the negative side range of the key data is considerably reduced compared to the positive side range, and the divide-down operation is performed on the differential data which is divide-up operation in the next order of DND. FIG. 6H illustrates a result of performing a divide-down operation on the difference data of FIG. 6G. Meanwhile, the result of performing the shift-up operation on the divide-down operation key data is shown in FIG. 6I.

6A to 6G described above, it can be seen that the range of the key data and the difference data is gradually reduced. However, comparing FIG. 9I and FIG. 9H showing the result of the shift-up operation, it can be seen that the range of differential data to be encoded after the shift-up operation is further increased. Accordingly, it can be seen from FIG. 9J that the difference data of the key data to be finally encoded is the difference data on which the divide-down operation is performed.

On the other hand, it looks at the information encoded in the header encoder 500 and stored in the key header.

When the key data to be encoded is input, the header encoder 500 receives and encodes the number of digits of the key data and the total number of keys to be encoded from the input key data. Thereafter, the header encoder 500 receives information indicating whether there is a linear key coded linear key region and the number of key data of the linear key region from the linear key encoder 310, and converts the real number from the real transform unit 315. Start key data and end key data of the linear key region are received.

In addition, when the real number conversion unit 315 receives a maximum value and a minimum value for minimizing the quantization error from the quantization error minimization unit 325 and performs real conversion, the converted maximum value and the minimum value may be used for inverse quantization. It is input to the header encoder 500 from the converter 315 and included in the key header. In addition, the quantization bit size used for quantization is also input to the header encoder 500 and included in the key header.

In addition, the header encoder 500 receives a DPCM operation execution order and intra key data in each order from the DPCM processor 330, and receives a mode value used for the shifting operation from the shifting unit 340. The DND processor 360 receives input of whether a shift-up operation is performed, a DND degree at which a scatter diagram is minimum, and a maximum value and a minimum value at each DND degree. Finally, the header encoder 500 receives the number of encoded bits used for encoding from the entropy encoder 370 and encodes the key header.

Hereinafter, a key value data encoder and an encoding method of a coordinate interpolator according to a preferred embodiment of the present invention will be described with reference to FIGS. 7A to 11C.

FIG. 7A is a block diagram showing a configuration of a key value data encoder of a coordinate interpolator according to a preferred embodiment of the present invention, and FIG. 7B is a flowchart illustrating an encoding method according to a preferred embodiment of the present invention.

Referring to FIG. 7A, a key value data encoder 700 of the present invention includes a quantizer 710 for quantizing each component data of each vertex of input coordinate interpolator key value data to a predetermined number of quantization bits, and a quantized angle. DPCM processing unit 720 that performs a predetermined DPCM operation on the component data of the vertex, a pre-encoder 750 for converting the difference data into an index indicating a symbol and a symbol position, and entropy of a symbol and an index of the input difference data. An entropy encoder 760 is encoded.

Hereinafter, the encoding method of the present invention will be described with reference to FIG. 7B.

The key value data of the coordinate interpolator is input to the quantizer 710 in the form of a matrix of size N × M (S9000). An example of key value data of a coordinate interpolator input in Table 3 below is described.

One 2 ... j M One x (1,1), y (1,1) z (1,1) x (1,2), y (1,2) z (1,2) x (1, M), y (1, M) z (1, M) 2 x (2,1), y (2,1) z (2,1) x (2,2), y (2,2) z (2,2) x (2, M), y (2, M) z (2, M) ... i x (i, j), y (i, j) z (i, j) N x (N, 1), y (N, 1) z (N, 1) x (N, 2), y (N, 2) z (N, 2) x (N, M), y (N, M) z (N, M)

In Table 3, N represents the number of key data (the number of key frames), and M represents the number of vertices in each key frame.

The key value data encoder 700 of the present invention operates in two modes for encoding key value data of a coordinate interpolator, one of which is a vertex mode and the other of a transpose mode. Table 3 above describes the structure of key value data to be quantized by the quantizer 710 in the vertex mode. The key value data encoder 700 of the present invention converts the input key value data described in Table 3 above into an M × N matrix in the transpose mode. After the pre-transformed data matrix is inversely quantized in the process of decrypting the key value data, the decoded key value data is converted back to an N × M matrix to restore the same key value data as the input key value data.

Referring to FIG. 7B, the quantizer 710 checks whether the encoding mode of the key value data input from the outside is the pre-mode (S9100). If the pre-mode is selected, the quantizer 710 checks the input N × M key value data matrix M × N. Convert to a matrix (S9200).

Thereafter, the quantizer 710 quantizes the data of each component of the input or transformed key value data matrix with a predetermined number of quantization bits, and outputs the key value data of each quantized component to the DPCM processor 720. The minimum values and the maximum range of each component of the input data used for quantization are converted into real numbers of the decimal system and output to the key value header encoder (S9300).

The DPCM processor 720 performs a time DPCM operation, a spatial DPCM operation, and a space-time DPCM operation on the input quantized key value data, and performs cyclic quantization on the respective DPCM operation results, thereby selecting each of the cyclic quantized difference data. The difference data having the smallest entropy is output to the pre-encoder 750 (S9400).

The precoder 750 generates and outputs a dictionary symbol S _{i, j} and a position index I _{i, j} corresponding to the input difference data (S9600). Specifically, the pre-encoder 750 generates a symbol and a position index indicating a DPCM operation mode performed on the input differential data, and generates a symbol or symbol flag indicating a value present in the differential data, and positions of the symbols. The index is created and output to the entropy coder.

The entropy encoder 760 generates a bitstream by entropy encoding a symbol and an index of the input key value data component (S9800).

Hereinafter, each step described above will be described in detail with reference to FIGS. 8A to 11C.

Referring to FIG. 9A, the quantizer 710 selects a maximum value and a minimum value of each component data input (S9320).

The quantizer 710 calculates a range of each component data by using the maximum and minimum values of the selected data of each component, and determines the maximum range of the ranges of all component data (S9340).

The quantizer 710 quantizes the key value data of each component according to the following Equation 14 using the minimum value of each component and the maximum range of all determined components (S9360).

In Equation 14, i denotes key data, j denotes a vertex, and nKVQBit denotes a quantization bit size. In addition, fMin_X, fMin_Y, and fMin_Z represent the minimum value of each component data, and fMax represents the maximum range of the range of each component data.

The quantizer 710 outputs key value data of each quantized component to the DPCM processor 720, and describes the above-described minimum values fMin_X, fMin_Y, and fMin_Z and the maximum range fMax of each component. According to 4 and Table 2, the result is converted to a real number in the decimal system and output to the key value header encoder 500.

Hereinafter, the DPCM processing unit and the DPCM calculation method of the key value data encoder of the present invention will be described with reference to FIGS. 8A and 9B.

Referring to FIG. 8A, which is a block diagram showing the configuration of the DPCM processing unit 720 of the key value data encoder of the present invention, the DPCM processing unit 720 of the present invention performs time for each component data input from the quantizer 710. DPCM operation unit 730 for performing DPCM operation, spatial DPCM operation and space-time DPCM operation, input from cyclic quantizer 740 and cyclic quantizer 740 to reduce the range of differential data input from DPCM calculation unit 730 And a DPCM mode selector 745 for selecting and outputting one of the difference data. In addition, the DPCM calculating unit 730 performs a time DPCM calculating unit 731 for performing a time DPCM operation on the inputted quantized component data, and a spatial DPCM calculating unit 733 performing a spatial DPCM operation on the data of each quantized component. And a space-time DPCM calculation unit 735 which performs a temporal and spatial DPCM operation on each quantized component data.

Referring to FIG. 9B, which is a detailed flowchart illustrating a DPCM calculation method of key value data according to the present invention, the data of each quantized component input from the quantizer 710 includes a time DPCM calculation unit 731 and a spatial DPCM calculation unit 733. , And are input to the space-time DPCM calculating unit 735, respectively, to perform DPCM operation (S9420).

The time DPCM calculating unit 731 calculates a difference between each component data of each vertex of the current key frame and each component data of each vertex of the previous key frame. The time DPCM operation is represented by the following equation (15).

In Equation 15, i represents key data and j represents an index of a vertex.

On the other hand, the spatial DPCM calculating unit 733 calculates the difference between each vertex of the same key frame. In detail, the spatial DPCM calculator 733 calculates entropy for vertices in which the spatial DPCM operation is performed before the current vertex to perform the spatial DPCM operation, using Equation 16 below.

In Equation 16, P _i is F _i / N as a probability of generating a symbol at a vertex, where F _i is the number of times the symbol occurs at the vertex, and N is the number of key data.

The spatial DPCM calculator 733 determines a vertex having the lowest entropy among the vertices as the reference vertex, and calculates difference data between the vertex to which the current spatial DPCM operation is to be performed and the component data of the reference vertex. The spatial DPCM operation is represented by the following equation (17).

Meanwhile, the space-time DPCM calculating unit 735 performs a spatial DPCM operation on each vertex of the current key frame, and a reference vertex of each vertex of the current key frame with respect to each vertex of the previous key frame corresponding to each vertex of the current key frame. After performing a spatial DPCM operation based on the vertex corresponding to the vertex, a difference between the difference data corresponding to the vertex of the current key frame and the difference data corresponding to the vertex of the previous frame is calculated. That is, a time DPCM operation is performed on the result of the spatial DPCM operation. The space-time DPCM operation is represented by the following equation (18).

However, during the space DPCM operation and the space-time DPCM operation or If is less than the quantized minimum value, the quantized minimum value is used for the DPCM operation instead of these values. In addition, during the space DPCM operation and the space-time DPCM operation or If is greater than the quantized maximum value, the quantized maximum value is used for the DPCM operation instead of these values.

The DPCM calculator 730 outputs the calculated difference data to the cyclic quantizer 740, and the cyclic quantizer 740 is a time DPCM calculated difference data, a spatial DPCM calculated difference data, and a space-time DPCM calculated difference data, respectively. Cyclic quantization is performed on the output signal, and each cyclic quantized difference data is output to the DPCM mode selection unit 745 (S9440).

FIG. 10A shows an example of the output of the quantizer 710, and FIG. 10B shows the result of the DPCM operation being performed on the quantized data shown in FIG. 10A. As shown in FIG. 10B, when a DPCM operation is performed on a quantized value, the range of data to be encoded may increase by twice. The purpose of cyclic quantization is to perform DPCM operations while maintaining the data range of quantized values.

For this purpose, cyclic quantization assumes that the maximum value of the DPCM calculated difference data is cyclically connected with the minimum value calculated by the DPCM. Therefore, if the linear DPCM result between two consecutive quantized differential data is greater than half of the maximum value of the DPCM-calculated differential data, the maximum range of the differential data is subtracted and represented as a smaller value, and the two consecutive quantized differential differences are obtained. If the linear DPCM result between the data is less than half of the minimum value of the difference data calculated by DPCM, the maximum range of the difference data is summed and represented as a smaller value.

The cyclic quantization operation of the cyclic quantizer 740 is represented by the following equation (19).

In Equation 19, nQMax represents the maximum value of the DPCM-calculated difference data, and nQMin represents the minimum value of the DPCM-calculated difference data. The result of performing cyclic quantization on the DPCM computed data shown in FIG. 10B is shown in FIG. 10C.

The cyclic quantizer 740 outputs each cyclic quantized difference data to the DPCM mode selector 745.

The DPCM mode selection unit 745 calculates the entropy of the temporal, spatial and spatiotemporal DPCM-calculated difference data for each vertex according to Equation 16 described above (S9460).

Thereafter, the DPCM mode selection unit 745 selects a DPCM calculation result having the smallest entropy as the DPCM operation mode of each vertex, and outputs differential data and DPCM mode information according to the selected DPCM mode to the pre-encoder 750. (S9480).

Hereinafter, the precoder 750 and the precoding method of the present invention will be described with reference to FIGS. 8B and 9C.

Referring to Fig. 8B, which is a block diagram showing the configuration of the pre-encoder 750 of the present invention, the pre-encoder 750 encodes a DPCM mode encoder 752 for encoding a DPCM operation mode performed on each component data of each input vertex. ), A generation mode encoder 756 for generating a symbol representing a difference data value of each component of each input vertex and an index indicating a position of the symbol, and a setting flag corresponding to a symbol of difference data of each component of each input vertex. And an incremental mode encoder 758 for generating an index indicating a symbol position, and a DPCM mode encoder 752 by calculating a size of a symbol table and a size of a symbol flag table for representing difference data of each component of each input vertex. And a table size calculator 754 for outputting the difference data inputted from the &lt; RTI ID = 0.0 &gt;) to the generation mode encoder 756 or the incremental mode encoder 758.

First, the pre-encoder 750 checks whether the DPCM mode encoder 752 checks whether the value of the quantization selection flag of the difference data of each vertex is 1, and if the flag value is 1, the process will be described later. Do this. However, if the flag value is 0, this means that the quantized values in all key frames of the vertex are the same, so that the pre-coding process is omitted and the quantized value QMin is encoded as the key value header.

Referring to FIG. 9C illustrating a precoding method of the present invention, difference data of each component of each vertex generated by the DPCM processing unit 720 is first input to the DPCM mode encoder 752, and the DPCM mode encoder 752 In operation S9620, a symbol representing a DPCM mode of each component data of each input vertex and an index indicating a symbol position are generated.

11A is a diagram illustrating how the DPCM mode encoder 752 of the present invention encodes a DPCM mode.

Referring to FIG. 11A, the DPCM mode encoder 752 prepares in advance a table representing a combination of DPCM modes of each component and a symbol corresponding thereto for each vertex. When the time DPCM operation is denoted by T, the space DPCM operation is denoted by S, and the space time DPCM operation is denoted by T + S, the combination of DPCM modes of each vertex is as shown in Table 4 below.

symbol DPCM mode symbol DPCM mode symbol DPCM mode 0 (T, T, T) 9 (S, T, T) 18 (T + S, T, T) One (T, T, S) 10 (S, T, S) 19 (T + S, T, S) 2 (T, T, T + S) 11 (S, T, T + S) 20 (T + S, T, T + S) 3 (T, S, T) 12 (S, S, T) 21 (T + S, S, T) 4 (T, S, S) 13 (S, S, S) 22 (T + S, S, S) 5 (T, S, T + S) 14 (S, S, T + S) 23 (T + S, S, T + S) 6 (T, T + S, T) 15 (S, T + S, T) 24 (T + S, T + S, T) 7 (T, T + S, S) 16 (S, T + S, S) 25 (T + S, T + S, S) 8 (T, T + S, T + S) 17 (S, T + S, T + S) 26 (T + S, T + S, T + S)

Since each vertex contains three components, x, y, and z, the combination of DPCM modes is fixed at 27.

On the other hand, as shown in Fig. 11A, the input difference data of each vertex corresponds to any one of the symbols shown in Table 4 according to the combination of DPCM operation modes of each component. The DPCM mode encoder 752 maps the DPCM mode of each input vertex to the symbol described in Table 4, and sets a flag to indicate that the symbol exists in the differential data.

The DPCM mode encoder 752 arranges the symbols corresponding to the DPCM mode combinations of the input vertices in a line, and generates an index from the small symbols.

The symbol string of the DPCM mode corresponding to the input difference data is (4, 1, 5, 1, 4, 5), as shown in FIG. 11A. At this time, since the smallest symbol is 1 (T, T, S), the DPCM mode encoder 752 generates an index indicating the position of symbol 1 in the data string, and the position of symbol 1 is set to 1. do. Thus, the index is (0, 1, 0, 1, 0, 0).

Thereafter, the DPCM mode encoder 752 generates an index indicating the position of the next smaller symbol 4 (T, S, S) in the symbol string, and sets the position of the symbol 4 to 1. In this case, however, the position of symbol 1 is not considered. Thus, the generated index is (1, 0, 1, 0). The DPCM mode encoder 752 then generates an index indicating the position where the remaining symbol 5 (T, S, T + S) is located. Therefore, the index representing symbol 5 becomes (1,1).

The DPCM mode encoder 752 outputs the set flag and the index to the table size calculator 754.

Referring back to FIGS. 8B and 9C, the table size calculation unit 754 uses the size A of the symbol table used when generating the mode difference encoding the input difference data, and the incremental mode encoding the input difference data. The size of the symbol flag corresponding to each symbol of the preset symbol table is calculated (S9640).

The table size calculator 754 determines the size of the symbol table to be used in the generation mode encoder 756 (A = S * (AQP + 1)) and the size of the symbol flag corresponding to the symbol table to be used in the incremental coding mode encoder. B = 2 ^{(AQP + 1)} −1) is compared (S9660). Here, S is the number of symbols included in the difference data, and AQP is the bit size for representing the symbol.

The table size calculator 754 outputs the difference data of each input vertex to the generation mode encoder 756 when A is smaller than B, and increases the difference data of each input vertex when B is smaller than A. Output to encoder 758.

Hereinafter, the process of the generation mode encoder 756 of the present invention will be described with reference to FIG. 11B.

The generation mode encoder 756 generates a symbol corresponding to the difference value generated from the input difference data and a position index indicating the position of the symbol (S9680).

Referring to FIG. 11B, when the input difference data is (3,7,3,7, -4,7,3, -4,3,7, -4, -4), the generation mode encoder 756 Creates a table in which the symbols (3, 7, -4) corresponding to the difference values of the difference data of the input vertices are sequentially described.

The generation mode encoder 756 encodes the first symbol 3 in the input differential data string, and then sets a position where 3 appears in a subsequent key frame to 1 and sets a position where 3 does not appear to 0 to a position index. Create The index created for symbol 3 is (0 1 0 0 0 1 0 1 0 0 0).

In addition, the generation mode encoder 756 generates an index for the next symbol, 7, where the position of the previous symbol is not considered, as shown in FIG. 11B. Thus, the index for symbol 7 is (1 0 1 0 1 0 0).

Since the index generated by the generation mode encoder 756 considers only the positions of the uncoded symbols, the position index of the last symbol -4 becomes (1 1 1).

On the other hand, in the example shown in Fig. 11B, the bSoleKV flag is set to mode 0. The bSoleKV flag is a flag indicating whether a symbol included in the differential data occurs only once. If a symbol occurs only once and the indices are all 0, the bSoleKV flag for the symbol is set to 1, and the index is not encoded. The generation mode encoder 756 outputs each symbol, an index of a symbol, and a bSoleKV flag to the entropy encoder 760 in order to entropy encode differential data.

Hereinafter, a process of the incremental mode encoder 758 of the present invention will be described with reference to FIG. 11C.

The incremental mode encoder 758 generates a flag indicating whether a symbol exists instead of a symbol value and a position index indicating a position of the symbol (S9690).

Incremental mode encoder 758 pre-generates the symbols to be present in the differential data in a table. The table is created in ascending order of the absolute values of the symbols, with a positive number above the same absolute value being higher than a negative number. Therefore, the order of the symbols described in the table is 0, 1, -1, 2, -2, 3, -3 .... The size of the symbol flag corresponding to the symbol in the symbol table is calculated as 2 ^{(AQP + 1)} -1 as described above. For example, when AQP is 2, the number of symbols that can be represented by the symbol flag is 7. In addition, the symbol flag is set to 1 when a value corresponding to each symbol exists in the differential data, and a position index is generated only for the symbol in which the flag is set to 1.

Referring to FIG. 11C, when the difference data input to the incremental mode encoder 758 is as shown in FIG. 11C, the symbol present in the difference data is (−1, 2, −3), and thus the symbol flag is (0). , 0, 1, 1, 0, 0, 1).

The incremental mode encoder 758 first generates a position index corresponding to a symbol located above the symbol table. As shown in FIG. 11C, the incremental mode encoder 758 sets the index (1 0 1 0 0 0 1) by setting the position of the highest symbol of the symbol table to -1 and setting the other position to 0. 0 1 0 0 0).

The incremental mode encoder 758 then generates an index (0 0 1 0 1 0 1 1) for the remaining positions without considering the position of the symbol -1. Finally, incremental mode encoder 758 generates the index of symbol -3 as (1 1 1 1) without considering the position of previously encoded symbols. The incremental mode encoder 758 outputs an order of flags and a position index of each symbol to the entropy encoder 760 in order to entropy encode differential data.

On the other hand, the indexes generated by the generation mode encoder 756 and the incremental mode encoder 758 of the present invention both have a flag called nTrueOne. This flag indicates whether the original position index is reversed. If this flag is set to 0, the current position index indicates that the original position index value is reversed. The reason for inverting the position index is to increase arithmetic coding efficiency by increasing the number of zeros by inverting when 1 is included in the index.

Hereinafter, the entropy encoding method of the present invention will be described with reference to FIG. 9D.

The entropy encoder 760 of the present invention receives a flag and a position index indicating a symbol of difference data from the incremental mode encoder 758 and entropy encodes it, and receives a symbol and a position index of the difference data from the generation mode encoder 756. The symbol is encoded using the encodeSignedQuasiAAC () function.

The encodeSignedQuasiAAC () function generates an adaptive arithmetic-encoded bitstream using the input value and the context for the sign, which encodes the first non-zero bit and then encodes the remaining bits. Is encoded using a test string.

9D is a flowchart illustrating a symbol encoding process using the encodeSignedQuasiAAC () function.

The entropy encoder 760 receives a symbol of difference data to be encoded and a bit size QBit of each symbol (S9810).

The entropy encoder 760 first subtracts 2 from the input bit size and stores it in the variable i (S9820).

Thereafter, the entropy encoder 760 stores the absolute value of the value (nValue) to be entropy encoded in the variable val, performs SR (Shift Right) operation on val, and performs the SR operation with "1. "And operation to store the result in the bit variable (S9830). When this step is performed for the first time, the first bit of the input value to be entropy encoded except for the sign is detected, and in the subsequent step, the first bit is read one bit after the first bit.

The entropy encoder 760 checks whether the val value is 1 or less (S9840). If val is greater than 1, the entropy encoder 760 encodes the bit value according to the zero context (S9850) using the qf_encode () function. On the other hand, if the val value is 1 or less, the bit value is encoded according to the i th context using the qf_encode () function (S9860).

If the val value is 1 or less, the entropy encoder 760 checks again whether the val value is 1 (S9870), and if the val value is 1, sets a sign of the nValue value (S9880), and sets the set sign and sign contact. The encoding is performed according to the text (S9890).

On the other hand, when the encoding process of one bit is finished, the entropy encoder 760 decreases i by 1 (S9900), checks whether the reduced i is less than 0 (S9910), and then describes i until it becomes smaller than 0. Steps S483 to S490 are repeated to entropy-encode the input value.

As a result, according to the above-described process, the entropy encoder 760 encodes the first non-zero value of the input value according to the context of the corresponding bit position, and encodes all subsequent bits according to the zero context.

Hereinafter, referring to FIG. 7A again, information encoded by the key value header in the key value header encoder 500 according to the present invention will be described.

The key value header encoder 500 receives an input coordinate interpolator and encodes a mode of data, the number of vertices of each key frame, the number of bits required to encode the number of vertices, and the maximum significant digit of each real number.

Meanwhile, the key value header encoder 500 encodes the number of quantization bits, the minimum and maximum ranges of each component of each vertex required for quantization, and the maximum and minimum values of each component of each vertex after quantization from the quantizer 710. do.

In addition, the key value header encoder 500 receives a DPCM operation mode performed on each component data of each vertex from the DPCM processor 720, and receives a pre-coding mode from the pre-encoder 750 to encode the same.

The key and key value data encoding apparatus of the coordinate interpolator according to the preferred embodiment of the present invention has been described so far. Hereinafter, a method and apparatus for decoding a bitstream in which the key and key value data of the coordinate interpolator according to the preferred embodiment of the present invention will be described with reference to the accompanying drawings.

12 is a block diagram showing a configuration of a coordinate interpolator decoding apparatus according to a preferred embodiment of the present invention.

The decryption apparatus of the present invention includes a key data decoder 1300 for decoding key data in an input bitstream, a key value data decoder 1500 for decoding key value data in an input bitstream, and an input bitstream. And a header decoder 1500 for decrypting header information necessary for decrypting key and key value data and providing the same to the key data decoder 1300 and the key value data decoder 1500.

Hereinafter, a key data decoder 1300 and a decryption method according to a preferred embodiment of the present invention will be described with reference to FIGS. 13 to 14B.

13 is a block diagram showing the configuration of a key data decoder 1300 according to a preferred embodiment of the present invention. The key data decoder of the present invention receives an encoded bitstream and reconstructs the decrypted key data.

The key data decoder 1300 of the present invention includes an entropy decoder 1310, an inverse DND processor 1320, an inverse folding processor 1330, an inverse shifting unit 1340, an inverse DPCM processor 1350, and an inverse quantizer ( 1360, a linear key decoder 1380, and a real inverse transform unit 1370.

14A is a flowchart illustrating a key data decryption method according to a preferred embodiment of the present invention.

First, the input bitstream is input to the header decoder 1800 and the entropy decoder 1310.

The header decoder 1800 decodes the information necessary for each decoding step and provides the information to each step. The information decoded by the header decoder 1800 will be described for each step (S14000).

The entropy decoder 1310 receiving the bitstream receives the number of differential data to be decoded and the number of bits used for encoding, that is, the number of bits to be decoded, from the header decoder 1800 to entropy decode the bitstream ( S14100). At this time, the number of difference data to be decrypted is the number obtained by subtracting the number of intra key data of the DPCM operation from the number of given key data.

When the entropy decoder 1310 decodes the bitstream, the entropy decoder 1310 refers to predetermined information included in the bitstream (bSignedAACFlag in this embodiment) to identify whether the encoded differential data includes a negative number. Decode using the) function, or decodeUnsignedAAC () if it did not contain a negative number. The difference data decoded in this way is transferred to the inverse DND processing unit 1320.

The inverse DND processor 1320 receiving the entropy-decoded difference data receives a DND order and a maximum value nKeyMax in each DND order from the header decoder 1800.

If the DND order is -1, this indicates that the encoder has entropy-coded the DPCM-operated shifted differential data instead of the DND-operated differential data, and thus proceeds directly to the process of performing the inverse shifting operation. On the other hand, if the DND order is 0, this indicates that the encoder entropy-coded the folded difference data instead of the DND-operated difference data, and thus proceeds directly to the process of performing the reverse folding operation. However, if the DND order is greater than zero, an inverse DND operation is performed (S14200).

First, the inverse DND processor 1320 determines whether differential data on which the shift-up operation is performed is encoded (S14300). In a preferred embodiment of the present invention, by checking whether the value of nKeyInvertDown included in the bitstream is greater than 0, it is determined whether the difference data on which the shift-up operation is performed is encoded.

If the difference data on which the shift-up operation is not performed is encoded, the inverse DND processing unit 1320 proceeds to a process of performing an inverse DND operation. However, if the differential data on which the shift-up operation is performed is encoded, the differential data moved to the positive region due to the shift-up operation is reduced back to the original negative region (S14400). An embodiment of the present invention restores the shift-up calculated differential data by performing a shift-down operation (hereinafter, used in the same sense as “invert-down”) represented by Equation 20 below. .

invert-down (v)

= v, (if v ≤ nKeyInvertDown)

= nKeyInvertDown-v, (if v> nKeyInvertDown)

Here, nKeyInvertDown uses the same value as the maximum value nKeyMax in the shift-up operation. By shift-down operation, difference data exceeding nKeyInvertDown is converted to a negative value of -1 or less.

The reverse divide-down or reverse divide-up operation is selectively performed on the difference days on which the shift-down operation is performed according to the nKeyMax value in each DND order.

Referring to FIG. 14B, the inverse DND operation process will be described. The inverse DND processing unit 1320 performs an inverse DND operation by the number of orders of the DND operation performed in the encoding process. That is, the inverse DND processor 1320 sets the initial value of the inverse DND order to the DND order, subtracts one by one each time the inverse DND operation is performed, and performs the inverse DND operation until the inverse DND order becomes one. First, the inverse DND processing unit 1320 examines the nKeyMax value in each order to determine whether the nKeyMax value is greater than or equal to zero (S14510).

If the nKeyMax value is less than 0, it means that the divide-up operation is performed in the encoding process, and thus, the inverse DND processing unit 1320 extends the range of the difference data to the negative region by performing the inverse divide-up operation (S14530). The preferred embodiment of the present invention utilizes an inverse divide-up operation such as

inverse-divide-up (v)

= v (if, v≥0)

= (nKeyMax _i -1)-(v-1) / 2 (if v <0, v mod 2 ≠ 0)

= v / 2 (if v <0, v mod 2 = 0)

However, if nKeyMax is equal to or greater than zero, the inverse DND processing unit 1320 checks whether the order of the inverse DND operation is one. If the inverse DND order is not 1, it means that the divide-down operation is performed at the time of encoding, and thus, the inverse DND processor 1320 extends the range of the differential data to the positive region by performing the inverse divide-down operation (S14570).

The preferred embodiment of the present invention utilizes an inverse divide-down operation such as

inverse-divide-down (v)

= v (if, v≥0)

= (nKeyMax _i +1) + (v-1) / 2 (if v <0, v mod 2 ≠ 0)

= v / 2 (if v <0, v mod 2 = 0)

If nKeyMax is equal to or greater than 0 and the order of the inverse DND operation is 1, the inverse DND processing unit 1320 ends the inverse DND operation by performing the inverse divide operation (S14590). The preferred embodiment of the present invention uses an inverse divide operation such as the following equation (23).

inverse-divide (v)

= v, (if v ≥0)

= v + (nKeyMax ₀ + 1), (if v <0)

The difference data of the key data on which the inverse DND operation is performed is input to the inverse folding processing unit 1330, and the inverse folding processing unit 1330 performs the inverse folding operation so that the range of the difference data located only in the positive region is positive and negative. Separate (S14600). In the preferred embodiment of the present invention, an inverse folding operation such as Equation 24 is used.

inverse-fold = (v + 1) / (-2), (if v mod 2 ≠ 0)

= v / 2, (if v mod 2 = 0)

= 0, (if v = 0)

The reverse-folded difference data is output to the inverse shifting unit 1340, and the inverse shifting unit 1340 receives a mode (nKeyShift) used in the encoder from the header decoder 1800, as shown in Equation 25 below. The mode is added to the input difference data (S14700).

inverse-shift (v) = v + nKeyShift

The inverse DPCM processor 1350 that receives the difference data from the inverse shifting unit 1340 receives the DPCM order from the key header encoder 1800, and restores the difference data into quantized key data (S14800). The reverse shifting unit 1340 performs an inverse DPCM operation by the DPCM order using Equation 26 below.

v (i + 1) = v (i) + delta (i)

Here, i denotes an index of difference data and key data, v denotes an integer array, and delta (i) denotes differential data.

The quantized key data generated by the inverse DPCM process is input to the inverse quantizer 1360, and the inverse quantizer 1360 receives a quantization bit size (nKeyQBit) and a maximum value to be used for inverse quantization from the header decoder 1800. Whether the minimum value is encoded by the real transform unit 205 during the quantization process is input, and the input quantized key data is converted into inverse quantized key data using Equation 27 (S14900).

When quantizing the key data in the encoder, fKeyMin and fKeyMax in Equation 27 are set to 0 and 1, respectively, if the maximum value and the minimum value used for the quantization have not been transformed in the real number conversion unit 205. However, if the maximum and minimum values used for quantization are converted by the real transform unit 205, the maximum and minimum values used for inverse quantization are inversely transformed and input by the real inverse transform unit 1370 to be described later. Are used respectively.

Meanwhile, the decrypted key data output from the inverse quantizer 1360 is added to the linear key data decrypted by the linear key decoder 1380 to form the decrypted key data.

Hereinafter, a linear key decryption process will be described (S15000).

If the header decoder 1800 decrypts the key header information from the bitstream and has information about the linear key, the header decoder 1800 outputs the information necessary for decoding the start key and the end key of the linear key region to the real inverse transform unit 1370, The linear key decoder 1380 outputs the number of keys encoded with the linear key.

The real inverse transform unit 1370 that receives the start key and the end key information to be used for the linear key decryption converts the start key and the end key represented by the decimal system back to the binary system and outputs the linear key decoder 1380. do.

If two real numbers to be decoded are called fKeyMin and fKeyMax, the process of inverting the first value fKeyMin is as follows.

The header decoder 1800 reads the number of digits of fKeyMin from the bitstream. If the number of digits is 0, the value of fKeyMin is set to 0, and the number of digits of fKeyMax is read from the bitstream to decode the value of fKeyMax. If the number of digits is 8 or more, the code is encoded according to the IEEE standard 754 method. After reading the floating-point number by 32 bits, the process proceeds to decoding the value of fKeyMax.

However, if the digit has a value between 1 and 7, the header decoder 1800 reads the sign bit from the bitstream. In the embodiment of the present invention, if the sign bit is 1, MinKeyMantissaSign is set to -1, and if it is 0, MinKeyMantissaSign is set to 1 to read the sign. Then, mantissa is obtained by referring to the relationship between the number of digits in Table 4 and the required number of bits, and then the necessary number of bits is read from the bitstream by that number of bits, and the read value is stored in nMinKeyMantissa. Thereafter, 1 bit is read from the bitstream and stored in MinKeyExponentSign, but stored in the same manner as MinKeyMantissaSign. An exponent value of 6 bits is read from the bitstream and stored in nMinKeyExponent.

The real inverse transform unit 1370 restores fKeyMin by substituting the value input from the header decoder 1800 into Equation 28 below.

Restoring fKeyMax is the same as fKeyMin. However, before reading the exponent of fKeyMax from the bitstream, read whether the same exponent as fKeyMin is used as the exponent of fKeyMax, and if the same value is used, use the exponent of fKeyMin; The exponent of fKeyMax is read in the same manner as the read method.

Meanwhile, the linear key decoder 1380 that receives the start key and the end key of the linear key region from the real inverse transform unit 1370 decodes the linear key region using Equation 29 below.

Here, fKeyMin and fKeyMax mean start and end key data of the linear key area.

Hereinafter, a key value data decoder and a decryption method for decoding key value data of the encoded coordinate interpolator of the present invention will be described with reference to FIGS. 15A and 15B.

15A is a block diagram showing the configuration of a key value data decoder according to a preferred embodiment of the present invention, and FIG. 15B is a flowchart illustrating a decryption method according to a preferred embodiment of the present invention.

Referring to FIG. 15A, the key value data decoder 1500 of the present invention entropy-decodes an input bitstream to perform a symbol for a DPCM-operated differential data, a symbol setting flag, an index indicating a position of the symbols, and a DPCM operation. An entropy decoder 1505 for generating pre-decoded data including a mode, a pre-decoder 1510 for generating predetermined differential data according to an index indicating a symbol of the pre-decoded data and a symbol position, and a DPCM operation mode An inverse DPCM processor 1530 for performing a predetermined inverse DPCM operation on the differential data to generate quantized data, an inverse quantizer 1550 for inversely quantizing the quantized data to generate reconstructed key value data, and bits Decode the information necessary for decoding the coordinate interpolator from the stream to predecoder 1510, inverse DPCM processing unit 1530, and inverse quantum And a key value header decoder 1800 outputs to the group (1550).

A decoding method of the present invention will be described with reference to FIG. 15B.

When the bitstream encoding the coordinate interpolator is input to the entropy decoder 1505 (S1710), the entropy decoder 1505 decodes the bitstream, and when the bitstream is encoded in the generation mode, the predecoder 1510. The symbol of each vertex and the position index of the symbol are outputted, and if the symbol is encoded in the incremental mode, the symbol flag indicating the existence of the symbol and the index indicating the position of the symbol are output to the predecoder 1510 (S1720). .

The predecoder 1510 generates a differential mode by generating a mode decoded input symbol and an index according to the input precoding mode, or incrementally decodes the input symbol flag and an index, and inverses the DPCM processing unit. Output to step 1530 (S1730).

The inverse DPCM processor 1530 quantizes the input differential data by performing one of an inverse cyclic quantization and an inverse time DPCM operation, an inverse space DPCM operation, and an inverse space-time DPCM operation for each vertex according to the decoded DPCM mode. The obtained key value data is output to the inverse quantizer 1550 (S1740).

The inverse quantizer 1550 dequantizes the input quantized key value data using the minimum value and the maximum range of each component data input from the key value header decoder 1800 (S1750).

In addition, when the inverse quantized key value data matrix is encoded, the inverse quantizer 1550 checks whether the inverse quantized key value data matrix has been converted (S1760).

The inverse quantizer 1550 outputs key value data of the restored coordinate interpolator (S1770).

Hereinafter, the key value data decrypting apparatus and method of the present invention will be described in detail with reference to FIGS. 16A to 17B.

The entropy decoder 1505 first decodes the bitstream indicating the DPCM mode from the input bitstream, and decodes data arrays such as bSelFlag, nKVACodingBit, nQMin, and nQMax.

BSelFlag is initially set to 1 and nKVACodingBit is initially set to 0 in the encoding process. If the bSelFlag is decoded with 1, the entropy decoder 1505 decodes another data array (nKVACodingBit, nQMin, nQMax). However, if bSelFlag is decrypted with 0, the entropy decoder 1505 only decodes the nQMin array.

The entropy decoder 1505 decodes the nDicModeSelect indicating the pre-coding mode after decoding the arrays. The bitstream to be decoded is classified into two types according to the nDicModeSelect value.

FIG. 18A illustrates a bitstream structure of each vertex of the coordinate interpolator and component data of each vertex. FIG. If the decoded nDicModeSelect value is 0 as shown in FIG. 18A, the bitstream structure includes information such as symbols and indexes encoded in the generation mode encoder, and if the nDicModeSelect value is 1, the bitstream structure is encoded in the incremental mode encoder. It contains information such as a symbol flag and a position index indicating whether a symbol is present.

The entropy decoder of the present invention used the decodeSignedQuasiAAC () function implemented with the program code shown in FIG. 18B. This function decodes an adaptive arithmetic coded bitstream using contexts for sign and value. This function decodes using a zero context for the bit read after the sign bit. The entropy decoder outputs the decoded data to the predecoder 1510.

16A is a block diagram showing the configuration of a predecoder 1510 of the present invention, and FIG. 17A is a flowchart for explaining a predecoding method.

As shown in Fig. 16A, the pre-decoder 1510 of the present invention includes a DPCM mode decoder 1512 for reconstructing the DPCM mode of each input vertex, and a pre-mode selection for selecting a pre-coding mode of each input vertex. 1515, generation mode decoder 1516 which receives the symbol of each component of each vertex and the position index of the symbol from dictionary mode selector 1514, and restores the differential data, and from dictionary mode selector 1514. And an incremental mode decoder 1518 that receives the symbol flag and the symbol position index and restores the differential data.

Referring to FIG. 17A, component data including a symbol, a symbol flag, and a position index of each entropy decoded vertex are input to a DPCM mode decoder 1512 (S1731).

The DPCM mode decoder 1512 decodes the inverse DPCM operation mode to be performed on the difference data of each component of each vertex in the inverse DPCM processing unit 1530 before outputting the input difference data to the inverse DPCM processing unit 1530. (S1732).

Hereinafter, a DPCM mode decoding method will be described with reference to FIG. 19A.

The DPCM mode decoding method is the same as the incremental mode decoding method described later, except that the number of symbols representing the combination of DPCM modes of each component of each vertex is fixed to 27, and thus the size of the symbol table is fixed to 27. .

The DPCM mode decoder 1512 receives the input DPCM mode flag, and records a symbol corresponding to the flag in the data string according to the input index.

For example, as shown in FIG. 19A, the symbols corresponding to the input DPCM mode flags are 1 (TTS), 4 (TSS), and 5 (TS T + S), and the index corresponding to each symbol is (0 1). 0 1 0 0), (1 0 1 0), and (1 1). Therefore, if symbol 1 is recorded according to the index corresponding to symbol 1, the data string becomes (X 1 X 1 XX), and if symbol 4 is recorded according to the index corresponding to symbol 4, the data string is (4 1 X 1 4). X), and when the symbol 5 is recorded according to the index corresponding to the symbol 5, the data string becomes (4 1 5 1 4 5).

Converting the recovered data stream (4 1 5 1 4 5) to the DPCM mode corresponding to each symbol, it becomes (TSS) (TTS) (TS T + S) (TTS) (TSS) (TS T + S). . Therefore, it is possible to know which DPCM operation is performed on each component of each vertex.

The DPCM mode decoder 1512 outputs difference data of each component of each vertex to the dictionary mode selector 1514 together with the decoded DPCM mode information.

The dictionary mode selector 1514 outputs each component data input from the DPCM mode decoder 1512 to the generation mode decoder 1516 or the incremental mode decoder according to the nDicModeSelect value of each component of each vertex (S1734).

If the nDicModeSelect value is 0, the dictionary mode selector 1514 outputs the component data of the vertex to the generation mode decoder 1516. If the nDicModeSelect value is 1, the dictionary mode selector 1514 outputs the component data of the vertex to the incremental mode decoder 1518. Output

The generation mode decoder 1516 restores the input symbol data and the position index of each component into differential data (S1736).

Referring to FIG. 19B, which illustrates a generation mode decoding method, the generation mode decoder 1516 receives symbol data from a pre-mode selection unit 1514 and examines bSoleKV and nTrueOne flags.

If the bSoleKV flag indicates that there are several symbols entered, and the nTrueOne flag indicates that the position index to be input afterwards is not inverted, the generation mode decoder 1516 inserts the input symbol into the data string at the position indicated by the position index. By doing so, the difference data is restored.

For example, the generation mode decoder 1516 receives the symbols (3, 7, -4) in the order in which they are generated when they are encoded, and indexes corresponding to each of the input symbols (0 1 0 0 0 1 0 1 0 00 ), (1 0 1 0 1 0 0) and (1 1 1).

The generation mode decoder 1516 records the first symbol 3 in the differential data string to be restored, and then records the symbol 3 at the position of the differential data string in which 1 of the input index is set. Therefore, as shown in FIG. 19A, when the generation mode encoding process of symbol 3 is finished, the differential data sequence is filled with (3 x 3 x x x 3 x 3 x x x).

The generation mode decoder restores the next symbol 7. However, when restoring the symbol 7, the position where the previous symbol 3 is recorded in the differential data string is not taken into account. Therefore, the index corresponding to the symbol 7 becomes (1 0 1 0 1 0 0) rather than (0 1 0 1 0 0 0 1 0 0).

The generation mode decoder 1516 records the symbol 7 at the first position where the symbol 3, which has already been restored, is not recorded, and then records the symbol 7 at the position at which the index corresponding to the symbol 7 is set to 1. Therefore, the differential data sequence from which the symbol 7 is restored becomes (3 7 3 7 x 7 3 x 3 7 x x).

The generation mode decoder 1516 restores the last symbol -4 according to the index (1 1 1), and the last reconstructed differential data string becomes (3 7 3 7 -4 7 3 -4 3 7 4 -4). .

On the other hand, if the above-described bSoleKV is set to 1, this means that only one input symbol exists in the difference data, and therefore, there is no position index corresponding to the input symbol, and thus, the generation mode decoder 1516. Writes the input symbol at the first position of the differential data string in which the symbol is not recorded, and performs a restoration process of the next symbol.

On the other hand, the incremental mode decoder 1518 restores the input symbol flag and the position index of each component to differential data (S1736). Hereinafter, an incremental mode decoding method will be described with reference to FIG. 19C showing an example of the incremental mode decoding method.

The incremental mode decoder 1518 receives a symbol flag indicating whether a symbol exists, an nTrueOne flag indicating whether a position index is inverted, and a position index from the dictionary mode selector 1514.

The incremental mode decoder 1518 decodes the symbols included in the differential data from the input symbol flag. As described in the incremental mode encoding method, the symbol table is arranged in ascending order of magnitude, and a positive number is higher than a negative number. (ie 0, 1, -1, 2, -2, 3, -3, etc.). In addition, the size of the symbol flag is 2 ^{(nKVCodingBit + 1)} −1, and nKVCodingBit represents the number of quantized bits decoded by the entropy decoder 1505. Thus, if the symbol flag is (0 0 1 1 0 0 1), the incremental mode decoder 1518 decodes -1, 2 and -3 as symbols present in the differential data.

Also, the indexes entered after the symbol flags are (1 0 1 0 0 0 1 0 1 0 0 0), (0 0 1 0 1 0 1 1), (1 1 1 1), and these are symbols (-1, 2 and 3) respectively.

The incremental mode decoder 1518 writes -1 at a position set to 1 at an index (1 0 1 0 0 0 1 0 1 0 0 0) corresponding to the first symbol -1. Thus, the differential data sequence reconstructed for the first symbol is equal to (−1 × −1 ××× −1 × −1 ×× x).

The incremental mode decoder 1518 then writes the second symbol 2 to the position where index 1 (0 0 1 0 1 0 1 1) is set to recover symbol 2. However, even in this case, since the position where the first symbol -1 is written is not considered, the difference data string recorded up to symbol 2 is equal to (-1 x -1 x 2 x -1 2 -1 x 2 2).

The incremental mode decoder 1518 writes the last symbol -3 at a position where 1 of the index (1 1 1 1) is set, and restores the symbol -3. The final reconstructed differential data string is equal to (-1 -3 -1 -3 2 -3 -1 2 -1 -3 2 2).

The generation mode decoder 1516 and the increment mode decoder 1518 described above restore the difference data of each component of each vertex, and output the restored difference data to the inverse DPCM processing unit 1530 (S1739).

FIG. 16B is a block diagram showing the configuration of the reverse DPCM processing unit 1530 of the present invention, and FIG. 17B is a flowchart for explaining the reverse DPCM calculation method.

Referring to FIG. 16B, an inverse DPCM processing unit 1530 of the present invention outputs key value data of a quantized coordinate interpolator by performing inverse time DPCM operation and inverse cyclic quantization on input difference data. ), An inverse spatial DPCM operation unit 1544 that outputs quantized key value data by performing inverse spatial DPCM operation and inverse cyclic quantization on the input difference data, and performs inverse space-time DPCM operation and inverse cyclic quantization on the input difference data An inverse time-space DPCM operation unit 1546 for outputting quantized key value data, and inverse time DPCM operation unit 1542 and an inverse space DPCM operation unit for differential data input from the predecoder 1510 according to the DPCM mode of each vertex inputted. 1544, and an inverse DPCM mode selection unit 1535 for outputting to any one of the inverse space-time DPCM calculating unit 1546.

Referring to FIG. 17B, an inverse DPCM mode selector 1535 may be performed on differential data input according to a DPCM operation mode of each component of each vertex restored by the DPCM mode decoder 1512 of the predecoder 1510. The inverse DPCM operation is determined, and the difference data of each component of each vertex is output according to the determined inverse DPCM operation mode (S1742).

Each DPCM calculator performs inverse DPCM operation and inverse cyclic quantization on the input difference data.

The inverse time DPCM operation unit 1542 performs an inverse time DPCM operation on the input difference data according to Equation 30 below (S1744), and the inverse space DPCM operation unit 1544 performs the inverse space DPCM according to Equation 31 below. In operation S1746, the inverse space-time DPCM calculating unit 1546 performs an inverse space-time DPCM operation according to Equation 32 below (S1748).

In the above equations Denotes quantized key value data of the j th vertex of the i th key frame, Denotes the difference data of the j-th vertex of the i-th key frame, and Ref represents the reference vertex.

In Equation 31 and Equation 32, or Is less than the quantized minimum, use the quantized minimum instead of the above values, or If is greater than the quantized maximum, then the quantized maximum is used instead of the values.

Each DPCM operation unit performing the inverse DPCM operation performs an inverse DPCM operation using Equation 33 below, and simultaneously performs inverse cyclic quantization to expand the range of the differential data reduced in the encoding process.

In Equation 33 Is Is the same input value as Is , or Previously inverse cyclic quantized values, such as In addition, nQMax represents the maximum value of the difference data, and nQMin represents the minimum value of the difference data.

The inverse DPCM processor 1530 outputs an inverse DPCM operation and an inverse cyclic quantized quantized key value data for each component of each vertex to the inverse quantizer 1550 (S1749).

Referring back to FIG. 15B, the inverse quantizer 1550 calculates the minimum values fMin_X, fMin_Y, and fMin_Z and the maximum range value fMax of each component data input from the key value header decoder 1800. After converting to a real number of a binary system according to the relation of, and using these values, the input quantized key value data is inversely quantized according to Equation 34 below.

In Equation 34, nKVQBits is a quantization bit size used for inverse quantization.

Meanwhile, the inverse quantizer 1550 should output key value data of each component of each inverse quantized vertex in the matrix format described in Table 3. Accordingly, the inverse quantizer 1550 checks whether the mode of the inverse quantized key value data is a pre-mode before outputting the key value data (S1760). If the inverse quantized key value data is the pre-mode, the inverse quantizer 1550 inversely transforms the prematrix to output key value data of the decoded coordinate interpolator (S1765).

The invention can also be embodied as computer readable code on a computer readable recording medium. The computer-readable recording medium includes all kinds of recording devices in which data that can be read by a computer system is stored. Examples of computer-readable recording media include ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage, and the like, which are also implemented in the form of a carrier wave (for example, transmission over the Internet). It also includes. The computer readable recording medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion.

So far I looked at the center of the preferred embodiment for the present invention. Those skilled in the art will appreciate that the present invention can be implemented in a modified form without departing from the essential features of the present invention. Therefore, the disclosed embodiments should be considered in descriptive sense only and not for purposes of limitation. The scope of the present invention is shown in the claims rather than the foregoing description, and all differences within the scope will be construed as being included in the present invention.

The coordinate interpolator encoding apparatus of the present invention can encode animation key data with high efficiency by including a key data encoder for encoding key data by using a monotonically increasing property of key data, and not only spatial correlation but also temporal correlation. The key value data can be encoded with high efficiency, including a key value data encoder for encoding the key value data in consideration of the relationship, so that high quality animation can be restored with a small amount of data.

Claims (21)

In a key frame-based graphic animation scheme, the key data includes key data representing a position on a time axis of a key frame, and key value data representing a position of an object on a key frame in coordinates of vertices including x, y, and z components. An apparatus for encoding a coordinate interpolator, A first quantizer for quantizing the key data of the coordinate interpolator into predetermined quantization bits, A first DPCM processor configured to generate differential data of the quantized key data; A DND processor for performing a DND operation to reduce the range of the difference data according to the relationship between the difference data and the maximum and minimum values of the difference data, and A key data encoder including a first entropy encoder for encoding difference data input from the DND processor; A second quantizer for quantizing the key value data of the coordinate interpolator to a predetermined number of quantization bits, A second DPCM processing unit performing DPCM operation of a predetermined mode on each vertex component of the quantized key value data to generate difference data according to temporal change of each vertex coordinate and difference data according to spatial change; A pre-encoder for generating differential data of each vertex component computed by DPCM and a symbol representing a DPCM operation mode performed on the differential data and an index indicating a position of the symbol; and A key value data encoder comprising a second entropy encoder for entropy encoding the symbols and indices; And And a header encoder for encoding information necessary for decoding the bitstream encoded by the key data encoder and the key value data encoder. The method of claim 1, wherein the key data encoder And a linear key encoder for identifying and encoding an area in which key data increases linearly among all input key data. The method of claim 1, wherein the key data encoder A shifting unit for obtaining differential data (mode) having the highest frequency among the differential data input from the first DPCM processing unit, and subtracting the mode from the differential data; and The apparatus may further include a folding processor configured to convert the shifted difference data into a positive or negative region. And the DND processing unit selects and outputs one of differential data input from the shifting unit, differential data input from the folding processing unit, and DND calculated differential data according to the number of bits required for encoding. The method of claim 1, wherein the second DPCM processing unit A time DPCM operation for generating first difference data between key frames for each vertex component of the quantized key value data, a spatial DPCM operation for generating second difference data between vertices within the same key frame, and a first between key frame and vertex A DPCM operation unit which performs a space-time DPCM operation for generating third-order data; A cyclic quantizer for performing cyclic quantization for reducing the range of the difference data with respect to the first to third difference data inputted from the DPCM calculating unit; And And a DPCM mode selector for selecting and outputting one of the first to third differential data cyclically quantized according to the number of bits required for encoding. The method of claim 1, wherein the pre-encoder A DPCM mode encoder generating, for each vertex, symbols representing a combination of DPCM modes performed on each vertex component data and an index representing the position of the symbols; And And a generation mode encoder for generating indexes representing the positions of the symbols and symbols corresponding to the difference data of the respective vertex components. In a key frame-based graphic animation scheme, the key data includes key data representing a position on a time axis of a key frame, and key value data representing a position of an object on a key frame in coordinates of vertices including x, y, and z components. An apparatus for decoding a bitstream encoding a coordinate interpolator, A header decoder for decoding and outputting header information necessary for decrypting key and key value data from an input bitstream; A first entropy decoder for entropy decoding the input bitstream and outputting differential data of the decrypted key data, An inverse DND processing unit for performing an inverse DND operation on the difference data of the entropy-decrypted key data according to the DND order read from the header decoder to expand a range of the difference data; A first inverse DPCM processor for performing inverse DPCM operations on difference data input from the inverse DND processor by the DPCM order input from the header decoder to output quantized key data; and A key data decoder comprising a first inverse quantizer for inversely quantizing the quantized key data and outputting the decrypted key data; And A second entropy decoder that entropy decodes the input bitstream to generate data to be pre-decrypted including symbols of differential data of DPCM-operated key value data, an index indicating the positions of the symbols, and a DPCM operation mode; A pre-decoder for generating differential data of key value data by performing a pre-decryption operation according to the pre-decryption mode information inputted from the header decoder; A second inverse DPCM processing unit for generating quantized data by restoring difference data between key frames and difference data between respective vertices according to the DPCM operation mode; and And a key value data decoder comprising a second inverse quantizer for inversely quantizing the quantized data to generate reconstructed key value data. The method of claim 6, wherein the key data decryptor A reverse folding processing unit for receiving the difference data from the inverse DND processing unit and performing a reverse folding operation for separating the difference data into a negative number and a positive number according to the DND order input from the header decoder; And The apparatus may further include an inverse shifting unit configured to add a predetermined mode received from the header decoder to the difference data input from the inverse DND processing unit or the inverse folding processing unit to move a range of the difference data. And the first inverse DPCM processing unit restores the difference data inputted from the inverse shifting unit and outputs quantized key data. The method of claim 6, wherein the second reverse DPCM processing unit An inverse time DPCM operation unit performing an inverse DPCM operation on difference data between key frames of the same vertex; An inverse spatial DPCM calculating unit performing an inverse DPCM operation on difference data between each vertex in the same key frame and a reference vertex corresponding to each vertex; And And an inverse DPCM mode selector configured to output difference data to the inverse time DPCM operation unit or the inverse spatial DPCM operation unit according to the DPCM operation mode. In a key frame-based graphic animation scheme, a coordinate interpolator including key data, which is position information on a time axis of a key frame, and key value data representing a position of an object in coordinates of vertices including x, y, and z components. Is a bitstream encoded by The bitstream includes key data encoding / decoding information encoding key data and key value data encoding / decoding information encoding key value data. The key data encoding / decoding information is An inverse DND order indicating the number of times to perform an inverse DND operation that extends the range of differential data generated by entropy decoding the key data bitstream, and a maximum value and a minimum value used for an inverse DND operation in each inverse DND order. Inverse DND operation information, First reverse DPCM operation information including a number of inverse DPCM operations for converting the difference data on which the inverse DND operation is performed into quantized key data and intra key data used for each inverse DPCM operation, and First inverse quantization information used for inverse quantization for inversely quantizing the quantized key data to generate reconstructed key data; The key value data encoding / decoding information is Information about a symbol representing differential data of pre-encoded key value data, entropy decoded from the key value data bitstream, a first position index indicating a position of the symbol, and a pre-decoding method to be performed on the first position index Pre-decoding information including a pre-decoding mode indicating a Second inverse DPCM operation information including a second position index indicating a position of a symbol indicating a combination of inverse DPCM operation modes used for inverse DPCM operation for converting difference data of each pre-decoded vertex component into quantized key value data , And And second inverse quantization information used for inverse quantization for inversely quantizing the quantized key value data to generate reconstructed key data. 10. The apparatus of claim 9, wherein the inverse DND operation information is And a flag indicating whether to perform a shift down operation on the difference data on which the inverse DND operation is to be performed. 10. The method of claim 9, wherein the first inverse quantization information is And an inverse quantization bit size used for inverse quantization of the quantized key data, and a maximum and minimum value of the quantized key data. The method of claim 11, And the maximum and minimum values of the quantized key data are the maximum and minimum values of the quantized key data that minimize the quantization error of the quantized key data. 10. The method of claim 9, wherein the key data encoding / decoding information is The apparatus further includes linear key decryption information for decrypting a linear key region included in the bitstream, wherein the linear key decryption information is Among the key data, a flag indicating whether or not the linear key region linearly increases, the number of key data included in the linear key region, the start key data and the end key data of the linear key region, characterized in that it comprises Bitstream. The method of claim 13, And the start key data and the end key data are encoded with mantissa and exponent in decimal format. The method of claim 9, wherein the pre-decryption information is When the pre-decoding mode is the generation mode, and includes a symbol corresponding to the difference value present in the difference data and a position index indicating the position of the symbol, If the pre-decoding mode is an incremental mode, a symbol flag indicating whether a difference value present in the difference data exists in a predetermined symbol table and a position index indicating a position of a symbol corresponding to the symbol flag are included. Bitstream. 10. The apparatus of claim 9, wherein the second inverse DPCM operation information is And further including an inverse DPCM mode flag indicating whether a symbol corresponding to an inverse DPCM operation to be performed on differential data of each vertex component among symbols included in a table indicating a combination of inverse DPCM operation modes to be performed on each vertex component. And a bitstream. 17. The combination of claim 16, wherein the combination of inverse DPCM operation modes is And a combination of inverse time DPCM operations, inverse space DPCM operations, and inverse space time DPCM operations to be performed on the differential data of each component of each vertex. 18. The apparatus of claim 17, wherein the second inverse DPCM operation information is If the inverse DPCM operation to be performed on the differential data by the inverse DPCM mode flag is an inverse space DPCM operation or an inverse space-time DPCM operation, a criterion indicating a reference vertex corresponding to a vertex to be performed in the inverse space DPCM operation or an inverse space-time DPCM operation And a vertex flag. 10. The method of claim 9, wherein the second inverse quantization information is A vertex selection flag indicating a vertex of key value data to be inverse quantized, a minimum value and a maximum range of key value data to be used for inverse quantization of key value data of a vertex component selected according to the vertex selection flag, and a key of the selected vertex A bitstream comprising an inverse quantization bit size used for inverse quantization of value data. 20. The apparatus of claim 19, wherein the second inverse quantization information is The number of vertices included in the key value data to be inverse quantized, the maximum number of significant digits of the key value data, the maximum and minimum values of the maximum value of each component data of each vertex, and the maximum value of the minimum values of each component data of each vertex. And a minimum value. 10. The method of claim 9, wherein the key value data encoding / decoding information is And a flag indicating whether the encoding method of the key value data is a pre mode or a vertex mode.