KR20030033717A - A plasma display panel driving apparatus which can do the address discharging of a low voltage and driving method thereof - Google Patents

Abstract

PURPOSE: An apparatus and a method of driving a plasma display panel for performing low voltage address discharge are provided to perform an address operation by using only an address driving voltage of a low voltage. CONSTITUTION: A plasma display panel(100) includes a plurality of address electrodes(A1-Am), a plurality of scan electrodes(X1 to Xn), and a plurality of sustain electrodes(Y1 to Yn). An address driving portion(200) receives an address driving control signal and applies a display data signal to each address electrode. A scan sustain driving portion(300) receives a discharge sustain signal from a control portion(400) and applies a sustain pulse voltage to the scan electrodes(X1 to Xn) and the sustain electrodes(Y1 to Yn). The control portion(400) receives the image signal from the outside and generates an address driving control signal and a sustain discharge signal to the address driving portion(200) and the scan sustain driving portion(300).

Description

TECHNICAL FIELD [0001] A PLASMA DISPLAY PANEL DRIVING APPARATUS WHICH CAN DO THE ADDRESS DISCHARGING OF A LOW VOLTAGE AND DRIVING METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving apparatus and a driving method of a plasma display panel. More particularly, the present invention relates to a driving apparatus and a driving method of a plasma display panel for performing low-voltage address discharge in an address period.

Recently, flat display devices such as liquid crystal displays (LCDs), field emission displays (FEDs), and PDPs have been actively developed. Among these flat panel display devices, PDPs have advantages of higher luminance and luminous efficiency and wider viewing angles than other flat panel display devices. Therefore, the PDP is in the spotlight as a display device to replace the conventional cathode ray tube (CRT) in a large display device of 40 inches or more.

PDPs are flat display devices that display characters or images using plasma generated by gas discharge, and dozens to millions or more of pixels are arranged in a matrix according to their size. Such PDPs are classified into a direct current type (DC type) and an alternating current type (AC type) according to the shape of the driving voltage waveform applied and the structure of the discharge cell.

In the DC-type PDP, since the electrode is exposed to the discharge space as it is, the current flows in the discharge space while voltage is applied, and there is a disadvantage in that a resistance for current limitation must be made for this purpose. On the other hand, in the AC type PDP, the electrode covers the dielectric layer, so that the current is limited by the formation of a natural capacitance component, and the life is longer than that of the DC type since the electrode is protected from the impact of ions during discharge.

1 is a view showing an electrode arrangement of a typical plasma display panel.

As shown in Fig. 1, the PDP electrode has a matrix structure of m x n. Specifically, the address electrodes A1 to Am are arranged in the column direction and the n electrodes of the scanning electrodes Y1 to row in the row direction. Yn) and sustain electrodes X1 to Xn are arranged in a zigzag. The discharge cell 12 shown in Fig. 1B corresponds to the discharge cell 12 shown in Fig. 1A.

Among the driving methods of the PDP, an ADS (Address-Display Separation) driving method generally includes a reset (initialization) section, a scan (addressing) section, a sustain section, and an erase section.

The reset period is a period for initializing the state of each cell in order to perform an addressing operation smoothly on the cell, and the address period (or scan period, write period) is a cell that is turned on by selecting a cell that is turned on and a cell that is not turned on. This is a section in which wall charges are accumulated in the addressed cell). The sustain section is a section in which discharge for actually displaying an image is performed on the addressed cell, and the erasing section is a section in which the wall discharge of the cell is reduced to end the sustain discharge.

Usually, the reset period forms a large amount of positive charges on the address electrode and a large amount of negative charges on the scan electrode as the reset waveform is applied, thereby facilitating address discharge. A predetermined amount of voltage is applied to the electrode and combined with the wall voltage formed in the reset section to form a wall charge structure in which the address discharge and the sustain discharge in the sustain section can proceed.

2 is a view showing a driving method of a conventional plasma display panel.

As shown in FIG. 2, when the reset period ends to favor all the discharge cells in the address, a large amount of positive charges are formed in the address electrode A, and a large amount of negative charges are formed in the scan electrode Y. . In the next address period, a positive voltage Ve is applied to the address electrode A and a constant scan voltage Vsc is applied to the scan electrode Y to prevent cross talk between adjacent discharge cells. Then, a ground level voltage is applied to the discharge cells to be discharged to perform stable discharge with the address electrode A. FIG.

However, the conventional driving method of the address section adjusts the voltage for stable discharge using only the positive voltage Va applied to the address electrode A, thereby increasing the applied voltage Va of the address electrode A. Must be applied (typically 60 V to 75 V). In addition, in the situation where negative wall charges formed in the reset period are stored in the scan electrode Y, the ground voltage applied voltage is used in the address period, so that only the wall voltage formed in the reset period is used in the address period. . Such a situation has a disadvantageous problem in driving a high speed address of the plasma display panel.

In order to solve the above problems, a technical object of the present invention is to provide a driving device and a driving method of a plasma display panel that can perform an address operation even at a low voltage address operating voltage.

In addition, another purpose is to reduce the manufacturing cost of the driving device by reducing the breakdown voltage of the driving device due to the low address operating voltage.

In addition, another object is to enable high-speed address driving with a low address operating voltage.

1 is a view showing an electrode arrangement of a typical plasma display panel.

2 is a view showing a driving method of a conventional plasma display panel.

3 is a block diagram illustrating an apparatus for driving a plasma display panel according to an exemplary embodiment of the present invention.

4 is a circuit diagram illustrating in detail a scan electrode driver according to an exemplary embodiment of the present invention.

5 is a waveform diagram illustrating a method of driving a plasma display panel performing low voltage address discharge according to an exemplary embodiment of the present invention.

In order to achieve the above object, a driving apparatus of a plasma display panel performing low voltage address discharge according to an aspect of the present invention is provided.

A driving device of a plasma display panel comprising a plurality of address electrodes and a plurality of scan electrodes and sustain electrodes paired with each other and arranged in a zigzag pair, wherein a panel capacitor is formed between the scan electrodes and the sustain electrodes.

An address electrode driver for processing an address signal and applying the same to one or more of the address electrode lines;

A scan / maintenance driver configured to sequentially scan one or more of the scan electrodes, generate scan pulses and sustain pulses, and apply the scan pulses and sustain pulses to the scan electrodes and the sustain electrodes to form wall charges;

The scan / maintenance driver is characterized in that a high level applies a ground voltage and a low level applies a first negative scan voltage to the scan electrode while an address or a scan is being performed.

According to another aspect of the present invention, there is provided a driving apparatus of a plasma display panel for performing low voltage address discharge.

A panel including a plurality of address electrodes and a plurality of scan electrodes and sustain electrodes crossing the address electrodes and arranged in a zigzag pair with each other, wherein a panel capacitor is formed between the scan electrodes and the sustain electrodes;

A control unit for receiving an image signal from the outside and generating an address driving control signal and a sustain discharge signal;

An address driver which receives the address drive control signal from the controller and applies a display data signal to the address electrode to select a discharge cell to be displayed;

A scan / maintenance driving unit configured to receive a sustain discharge signal from the controller and perform sustain discharge for a selected discharge cell by alternately inputting a sustain discharge voltage to a scan electrode and a sustain electrode,

The scan and sustain driver applies a ground voltage to the scan electrode and a negative first scan voltage to the scan electrode while an address or scan is performed, and the address driver applies the negative voltage during the address period. It is characterized by addressing the positive first address voltage of a low voltage while being applied to the scan electrode with the magnitude of one scan voltage.

According to another aspect of the present invention, there is provided a method of driving a plasma display panel for performing low voltage address discharge.

A driving method of a driving apparatus of a plasma display panel comprising a plurality of address electrodes and a plurality of scan electrodes and sustain electrodes paired with each other and arranged in a zigzag pattern, wherein a panel capacitor is formed between the scan electrodes and the sustain electrodes.

A reset step of initializing a charge distribution state of a discharge cell formed by the address electrode, scan electrode, and sustain electrode;

An address step of determining and addressing the discharge cells on and off; And

A sustain discharge step of sustain discharge of the addressed discharge cells;

The addressing step may include applying a high level ground voltage to the scan electrode and a low first negative scan voltage; And

Addressing the positive first address voltage of a low voltage while being applied to the scan electrode with a magnitude of the negative first scan voltage.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a block diagram illustrating an apparatus for driving a plasma display panel according to an exemplary embodiment of the present invention.

As shown in FIG. 3, the apparatus for driving a plasma display panel according to an exemplary embodiment of the present invention includes a plasma panel 100, an address driver 200, a scan / hold driver 300, and a controller 400.

The plasma panel 100 includes a plurality of address electrodes A1 to Am arranged in the column direction, a plurality of scan electrodes X1 to Xn arranged in the row direction, and sustain electrodes Y1 to Yn. .

The address driver 200 receives an address drive control signal from the controller 200 and applies a display data signal for selecting a discharge cell to be displayed to each address electrode.

The scan / hold driver 300 receives a sustain discharge signal from the controller 200 and alternately inputs a sustain pulse voltage to the scan electrode and the sustain electrode to perform sustain discharge on the selected discharge cell.

The controller 400 receives an image signal from an external source, generates an address driving control signal and a sustain discharge signal, and applies the same to the address driver 200 and the scan and sustain driver 300, respectively.

4 is a circuit diagram illustrating in detail a scan electrode driver according to an exemplary embodiment of the present invention.

As shown in FIG. 4, the scan electrode driver 310 supplies the current (or power) recovered to the panel capacitor Cp or the charge / discharge unit 311 to recover current (or power) from the panel capacitor Cp. ; An inductor L1 connected to the charge / discharge unit 311 to generate a discharge current induced according to the flow of current; A discharge holding unit 312 connected to the inductor L1 to maintain one end voltage of the panel capacitor Cp at a sustain discharge voltage Vs or a ground level voltage; A reset voltage providing unit 313 providing a voltage applied to the panel capacitor Cp in the reset period; The scan driver 314 provides a sustain discharge voltage to the panel capacitor Cp in an alternating switching operation.

The charge / discharge unit 311 is continuously connected in series to switch diodes D1 and D2 for determining a current path, and a switch for raising the voltage at one end of the panel capacitor Cp from the ground level voltage to the sustain discharge voltage Vs. (Yr), a switch (Yf) for dropping one end voltage of the panel capacitor (Cp) from the sustain discharge voltage (Vs) to the ground level voltage, and an external capacitor (C1), and include the switch (Yr) and the switch ( The diodes D1 and D2 are connected in series between Yf, the common connection point of the switch Yr and the other end of the switch Yf is connected to the external capacitor C1, and the common connection point of the diodes D1 and D2 is the inductor. It is connected to one end of (L1).

The discharge sustaining unit 312 is connected to the sustain discharge voltage Vs supply source to maintain the one end voltage of the panel capacitor Cp as the sustain discharge voltage, and is connected to the ground terminal to And a switch Yg for keeping one end voltage at a ground level voltage, and a common connection point of the switches Ys and Yg is connected to the other end of the inductor L1.

The reset voltage providing unit 313 includes a switch Yrr for applying a ramp pulse rising by connecting the reset voltage Vset supply source and one end thereof, and a ramp that is connected with the other end and one end of the switch Yrr to descend. A switch Yfr for applying a pulse, and a switch Ysp for separating a path of a current (or power) provided to the panel capacitor Cp and a path of a current (or power) recovered during the sustain discharge. The method further includes a capacitor C2 charged with the diode D3 connected to the reset voltage supply source and a reset voltage and providing the reset voltage to the panel capacitor Cp by a switching operation.

The scan driver 314 alternately provides a scan IC 314-1 having a switch Ysch and a switch Yscl that provide a sustain discharge voltage to the panel capacitor Cp, and a diode connected to the scan IC 314-1. And a switch Ysc connected to the diode D4 to switch to supply a negative scan voltage. Each switch of the scan IC 314-1 may be a switch included in and operated by the scan driver 314, but the present invention is not limited to the embodiment.

Hereinafter, a driving method of a plasma display panel performing low voltage address discharge according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

5 is a waveform diagram illustrating a method of driving a plasma display panel performing low voltage address discharge according to an exemplary embodiment of the present invention.

One frame is composed of a plurality of subfields, and each subfield includes a reset section, an address (or scan) section, and a sustain section. As described above, the present invention may be applied in addition to the case of having a subfield structure of a frame, and the present invention is not limited to the embodiment.

The reset section smoothly performs the write operation in the address section by forming wall charges with the appropriate polarity and the amount of the address electrode A, the scan (or scan) electrode Y, and the sustain (or common) electrode X, respectively. This is the section to adjust the wall charge distribution so that it can be done. That is, the wall charge state of each electrode is a section in which the charge state of the discharge cell is adjusted so that write discharge in the address section can be performed.

The reset operation in the case where the reset section is performed immediately after the sustain discharge in one subfield is completed, is gradually raised to the sustain electrode X when the sustain electrode driver 320 ends the sustain discharge in the previous subfield. The ramp pulse is applied to increase the sustain discharge voltage Vs. At this time, in the discharge cell that caused the sustain discharge, the inter-surface voltage on the scan electrode Y and the sustain electrode X is negative wall charge and sustain electrode X on the scan electrode Y appearing at the end of the sustain period. The lamp voltage is added to the positive wall charge of the phase.

The pulse waveform applied to the scan electrode Y holds all address electrodes A and all sustain electrodes X at 0V in the first half thereof. When the switch Yr is turned on and the current recovered by the external capacitor C1 is transferred to the panel capacitor Cp through the diode D1 and the inductor L1, the scan electrode Y gradually rises. At this time, when the switch Ys is turned on, the scan electrode Y maintains the sustain discharge voltage Vs.

Next, when the switch Yrr for applying the lamp pulse is turned on, all the scan electrodes Y have a ramp voltage that rises slowly from the voltage below the discharge start voltage to the sustain electrode X toward the voltage above the discharge start voltage. It is applied to the panel capacitor Cp. While the ramp voltage rises, the first weak reset discharge occurs from the scan electrode Y to the address electrode A and the sustain electrode X in all the discharge cells. As a result, negative wall charges are accumulated on the surface of the protective film on the scan electrode Y. At the same time, positive wall charges are accumulated on the insulator surface on the address electrode A and the protective film surface on the sustain electrode X.

In the second half of the reset period, the sustain electrode driver 320 maintains all of the sustain electrodes X at the constant voltage Ve1. When the scan electrode driver 310 turns off the switch Yrr and turns on the switch Yfr, the scan electrode driver 310 gently drops from the voltage below the discharge start voltage to the sustain electrode on all the scan electrodes Y from 0 V above the discharge start voltage. The ramp voltage is applied to the panel capacitor Cp. While this ramp voltage falls, the second weak reset discharge occurs from the sustain electrode X to the scan electrode Y again in all the discharge cells. As a result, the negative wall voltage of the protective film surface on the scan electrode Y and the positive wall voltage of the protective film surface on the sustain electrode X are weakened. Further, weak discharge occurs between the address A electrode and the scan electrode Y, and the positive wall voltage on the surface of the insulator layer on the address electrode A is adjusted to a value suitable for the write operation. At this time, when the switch Yg is turned on, the scan electrode Y maintains the ground level voltage. When the reset operation of the reset section is completed, the address section is subsequently performed.

In the address period, a large amount of positive charges are accumulated on the address electrode A and a large amount of negative charges are applied to the scan electrode Y by turning on the switches Yg and Ysch. Will accumulate.

Subsequently, when performing the address on the discharge cells representing the gray scale, when the positive voltage Va is applied to the address electrode A, and the switch Yscl and the switch Ysc are turned on, the scan electrode Y is turned high. The level is applied to the ground level voltage GND and the low level is applied to the negative scan voltage -Vsc. At this time, when a negative scan voltage (-Vsc) is applied to the potential of the scan electrode Y which has already accumulated a large amount of negative charge, the positive electrode has a smaller amount of positive voltage than the conventional one. This is because address discharge can be performed even if (Va) is applied.

In this way, the magnitude of the positive voltage Va applied to the address electrode A can be reduced in proportion to the magnitude of the negative scan voltage -Vsc applied to the low level of the discharge cell scanning during the address period of the scan electrode. have. As such, by reducing the magnitude of the positive voltage Va applied to the address electrode A, the breakdown voltage of the scan IC performing the scan operation during the address period can be reduced, and the address electrode A can be used for a high speed address. There is an advantage in that the address difference can be addressed with a large potential difference between and the scan electrode Y.

In the address period, the sustain electrode driver 320 supplies the constant voltage Ve1 lower than the sustain discharge voltage Vs to the sustain electrode X. Biasing of the sustain electrode X attracts negative charges (electrons) generated by the address discharge onto the sustain electrode X, thereby helping to facilitate the discharge in the next pulse of the sustain discharge interval. Do it. That is, due to the discharge between the address electrode A and the scan electrode Y, the positive wall charges going to the scan electrode Y and the negative charges (electrons) going to the address electrode A are biased by the sustain electrode X. By attracting a large amount of), sustain discharge pulses on the scanning electrode Y side are likely to occur.

When the address period ends and the sustain period starts, the user discharge voltage Vs alternated between the scan electrode Y and the sustain electrode X is changed by a switching operation according to the sequence of the switches Yr, Yf, Ys, and Yg. It is applied to the scan electrode Y, whereby the gray scale is expressed in the discharge cell. The description of the sustain discharge operation in the sustain section is omitted.

The embodiment of the present invention is only one embodiment, and many variations and modifications may be made to the device configuration of the driving circuit without departing from the gist of the present invention, and the present invention is not limited to the embodiment. .

As described above, the driving apparatus and the driving method of the plasma display panel which performs the low voltage address discharge of the present invention can perform the address operation even with the address operation voltage of the low voltage, thereby reducing the breakdown voltage of the driving element, thereby driving device It is possible to lower the manufacturing cost of the device and to enable high-speed address driving.

Claims (10)

In the driving apparatus of the plasma display panel comprising a plurality of address electrodes, a plurality of scan electrodes and sustain electrodes paired with each other and arranged in a zigzag pair, wherein a panel capacitor is formed between the scan electrodes and the sustain electrodes, An address electrode driver for processing an address signal and applying the same to one or more of the address electrode lines; A scan / maintenance driver configured to sequentially scan one or more of the scan electrodes, generate scan pulses and sustain pulses, and apply the scan pulses and sustain pulses to the scan electrodes and the sustain electrodes to form wall charges; The scan / maintenance driver performs a low voltage address discharge, wherein a high level applies a ground voltage and a low level applies a first scan voltage to the scan electrode while an address or a scan is being performed. The drive unit of the panel. The method of claim 1, wherein the address driver And a low voltage positive first address voltage while being applied to the scan electrode with a magnitude of the negative first scan voltage during an address period. The said driving and holding drive part of Claim 1 characterized by the above-mentioned. And applying a ramp voltage rising to the sustain electrode during the reset period and maintaining the sustain discharge voltage until the reset period ends. The said driving and holding drive part of Claim 1 characterized by the above-mentioned. And a constant voltage lower than a sustain discharge voltage is applied to the sustain electrode during the address period. A panel including a plurality of address electrodes and a plurality of scan electrodes and sustain electrodes crossing the address electrodes and arranged in a zigzag pair with each other, wherein a panel capacitor is formed between the scan electrodes and the sustain electrodes; A control unit for receiving an image signal from the outside and generating an address driving control signal and a sustain discharge signal; An address driver which receives the address drive control signal from the controller and applies a display data signal to the address electrode to select a discharge cell to be displayed; A scan / maintenance driving unit configured to receive a sustain discharge signal from the controller and perform sustain discharge for a selected discharge cell by alternately inputting a sustain discharge voltage to a scan electrode and a sustain electrode, The scan and sustain driver applies a ground voltage to the scan electrode and a negative first scan voltage to the scan electrode while an address or scan is performed, and the address driver applies the negative voltage during the address period. A low voltage address discharge driving apparatus for performing a low voltage address discharge, characterized in that the address is applied to the scan electrode with a magnitude of one scan voltage, the first address voltage being a positive voltage. The scanning and holding drive unit according to claim 5, wherein And applying a ramp voltage rising to the sustain electrode during the reset period and maintaining the sustain discharge voltage until the reset period ends. The scanning and holding drive unit according to claim 5, wherein And a constant voltage lower than a sustain discharge voltage is applied to the sustain electrode during the address period. In the driving method of the driving device of the plasma display panel comprising a plurality of address electrodes, a plurality of scan electrodes and sustain electrodes arranged in pairs in a zigzag pair, wherein a panel capacitor is formed between the scan electrodes and the sustain electrodes, A reset step of initializing a charge distribution state of a discharge cell formed by the address electrode, scan electrode, and sustain electrode; An address step of determining and addressing the discharge cells on and off; And A sustain discharge step of sustain discharge of the addressed discharge cells; The addressing step may include applying a high level ground voltage to the scan electrode and a low first negative scan voltage; And And applying a low first positive address voltage of a low voltage while being applied to the scan electrode with a magnitude of the negative first scan voltage. The method of claim 8, wherein the reset step And applying a rising ramp voltage to the sustain electrode and maintaining a sustain discharge voltage until the reset period is terminated. The method of claim 8, wherein the address step is And applying a constant voltage lower than the sustain discharge voltage to the sustain electrode.