KR20030026551A - A memory module having the function of compensating output driving circuits of memory chips - Google Patents

Abstract

PURPOSE: A memory module having function of correcting output a driving circuit of a memory chip is provided, which are capable of controlling a drive property of an output driving circuit by including control circuits for adjusting the drive property in a module. CONSTITUTION: An output driving circuit outputs data in response to a control signal. Each of a plurality of memory chips(32-1-32-4) has an output voltage detecting and controlling circuit(22) that compares a voltage from a control node(N2) with a reference voltage and adjusts a drive property of the output driving circuit. A reference load(24) maintains a voltage of the control node which is changed according to a voltage level of data output from the output driving circuit. The reference load is embedded in a different function block from the memory chips in a memory module(30).

Description

Memory module with correction function of output driving circuit of memory chip {A MEMORY MODULE HAVING THE FUNCTION OF COMPENSATING OUTPUT DRIVING CIRCUITS OF MEMORY CHIPS}

The present invention relates to a memory module, and more particularly, to a memory module having a function of controlling an output driving circuit in a memory chip.

Recent computers and accompanying memory control systems have been sought for high speed and low power. The input / output transmission speed of data is getting faster and the operating voltage is getting lower. This increase in memory operating speed and decrease in operating voltage lead to an increase in high frequency noise and a decrease in signal amplitude, which greatly reduces the margin of the entire system, thereby imposing stricter constraints on the parts of the system. It became.

For example, in the case of a memory control system, it is necessary to minimize fluctuations in various parameters constituting the bus such as impedance and length of a memory bus channel line to satisfy system configuration requirements for high speed and low voltage operation. In this regard, since the output driving circuit which directly drives the bus channel in the memory chip has a direct influence on determining the signal characteristics on the channel, its characteristics must be strictly managed to the level required by the system. Therefore, in the high-speed memory control system, in order to satisfy the signal transmission characteristic of the channel, in most cases, it is required to maintain the driving characteristics such as the driving strength, the driving resistance, and the slew rate of the output driving circuit within a predetermined specification. to be.

However, due to the characteristics of the integrated circuit, the characteristics of the output driving circuit in the memory chip are changed by the process, and even in the same memory chip, the characteristics of the driving circuit are changed by the change of transistor characteristics by the ambient environment such as the driving voltage and temperature of the circuit in the system. Continues to change. Therefore, there is a limit to satisfying the characteristics of the memory chip driving circuit within a certain range by a design method only under conditions where all processes and operating environments change. Recently, a method of obtaining desired operating characteristics by finely adjusting the characteristics of the driving circuit using a correction circuit for correcting the driving circuit in the memory chip in a high speed memory control system has been widely used.

Generally, the drive circuit correction detects an output signal that appears when the reference load for correction is connected to the output of the drive circuit, compares this signal with a preset reference value, and then adjusts the drive characteristics of the output drive circuit accordingly as a result. The method is being used. In a conventional memory control system, generally, a signal driven from a memory chip is detected in a memory control chip set, and a correction command for correcting driving characteristics of an output driving circuit of the corresponding memory chip is sent when the signal is driven from the memory chip. In response to this, the driving circuit characteristics are adjusted.

SUMMARY OF THE INVENTION An object of the present invention is to provide a memory module capable of accurately controlling the driving characteristics of an output driving circuit by including control circuits in the module for adjusting the driving characteristics of the output driving circuit in the memory chip.

One embodiment of the memory module of the present invention for achieving the above object is to adjust the drive characteristics of the output drive circuit by comparing the output voltage and the reference voltage from the output node and the control node for outputting data in response to the control signal And a plurality of memory chips each having an output voltage detection and control circuit, and a reference load for maintaining a voltage of the control node that is changed according to a voltage level of data output from the output driving circuit. .

Another aspect of the memory module of the present invention for achieving the above object is a plurality of memory chips each having an output drive circuit for outputting data in response to a control signal, by comparing the voltage from the control node and the reference voltage An output voltage detection and control circuit for adjusting the driving characteristics of the output driving circuit, and a reference load for maintaining the voltage of the control node which is changed in accordance with the voltage level of data output from the output driving circuit. do.

1 is a block diagram illustrating a simplified process of correcting an output driving circuit of a general memory chip.

2 is a block diagram showing the configuration of a conventional memory module and a memory control circuit.

3 is a block diagram illustrating a memory module having an output driving circuit correction function of the memory chip according to an embodiment of the present invention.

4 is a block diagram illustrating a memory module having an output driving circuit correction function of a memory chip according to another exemplary embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

10, 32-1 to 32-4: memory chip 20: memory control circuit

24, 38: Reference load 34-1 ~ 34-4: Output drive circuit

22, 36-1 ~ 36-4: Output voltage detection and control circuit

30, 40, 60: memory module 50: function chip

Before describing the memory module according to the present invention with reference to the accompanying drawings will be described a conventional memory module and memory control system as follows.

FIG. 1 is a block diagram illustrating a simplified process of correcting an output driving circuit of a general memory chip. The memory chip 10 including the output driving circuit 12, the output voltage detection and control circuit 22, and the reference load 24 are illustrated in FIG. Memory control circuit 20 is provided.

In FIG. 1, the output driving circuit 12 generates output data DOUT in response to data DO generated inside the memory chip 10. The reference load 24 maintains the level of the node N1 according to the output data DOUT that is changed. The output voltage detection and control circuit 22 compares the level of the node N1 with a preset reference level to adjust the driving characteristics of the output driving circuit 12.

Fig. 2 is a block diagram showing the structure of a conventional memory module and a memory control circuit, and includes memory chips 32-1 to 32-4 each having output driving circuits 34-1 to 34-4. It is composed of a memory module 30, an output voltage detection and control circuit 22, and a memory control circuit 20 having a reference load 24.

The block diagram shown in FIG. 2 shows that while one memory chip is enabled to perform an operation, the remaining memory chips are disabled to not perform an operation. That is, the memory chips 32-1 to 32-4 share one reference load 24, adjust driving characteristics of an output driver with respect to one enabled memory chip, and disable other memory chips. It does not affect the driving characteristics for.

In Fig. 2, each of the output driving circuits 34-1 to 34-4 is in response to each of data DO1, DO2, DO3, DO4 generated from inside each of the memory chips 32-1 to 32-4. Generates output data (DOUT1 to DOUT4). The reference load 24 maintains the level of the node N2 according to the output data DOUT1 to DOUT4 that are changed. The output voltage detection and control circuit 22 compares the level of the node N2 with a preset reference level and generates a control signal CON for adjusting the driving characteristics of the output driving circuits 34-1 to 34-4. Occurs. At this time, as described above, the control signal CON is applied to the output driving circuits 34-1 to 34-4, but only driving characteristics of the output driving circuit in the enabled memory chip are adjusted. The driving characteristics of the output driving circuits in the memory chips are not adjusted.

That is, in the conventional memory control system, the memory control circuit includes an output voltage detection and control circuit 22 and a reference load 24, and the memory chips in the memory module simply control signals from the memory control circuit 20 ( In response to CON), driving characteristics of the output driving circuits 34-1 to 34-4 are adjusted.

Therefore, in the memory control method of the conventional memory control system, since the process of controlling the memory chip output driving circuit is performed by the interaction between the memory chips in the memory module and the memory control circuit, the driving characteristic control procedure is somewhat complicated, and thus the control time is also reduced. There is a drawback to lengthening.

In addition, since the memory module and the memory control circuit are connected via a bus at a considerable distance, the signal output from the memory module of the memory control system is more likely to be exposed to various system noises on the path to the memory control circuit. There is a problem that a significant error may occur in the control accuracy of the output drive circuit.

Fig. 3 is a block diagram of an embodiment of a memory module according to the present invention, in which the memory chips 32-1 to 32-4 and the reference load 38 including the output driving circuits 34-1 to 34-4 are shown. It consists of the memory module 40 provided.

In the memory module shown in Fig. 3, output voltage detection and control circuits 36-1 to 36-4 and reference load 38 are provided in the memory module.

The function of each of the building blocks shown in FIG. 3 will now be described.

When the memory chip 32-1 is enabled and the memory chips 32-2 to 32-4 are disabled, the output driving circuit 34-1 outputs data DO1 as data DOUT1. The reference load 38 changes the voltage of the node N3 according to the change of the voltage level of the data DOUT1. The output voltage detection and control circuit 36-1 generates a control signal CON1 for controlling the driving characteristics of the output driving circuit 34-1 in response to the voltage of the node N3. Similarly, each of the memory chips 32-2 to 32-4 may output data DO2 to DO4 from each of the output driving circuits 34-2 to 34-4 when the corresponding memory chip is enabled. Respectively, and the output voltage detection and control circuits 36-2 to 36-4 each drive characteristics of the output driving circuits 34-2 to 34-4 in response to the voltage of the node N3. Each of the control signals CON2 to CON4 is generated.

That is, in the memory module illustrated in FIG. 3, a signal of the node N3 is stored in order to adjust driving characteristics of the output driving circuits 34-1 to 34-4 of each of the memory chips 32-1 to 32-4. It does not need to be sent to the control circuit. Therefore, the possibility of being exposed to system noise is reduced by not having to go through the long signal line from the memory module 40 to the memory control circuit, thereby output driving circuits 34- 34 in the memory chips 32-1 to 32-4. 1 ~ 34-4) can accurately adjust the driving characteristics.

The memory module of the present invention can adjust driving characteristics of an output driving circuit of a memory chip by providing a reference load and an output voltage detection and control circuit in the module.

Fig. 4 is a block diagram of another embodiment of a memory module according to the present invention, in which memory chips 32-1 to 32-4 and output loads having output driving circuits 34-1 to 34-4 and reference load 38 are shown. It consists of a memory module 60 having a function block 50 having a.

The block shown in FIG. 4 is also the same in that the reference load 38 is provided in the memory module 60 similarly to the block diagram shown in FIG. 3, but the memory chips 32-1 are not separately present. 32-4) is different from the block diagram shown in FIG.

Since the functions of the respective building blocks shown in FIG. 4 are the same as those of the building blocks shown in FIG. 3, they will be omitted here.

That is, the memory module shown in FIG. 4 also adjusts the driving characteristics of the output driving circuits 34-1 to 34-4 of each of the memory chips 32-1 to 32-4, similarly to the memory module shown in FIG. Since the signal of the node N3 does not need to be transmitted to the memory control circuit, it is not exposed to system noise. Therefore, the driving characteristics of the output driving circuits 34-1 to 34-4 in the memory chips 32-1 to 32-4 can be accurately adjusted.

In the memory module of the present invention described above, the output voltage detection and control circuit is embedded in each of the memory chips as an example, but the output voltage detection and control circuit may be separately configured as a reference load.

Although described above with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.

Accordingly, the memory module of the present invention can accurately correct the driving characteristics of the output driving circuit without being affected by system noise due to the reference load and the output voltage detecting circuit for correcting the driving characteristics of the output driving circuit. have.

Claims (4)

An output driving circuit for outputting data in response to a control signal; And A plurality of memory chips each having an output voltage detection and control circuit for adjusting a driving characteristic of the output driving circuit by comparing a voltage from a control node with a reference voltage; And And a reference load for maintaining a voltage of the control node that is changed according to a voltage level of data output from the output driving circuit. The method of claim 1, wherein the reference load is And the plurality of memory chips in the memory module are embedded in other functional blocks. A plurality of memory chips each having an output driving circuit for outputting data in response to a control signal; An output voltage detection and control circuit for adjusting driving characteristics of the output driving circuit by comparing a voltage from a control node with a reference voltage; And And a reference load for maintaining the voltage of the control node that changes according to the voltage level of the data output from the output driving circuit. The method of claim 3, wherein the reference load is And the plurality of memory chips in the memory module are embedded in other functional blocks.