KR20030020496A - A Serial Multiplier over the Subfields GF(2^8) of Galois field GF(2^4) - Google Patents

A Serial Multiplier over the Subfields GF(2^8) of Galois field GF(2^4) Download PDF

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Publication number
KR20030020496A
KR20030020496A KR1020010052461A KR20010052461A KR20030020496A KR 20030020496 A KR20030020496 A KR 20030020496A KR 1020010052461 A KR1020010052461 A KR 1020010052461A KR 20010052461 A KR20010052461 A KR 20010052461A KR 20030020496 A KR20030020496 A KR 20030020496A
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South Korea
Prior art keywords
serial
multiplier
subfields
serial multiplier
galois field
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KR1020010052461A
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Korean (ko)
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강경식
조용석
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강경식
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Priority to KR1020010052461A priority Critical patent/KR20030020496A/en
Publication of KR20030020496A publication Critical patent/KR20030020496A/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/724—Finite field arithmetic
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7209—Calculation via subfield, i.e. the subfield being GF(q) with q a prime power, e.g. GF ((2**m)**n) via GF(2**m)

Abstract

PURPOSE: A design for a GF(2¬8) serial multiplier using a GF(2¬4) infinite field is provided to reduce delay time to get result, and to realize the serial multiplier with hardwares less than a parallel multiplier by designing the serial multiplier of the GF(2¬8) finite field with the use of a serial operator on a subfield. CONSTITUTION: In case that an order of the GF(2¬m) is consisted of the multiplication of two numbers larger than one, the GF(2¬m) has the subfields of GF(2¬u) and GF(2¬v). The serial multiplier on the GF(2¬m) finite field is realized by using the serial operators on the subfields. Thus, the serial multiplier is realized by 16 2-input AND gates and 15 2-input XOR gates.

Description

유한체 지에프(2에 4승)를 이용한 지에프(2에 8승)의 직렬 곱셈기 설계{A Serial Multiplier over the Subfields GF(2^8) of Galois field GF(2^4)}A Serial Multiplier over the Subfields GF (2 ^ 8) of Galois field GF (2 ^ 4)} using Finite Field GF

유한체상의 곱셈기는 조합회로를 사용한 병렬 곱셈기와 순서회로를 사용한 직렬 곱셈기로 구현할 수 있다. 병렬 곱셈기는 연산속도는 빠른 반면에 회로가 복잡해지며, 직렬 곱셈기는 회로는 간단하지만클럭 시간의 지연이 불가피해진다.Finite body The phase multiplier can be implemented as a parallel multiplier using a combination circuit and a serial multiplier using a sequential circuit. Parallel multipliers get faster computations and complicated circuits, while serial multipliers are simpler The delay of the clock time becomes inevitable.

본 발명은 종래 기술들이 가지고 있는 문제점을 해결할 수 있는 한가지 방법으로, 부분체를 이용한 직렬 곱셈기를 제안한다. 유한체의 위수이 1보다 큰 임의의 두 자연수의 곱으로 이루어진 경우, 유한체은와를 부분체로 갖는다. 본 방법은 이러한 부분체 상의 병렬 연산기들을 이용하여 유한체상의 직렬 곱셈기를 구현하는 것이다.The present invention proposes a serial multiplier using a partial as a way to solve the problems of the prior art. Finite body Water Is a product of two natural numbers greater than one , Finite body silver Wow Has as part of The method uses finite fields using parallel operators on these subfields. Implements a serial multiplier.

도1은상의 임의의 한 원소에를 곱하는 회로Figure 1 Any one element on Multiply by

도2는상의 임의의 한 원소에를 곱하는 회로2 is Any one element on Multiply by

도3는 부분체를 이용한의 곱셈기 회로3 is a partial body Using Multiplier circuit

유한체의 임의의 한 원소 A를 그것의 부분체인을 이용하여 표현하면 다음과 같다.Finite body Any one element of A is part of it When expressed using

식 1 Equation 1

먼저상의 임의의 한 원소에를 곱하는 회로를 구성하기 위하여, 식1에를 곱하고 식을 이용하여 정리하면 다음과 같이 된다.first Any one element on To construct a circuit that multiplies by Multiply by the expression To sum up using

식 2 Equation 2

따라서 식 2 를 이용하면 도 1과 같은를 곱하는 회로를 구성할 수 있다.Therefore, using Equation 2, You can construct a circuit that multiplies by.

도 1에서는 4비트 레지스터이며,는상의 병렬 덧셈기이다.는 유한체상의 임의의 한 원소에상의 원시원를 곱하는 회로이다.이므로, 유한체상의 임의의 한 원소 A에를 곱하여 정리하면 다음과 같이 된다.In Figure 1 Is a 4-bit register, Is Parallel adder. Is a finite body Any one element on Source on Pinterest Is a circuit to multiply by. Since, finite field Any one element of A on Pinterest Multiply by to get

식 3 Expression 3

식 3을 조합회로로 구현하면 도 2와 같이 되며, 이것은 2입력 XOR 게이트 1개로 구현할 수 있다.Equation 3 can be implemented as a combination circuit as shown in FIG. 2, which can be implemented with one 2-input XOR gate.

도 1과 도 2를 이용하면 도 3과 같은상의 곱셈기를 구성할 수 있다.1 and 2 as shown in FIG. Phase multiplier can be configured.

도 3에서는 4비트 레지스터이고,는상의 병렬 덧셈기로 2입력 XOR 4개로 구현할 수 있다. 또는상의 병렬 곱셈기이다.상의 병렬 곱셈기는 일반적으로 2입력 AND 게이트 16개와 2입력 XOR 게이트 15개로 구현할 수 있다. 따라서 도 3과 같은상의 곱셈기의 회로 규모는 표 1과 같이 정리할 수 있다.In Figure 3 Is a 4-bit register, Is It can be implemented with four 2-input XOR with parallel add on top. In addition Is Parallel multiplier. The phase multiplier can be implemented with 16 2-input AND gates and 15 2-input XOR gates. Therefore, as shown in FIG. The circuit scale of the phase multiplier can be summarized as shown in Table 1.

<표 1. 도 3과 같은 직렬 곱셈기의 회로 규모>Table 1. Circuit scale of the serial multiplier as shown in FIG.

상의 병렬 곱셈기 Multipliers on top AND : 16 × 2 = 32XOR : 15 × 2 = 30AND: 16 × 2 = 32XOR: 15 × 2 = 30 상의 병렬 덧셈기 Parallel adder on Pinterest XOR : 4 × 3 = 12XOR: 4 × 3 = 12 곱셈기 Multiplier XOR : 1 × 2 = 2XOR: 1 × 2 = 2 합 계Sum AND = 32XOR = 44AND = 32 XOR = 44

Claims (2)

상의 임의의 한 원소에를 곱하는 회로도 Any one element on Multiplied by 부분체를 이용한의 곱셈기 회로도Subfield Using Multiplier schematic
KR1020010052461A 2001-08-29 2001-08-29 A Serial Multiplier over the Subfields GF(2^8) of Galois field GF(2^4) KR20030020496A (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4251875A (en) * 1979-02-12 1981-02-17 Sperry Corporation Sequential Galois multiplication in GF(2n) with GF(2m) Galois multiplication gates
US4847801A (en) * 1987-10-26 1989-07-11 Cyclotomics, Inc. Compact galois field multiplier
KR920019108A (en) * 1991-03-20 1992-10-22 김광호 Calculation method and device on GF (2 ^ m) using partial GF (2 ^ m / 2)
US5689452A (en) * 1994-10-31 1997-11-18 University Of New Mexico Method and apparatus for performing arithmetic in large galois field GF(2n)
US5771184A (en) * 1995-10-12 1998-06-23 Adaptec, Inc. System and method for solving quadratic equation in galois fields
US6141786A (en) * 1998-06-04 2000-10-31 Intenational Business Machines Corporation Method and apparatus for performing arithmetic operations on Galois fields and their extensions

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4251875A (en) * 1979-02-12 1981-02-17 Sperry Corporation Sequential Galois multiplication in GF(2n) with GF(2m) Galois multiplication gates
US4847801A (en) * 1987-10-26 1989-07-11 Cyclotomics, Inc. Compact galois field multiplier
KR920019108A (en) * 1991-03-20 1992-10-22 김광호 Calculation method and device on GF (2 ^ m) using partial GF (2 ^ m / 2)
US5689452A (en) * 1994-10-31 1997-11-18 University Of New Mexico Method and apparatus for performing arithmetic in large galois field GF(2n)
US5771184A (en) * 1995-10-12 1998-06-23 Adaptec, Inc. System and method for solving quadratic equation in galois fields
US6141786A (en) * 1998-06-04 2000-10-31 Intenational Business Machines Corporation Method and apparatus for performing arithmetic operations on Galois fields and their extensions

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