KR20030020492A - A Serial Multiplier over the Subfields GF(2^8) of Galois field GF(2^2) - Google Patents

A Serial Multiplier over the Subfields GF(2^8) of Galois field GF(2^2) Download PDF

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Publication number
KR20030020492A
KR20030020492A KR1020010052453A KR20010052453A KR20030020492A KR 20030020492 A KR20030020492 A KR 20030020492A KR 1020010052453 A KR1020010052453 A KR 1020010052453A KR 20010052453 A KR20010052453 A KR 20010052453A KR 20030020492 A KR20030020492 A KR 20030020492A
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South Korea
Prior art keywords
serial
multiplier
subfields
serial multiplier
galois field
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KR1020010052453A
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Korean (ko)
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강경식
조용석
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강경식
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Priority to KR1020010052453A priority Critical patent/KR20030020492A/en
Publication of KR20030020492A publication Critical patent/KR20030020492A/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/724—Finite field arithmetic
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7209—Calculation via subfield, i.e. the subfield being GF(q) with q a prime power, e.g. GF ((2**m)**n) via GF(2**m)

Abstract

PURPOSE: A design for a GF(2¬8) serial multiplier using a GF(2¬2) infinite field is provided to decrease delay, and to realize the serial multiplier with hardwares less than a parallel multiplier by designing the serial multiplier of the GF(2¬8) finite field with the use of serial operators on a subfield. CONSTITUTION: In case that an order of the GF(2¬m) is consisted of the multiplication of two numbers larger than one, the GF(2¬m) has the subfields of GF(2¬u) and GF(2¬v). The serial multiplier on the GF(2¬m) finite field is realized by using the serial operators on the subfields. Thus, the serial multiplier is realized by three 8-bit registers, sixteen 2-input AND gates and 27 2-input XOR gates, and the result is obtained by four-clock time.

Description

유한체 지에프(2에 2승)를 이용한 지에프(2에 8승)의 직렬 곱셈기 설계{A Serial Multiplier over the Subfields GF(2^8) of Galois field GF(2^2)}A Serial Multiplier over the Subfields GF (2 ^ 8) of Galois field GF (2 ^ 2)} Using Finite Field GF (2 to 2)

유한체상의 곱셈기는 조합회로를 사용한 병렬 곱셈기와 순서회로를 사용한 직렬 곱셈기로 구현할 수 있다. 병렬 곱셈기는 연산속도는 빠른 반면에 회로가 복잡해지며, 직렬 곱셈기는 회로는 간단하지만클럭 시간의 지연이 불가피해진다.Finite body The phase multiplier can be implemented as a parallel multiplier using a combination circuit and a serial multiplier using a sequential circuit. Parallel multipliers get faster computations and complicated circuits, while serial multipliers are simpler The delay of the clock time becomes inevitable.

본 발명은 종래 기술들이 가지고 있는 문제점을 해결할 수 있는 한가지 방법으로, 부분체를 이용한 직렬 곱셈기를 제안한다. 유한체의 위수이 1보다 큰 임의의 두 자연수의 곱으로 이루어진 경우, 유한체은와를 부분체로 갖는다. 본 방법은 이러한 부분체 상의 병렬 연산기들을 이용하여 유한체상의 직렬 곱셈기를 구현하는 것이다.The present invention proposes a serial multiplier using a partial as a way to solve the problems of the prior art. Finite body Water Is a product of two natural numbers greater than one , Finite body silver Wow Has as part of The method uses finite fields using parallel operators on these subfields. Implements a serial multiplier.

도1은상의 임의의 한 원소에를 곱하는 회로Figure 1 Any one element on Multiply by

도2는 부분체를 이용한상의 직렬 곱셈기 회로2 is a partial body Using Series multiplier circuit

유한체의 임의의 한 원소 A를 부분체를 이용하여 표현하면 다음과 같이 쓸 수 있다.Finite body Substitute any one element A of When expressed using, we can write

식 1 Equation 1

여기에의 원시원를 곱하고 식 1을 이용하여 정리하면 다음과 같이 된다.Here Primitive Multiply by and sum up using Equation 1.

식 2 Equation 2

그러므로 식 2를 이용하면 도 1과 같이의 임의의 한 원소 A에 원시원를 곱하는 회로를 설계할 수 있다. 도 1에서 모든 선은 2비트 버스이고,는 2비트 레지스터를,는상의 병렬 덧셈기를,는의 원시원를 곱하는 회로를 나타내고 있다.Therefore, using Equation 2, as shown in Figure 1 Primitive circles on any one element A of You can design a circuit that multiplies by. In Figure 1 all lines are 2-bit buses, Is a 2-bit register, Is Parallel adder, Is Primitive The circuit to multiply is shown.

유한체의 임의의 한 원소 C에 원시원를 곱하고, 정리하면Finite body Prototypes to any one element of C Multiply by and sum up

식 3 Expression 3

가 된다. 따라서는 1개의 2입력 XOR로 구현할 수 있으며, 도 1을 이용하면 도 2와 같은 부분체를 이용한상의 직렬 곱셈기를 설계할 수 있다. 도 2에서은상의 병렬 곱셈기로 이것은 2입력 AND 게이트 4개와 2입력 XOR 게이트 3개로 구현할 수 있다.Becomes therefore Can be implemented as one two-input XOR, using FIG. Using It is possible to design a serial multiplier of phase. In Figure 2 silver With a parallel multiplier on the phase, this can be implemented with four 2-input AND gates and three 2-input XOR gates.

도 2와 같은 직렬 곱셈기는 8비트 레지스터 3개와, 표 1과 같이 2입력 AND 게이트 16개, 2입력 XOR 게이트 27개로 구현할 수 있으며 4클럭 시간만에 결과를 얻을 수 있다.The serial multiplier shown in FIG. 2 can be implemented with three 8-bit registers, 16 two-input AND gates and 27 two-input XOR gates as shown in Table 1, and the result can be obtained in four clock times.

<표 1. 도 2와 같은 직렬 곱셈기의 회로 규모>Table 1. Circuit scale of the serial multiplier as shown in FIG.

상의 병렬 곱셈기 Multipliers on top AND : 4 ×4 = 16XOR : 3 ×4 = 12AND: 4 × 4 = 16 XOR: 3 × 4 = 12 상의 병렬 덧셈기 Parallel adder on Pinterest XOR : 2 ×7 = 14XOR: 2 × 7 = 14 곱셈기 Multiplier XOR : 1 ×1 = 1XOR: 1 × 1 = 1 합 계Sum AND = 16XOR = 27AND = 16 XOR = 27

Claims (2)

상의 임의의 한 원소에를 곱하는 회로도 Any one element on Multiplied by 부분체를 이용한상의 직렬 곱셈기 회로도Subfield Using Series multiplier schematic
KR1020010052453A 2001-08-29 2001-08-29 A Serial Multiplier over the Subfields GF(2^8) of Galois field GF(2^2) KR20030020492A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100670780B1 (en) * 2004-10-29 2007-01-17 한국전자통신연구원 Apparatus for hybrid multiplier in GF2^m and Method for multiplying

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4251875A (en) * 1979-02-12 1981-02-17 Sperry Corporation Sequential Galois multiplication in GF(2n) with GF(2m) Galois multiplication gates
US4847801A (en) * 1987-10-26 1989-07-11 Cyclotomics, Inc. Compact galois field multiplier
KR920019108A (en) * 1991-03-20 1992-10-22 김광호 Calculation method and device on GF (2 ^ m) using partial GF (2 ^ m / 2)
US5689452A (en) * 1994-10-31 1997-11-18 University Of New Mexico Method and apparatus for performing arithmetic in large galois field GF(2n)
US5771184A (en) * 1995-10-12 1998-06-23 Adaptec, Inc. System and method for solving quadratic equation in galois fields
US6141786A (en) * 1998-06-04 2000-10-31 Intenational Business Machines Corporation Method and apparatus for performing arithmetic operations on Galois fields and their extensions

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4251875A (en) * 1979-02-12 1981-02-17 Sperry Corporation Sequential Galois multiplication in GF(2n) with GF(2m) Galois multiplication gates
US4847801A (en) * 1987-10-26 1989-07-11 Cyclotomics, Inc. Compact galois field multiplier
KR920019108A (en) * 1991-03-20 1992-10-22 김광호 Calculation method and device on GF (2 ^ m) using partial GF (2 ^ m / 2)
US5689452A (en) * 1994-10-31 1997-11-18 University Of New Mexico Method and apparatus for performing arithmetic in large galois field GF(2n)
US5771184A (en) * 1995-10-12 1998-06-23 Adaptec, Inc. System and method for solving quadratic equation in galois fields
US6141786A (en) * 1998-06-04 2000-10-31 Intenational Business Machines Corporation Method and apparatus for performing arithmetic operations on Galois fields and their extensions

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100670780B1 (en) * 2004-10-29 2007-01-17 한국전자통신연구원 Apparatus for hybrid multiplier in GF2^m and Method for multiplying

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