KR20020053267A - Glitch masking method for switching signal and apparatus thereof - Google Patents

Abstract

PURPOSE: A method for removing a glitch of a switching signal and an apparatus are provided to remove a glitch generated when a switch is shorted and opened. CONSTITUTION: A clock generator(20) generates a clock having a predetermined period. A signal level confirmation section(10) performs an AND operation of an input signal and the clock generated by the clock generator(20). A counter(30) counts the predetermined number of second level signals for a predetermined time when an output signal of the signal level confirmation section(10) is the second level signal. A switching signal output section(40) outputs a first level signal when the output signal of the signal level confirmation section(10) is a first level signal or a level of a counted signal from the counter(30) is continuously smaller than a predetermined number. A switching signal output section(40) outputs the second level signal when the level of a counted signal from the counter(30) is continuously greater than the predetermined number.

Description

Glitch masking method for switching signal and apparatus

The present invention relates to a method and apparatus for removing glitches of a switching signal, and more particularly, to a method and apparatus for removing glitches generated when a switch is shorted or opened.

Shorting or opening the switch can cause a large number of glitches at the contacts, which inadvertently carry a continuous high or low level signal. For devices or devices that respond slowly, such as lamps, these glitches have little effect on the operation of the device or device, but for devices that receive a switch signal and do some software processing or respond immediately to the switch signal, Whenever this occurs, software switching can occur continuously, or a continuous switching signal can be delivered to the device to cause serious errors.

An object of the present invention is to provide a method and apparatus for removing glitches of a switching signal.

Another object of the present invention is to provide a computer-readable recording medium recording a method of removing glitches of a switching signal.

1 is a diagram illustrating a glitch signal generated when a short circuit of a conventional switch is performed.

2 is a diagram illustrating a signal from which a glitch signal is removed by a method or device for removing a glitch of a switching signal according to the present invention.

Figure 3 is a block diagram showing the configuration of an embodiment of a glitch cancellation apparatus for a switching signal according to the present invention.

4 is a flowchart illustrating an operation of one embodiment of a method for removing glitch of a switching signal according to the present invention.

5 is a view showing the flow of operation of the state machine to which the method of eliminating the glitch of the switching signal according to the present invention.

In order to achieve the above technical problem, the method of removing the glitch of the switching signal according to the present invention comprises the steps of: (a) detecting the level of the input signal; (b) outputting a first level signal if the input signal is a first level signal, and checking whether the second level signal is input for a predetermined time if the input signal is a second level signal; And (c) outputting a second level signal when a predetermined number of the second level signals are continuously input in the step (b).

In order to achieve the above technical problem, the apparatus for removing glitch of the switching signal according to the present invention comprises a clock generating means having a predetermined period; Signal level checking means for logically multiplying an input signal with a clock output from the clock generating means; Counting means for counting and storing whether or not a predetermined number of second level signals are output for a predetermined time when the signal output from the signal level checking means is a second level signal; And outputs a first level signal if the signal output from the signal level checking means is a first level signal or if the level of the signal counted by the counting means is continuously less than a predetermined number, and the level of the signal counted by the counting means is increased. It characterized in that it comprises a switching signal output means for outputting a second level signal if more than a predetermined number in succession.

Hereinafter, with reference to the accompanying drawings will be described in detail preferred embodiments of the present invention.

1 is a view showing a glitch signal generated when a short circuit of a conventional switch, FIG. 2 is a view showing a signal from which a glitch signal is removed by a method or device for removing a glitch of a switching signal according to the present invention. While the generated glitch signal Switch_sig_in is directly shown in the output Switch_sig_out, in FIG. 4, the input signal Switch_sig_in is removed by the glitch removing method or apparatus of the switching signal according to the present invention and outputted (Switch_sig_out). have. The switch used in FIGS. 1 and 2 is a switch operating at a low level, and the method and apparatus for removing glitch of the switching signal according to the present invention may be applied to a switch operating at a high level.

Figure 3 is a block diagram showing the configuration of an embodiment of a glitch elimination device of the switching signal according to the present invention.

Referring to FIG. 3, the apparatus for removing glitch of a switching signal according to the present invention includes clock generation means 20 having a predetermined period; Signal level checking means (10) for performing an AND operation on an input signal and a clock output from the clock generating means; Counting means (30) for counting and storing whether or not a predetermined number of low-level signals are output for a predetermined time when the signal output from the signal level checking means is a low-level signal; And outputs a high level signal if the signal output from the signal level checking means is a high level signal or if the level of the signal counted by the counting means is continuously less than a predetermined number, and the level of the signal counted by the counting means is continuous. And a switching signal output means 40 for outputting a low level signal if the predetermined number or more.

4 is a flowchart illustrating an operation of one embodiment of a method for removing glitch of a switching signal according to the present invention.

Referring to FIG. 4, the signal level checking means 10 checks the level of the input signal by logically multiplying the input signal according to a short circuit or opening of the switch and a clock signal having a predetermined period generated from the clock generating means 20. (Step 300). If the input signal is at high level, the logical product of the clock signal with the high level is '1'. Therefore, the level of the input signal is identified as high level. Since it is '0', the level of input signal is confirmed as low level.

If the input signal confirmed by the signal level checking means 10 is a high level, the signal output means 40 outputs a high level signal (step 360). The low level signal is input to the counting means 30 (step 320). The counting means 30 increments the counter when the low level signal is input (step 320), and if the counter does not reach a predetermined number of times (e.g. 50 times) within a predetermined time, the counting means 30 from the continuous signal level checking means 10 Wait for input (step 330).

If the low level signal is input to the counting means 30 continuously for a predetermined number of times within a predetermined time, the low level signal is input from the counting means 30 to the signal output means 40, and the signal output means 40 is low. A level signal is output (step 340). On the other hand, if the input signal is confirmed at the high level by the signal level checking means 10 before the counter reaches a predetermined number of times, a predetermined signal is output to the counting means 30 so as to set the counter to zero, and the signal output means ( A high level signal is output to 40 so that the signal output means 40 outputs a high level signal. In the above process, if the signal output means 40 outputs a high or low level signal, the counter is set to zero (step 350).

On the other hand, the clock signal generated by the clock generating means 20 is preferably set so that one period is smaller than the shortest low level duration of the glitch signal, but if it is too small compared to the longest low level duration of the glitch signal, the glitch signal. Nevertheless, since the low level signal is output to the signal output means 40 when the counter reaches the predetermined number of times, it is preferable not to set the value too small for the longest low level duration of the glitch signal.

FIG. 5 is a diagram illustrating an operation flow of a state machine to which the above-described method of removing glitch of the switching signal is applied.

Referring to FIG. 5, when a low level signal having a value of '0' or a high level signal Switch_sig_in having a value of '1' is input to the signal unit 500, the signal unit 500 may be configured to a value of an input signal. Accordingly, in the case of the high level signal, a high level signal having a value of '1' is immediately output, and a low level signal having a value of '0' is output to the counting means 510. If the input signal following the signal input to the counting means 510 is a high level signal, the signal unit 500 outputs a high level signal (Switch_sig_out). Repeat the above process accordingly. When the counter reaches a predetermined value, the signal unit 520 outputs a low level signal Switch_sig_out. In FIG. 5, the signal parts denoted by reference numerals 500 and 520 may also be configured as one element, but are shown as separate elements for convenience of description.

It can be easily understood by those skilled in the art that the above-described method and device for removing the glitch of the switching signal can be variously configured in software or hardware. Naturally, it may include more than one logic gate, such as an AND gate or one or more flip-flops. Also

The invention can also be embodied as computer readable code on a computer readable recording medium. The computer-readable recording medium includes all kinds of recording devices in which data that can be read by a computer system is stored. Examples of computer-readable recording media include ROM, RAM, CD-ROM, magnetic tape, floppy disks, optical data storage devices, and the like, which are also implemented in the form of carrier waves (for example, transmission over the Internet). Include. The computer readable recording medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion.

According to the glitch removing method and apparatus of the switching signal according to the present invention, by combining the glitch signal output from the switch with a predetermined clock signal to remove the glitch signal from the signal output from the switch, to generate a clean switch signal and to short circuit or Eliminating software or hardware errors that can occur due to glitches that occur when opening.

Claims (5)

(a) detecting the level of the input signal; (b) outputting a first level signal if the input signal is a first level signal, and checking whether the second level signal is input for a predetermined time if the input signal is a second level signal; And and (c) outputting a second level signal when a predetermined number of second level signals are continuously input in step (b). The method of claim 1, And (g) detecting the level of the input signal by logically multiplying the input signal with a clock having a predetermined period. The method of claim 1, And outputting a second level signal if the result of performing a logical AND on each of a predetermined number of signals input for a predetermined time and a clock having a predetermined period in step (c) is a second level signal. How to Eliminate Glitch in Switching Signals. Clock generation means having a predetermined period; Signal level checking means for logically multiplying an input signal with a clock output from the clock generating means; Counting means for counting and storing whether or not a predetermined number of second level signals are output for a predetermined time when the signal output from the signal level checking means is a second level signal; And If the signal output from the signal level checking means is a first level signal or if the level of the signal counted by the counting means is continuously less than a predetermined number, the first level signal is outputted, and the level of the signal counted by the counting means is continuous. And a switching signal output means for outputting a second level signal when the predetermined number or more is exceeded. (a) detecting the level of the input signal; (b) outputting a first level signal if the input signal is a first level signal, and checking whether the second level signal is input for a predetermined time if the input signal is a second level signal; And (c) a computer-readable recording medium having recorded thereon a program for causing a computer to output a second level signal when a predetermined number of second level signals are continuously input in the step (b).