KR20020036888A - Flat display device comprising material layers for electron amplification having carbon nanotube layer and method for manufacturing the same - Google Patents

Abstract

PURPOSE: A flat display device having an electron amplifying material layer with a carbon nanotube layer is provided to enhance luminescence and increase secondary electron emission to maintain a discharge sustain voltage as low enough. CONSTITUTION: A flat display device comprises barrier ribs(130) between a front and a rear glasses(200,100) for separating discharge cells. The discharge cells are formed by a dielectric film(120) between the barrier ribs(130) and the rear glass(100) and a material layer between the barrier ribs(130) and the front glass(200). Address electrodes(110) are formed on the rear glass(100) correspondingly to the discharge cells for discharging the discharge cells. The material layer includes a secondary electron emission layer(190) for emitting the secondary electrons to the discharge cells and a scanning and common electrodes(140,150) for discharging the dielectric film(180) and the discharge cells. The secondary electron emission layer(190) is made of carbon nanotube.

Description

Flat display device comprising material layers for electron amplification having carbon nanotube layer and method for manufacturing the same

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat panel display, and more particularly, to a flat panel display having an electron amplifying laminate using carbon nanotubes, and a manufacturing method thereof.

Carbon nanotubes are extremely small cylindrical materials, usually in the order of several nanometers to hundreds of nanometers in diameter, and have an aspect ratio of 10-1000, and exhibit conductivity when arm-chair. In the case of a (zig-zag) structure, it exhibits semiconductor properties.

The display device can be broadly classified into a CRT (Cathod Ray Tube) and an FDP. Compared with CRTs, FDP is becoming a representative display device that can replace CRTs because of its thinner thickness, easy portability, and low power consumption.

FDP can be divided into liquid crystal display (LCD), plasma display panel (PDP), and field emission display (LCD). On the other hand, PDPs are advantageous for forming large screens, so that they can improve the brightness while compensating for the disadvantages of LCDs, and also improve the brightness. It is provided with an optical amplifier such as.

PDPs can be classified into direct current (DC) type and alternating current (AC) type PDPs, and alternating current type PDPs can be further classified into electrode opposing types and surface discharge types. At present, surface discharge type PDPs have become mainstream due to electrode damage and fluorescent film damage during discharge.

1 to 3, the tripolar surface discharge type PDP according to the related art has a space between the front glass substrate 20 and the rear glass substrate 10 and the two substrates 10 and 20 facing each other at regular intervals. The partition wall 13 which divides | disconnects is provided. And an address electrode 11, a scan electrode 14, and a common electrode for generating a discharge in the discharge space 21 corresponding to each pixel, defined by the two substrates 10, 20 and the partition wall 13. (15) is provided. The address electrode 11 is formed on the back glass substrate 10 so as to perpendicularly intersect the scan and common electrodes 14, 15, and is covered with the back dielectric film 12. The scan and common electrodes 14 and 15 are formed on the same surface facing the back glass substrate 10 of the front glass substrate 20 and are covered with the front dielectric film 18. A magnesium oxide film (MgO) is formed on the front dielectric film 18 as a protective film. The fluorescent film 17 is covered on the dielectric film 12 between the barrier rib 13 and the barrier rib 13. Moreover, the bus electrode 16 is formed in the outer edge which opposes the scanning electrode 14 and the common electrode 15. As shown in FIG.

As described above, the PDP forms a partition wall on the substrate to form a plasma discharge space to discharge the image. The partition wall 13 is usually formed by a printing method, and should be formed to have a constant pattern. The partition 13 makes it possible to distinguish and display discharges between adjacent cells. Among these, the MgO film 19 emits secondary electrons in the discharge space 21 to increase efficiency, thereby lowering the discharge voltage applied between the electrodes and protecting the electrodes inside the panel. .

However, since the MgO film used in the current PDP has a low secondary electron emission coefficient, the secondary electron amplification rate is low and causes a voltage increase and a decrease in luminance. Since the PDP is a device using a discharge, the discharge cells should be formed to have a discharge space for the discharge to occur well. An MgO film is formed in the discharge space as a protective film. The MgO film is mainly formed by sputtering or e-beam evaporation. However, the deposition of the MgO film is difficult to emit secondary electrons enough to sufficiently lower the discharge sustain voltage.

Accordingly, an aspect of the present invention is to solve the problems caused by the prior art, and to provide a flat panel display device capable of increasing secondary electron emission to improve luminance and maintain a sufficiently low discharge sustain voltage. Is in.

Another object of the present invention is to provide a method of manufacturing the flat display device.

1 is a perspective view of a three-electrode surface discharge plasma display panel, which relates to a conventional flat display panel.

FIG. 2 is a cross-sectional view of FIG. 1 taken in a 2-2 'direction.

FIG. 3 is a cross-sectional view of FIG. 1 taken in the 3-3 'direction.

4 to 8 are cross-sectional views illustrating a flat display device according to first and second exemplary embodiments of the present invention, and are cross-sectional views of a PDP cut in a direction perpendicular to a partition wall.

FIG. 9 is a cross-sectional view of a flat display device according to a third exemplary embodiment of the present invention, which is a cross-sectional view of a PDP cut in a direction perpendicular to a partition wall.

FIG. 10 is an enlarged perspective view illustrating only an insulating layer including holes formed along a side surface of the carbon nanotube layer among the PDP components shown in FIG. 9.

FIG. 11 is a cross-sectional view of a flat display device according to a fourth exemplary embodiment of the present invention, which is a cross-sectional view of a PDP cut in a direction perpendicular to a partition wall.

FIG. 12 is a cross-sectional view taken along the line 12-12 ′ in FIG. 11 and is a cross-sectional view taken along a direction parallel to the partition wall.

13 and 14 are cross-sectional views illustrating a flat display device according to a fifth exemplary embodiment of the present invention, which is a cross-sectional view of an LCD cut in a direction perpendicular to a partition wall.

15 and 16 are cross-sectional views illustrating a flat display device according to a sixth embodiment of the present invention, and are cross-sectional views of an LCD cut in a direction perpendicular to the partition wall.

17 and 18 are cross-sectional views illustrating a flat display device according to seventh and eighth embodiments of the present invention, respectively, and are cross-sectional views of an LCD cut in a direction perpendicular to a partition wall.

It is sectional drawing of the 1st sample used for the 1st experimental example of this invention.

20 is a schematic configuration diagram of a device used for secondary electron emission coefficient measurement used in the first to third experimental examples of the present invention.

21 and 22 are graphs showing the results measured through the first experimental example of the present invention.

23 and 24 are graphs showing the results measured through the second and third experimental examples of the present invention, respectively.

25 to 27 are cross-sectional views perpendicular to the address electrode illustrating, in steps, a method of manufacturing a flat panel display device according to a first embodiment of the present invention.

28 to 31 are cross-sectional views perpendicular to the address electrode illustrating, in steps, a method of manufacturing a flat panel display device according to a third exemplary embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

50, 700, 800: First substrate 60, 714, 814: Second substrate

51, 52: second and third electrodes 59, 708, 820: discharge space

56, 130, 706: bulkhead 57: first electrode

58, 170, 712, 816: fluorescent film 61, 230: second secondary electron emission material layer

62,716: LCD panel 53: first dielectric film

54, 190, 710: Secondary electron emission material layer 54a, 710a: First material layer

54b, 710b: second material layer 64, 718: drive circuit portion

100: back glass substrate 110: address electrode

120, 180, 704, 828: Dielectric film 140: scanning electrode

150: common electrode 175: material layer

200: front glass substrate 210: discharge cell

240, 360: third and fourth secondary electron emission material layers

300: protective film 340: insulating layer

350: hole 400, 810: secondary electron emission material plate

410 and 812: Insulation plates 412 and 416: First and second electrode plates

414, 418: First and second voltage lead-in 500: Vacuum chamber

510: Sample for measuring the second electron emission coefficient 520: Electron gun

530: ammeter 540: variable power supply

702: electrode

802, 804, 806, and 808: first to fourth voltage leads

P1, P2, P3, and P4: first to fourth electrode plates

822: second insulating plate 824: second secondary electron emission material plate

826: electrode for initial discharge 900: glass substrate

910: chromium (Cr) layer 920: nickel (Ni) layer

930: carbon nanotube layer 940: magnesium oxide (MgO) layer

In order to achieve the above technical problem, the present invention includes a plasma discharge region for emitting light, and a flat panel display device comprising secondary electron emitting means for emitting secondary electrons to the discharge region during discharge. The secondary electron emission means provides a flat display device characterized in that the carbon nanotube layer.

At least one material film selected from the group consisting of MgO, MgF 2, CaF 2, LiF, Al 2 O 3, ZnO, CaO, SrO, SiO 2 and La 2 O 3 is further formed on the carbon nanotube layer.

The flat panel display is an LCD in which the discharge region is applied to a PDP or a backlight.

In order to achieve the above technical problem, the present invention provides a first dielectric layer covering the address electrode and the address electrode formed in a stripe shape on the front and rear substrates and the rear substrate facing each other at regular intervals, and the first electrode between the address electrodes. 1 and a fluorescent film formed on sidewalls of the barrier ribs and sidewalls of the barrier ribs which are formed in a direction parallel to the address electrodes and supported to maintain the constant gap with the front substrate and form discharge cells. Scan electrodes and common electrodes formed parallel to each other at a predetermined interval on a surface of the front substrate facing the rear substrate at a predetermined interval in a direction crossing the address electrodes, and the scan electrode on the front substrate; A second dielectric layer and the second oil layer stacked to cover the common electrodes; A PDP is provided as a flat panel display device characterized by including secondary electron emission amplifying means on an entire film.

Here, the secondary electron emission amplifying means is further formed on the side surface of the partition wall. Further, the secondary electron emission amplifying means is further provided between the fluorescent film and the first dielectric film. The secondary electron emission amplifying means is a carbon nanotube layer.

A protective film is further formed on the carbon nanotube layer.

In addition, in order to achieve the above technical problem, the present invention is an address electrode and an inner surface of the rear substrate and the address electrode formed in a stripe shape on the inner surface facing the front substrate and the rear substrate and the rear substrate facing the front substrate at regular intervals Scan electrodes formed on the inner surface of the first dielectric layer formed to cover the address electrodes on the inner surface of the front substrate, the sides of the first dielectric layer being parallel to each other at predetermined intervals in a direction crossing the address electrodes; A second dielectric layer formed on the common electrode and the front substrate to cover the scan electrode and the common electrodes, and formed on the first dielectric layer between the address electrodes in parallel with the address electrodes; While maintaining a constant distance between the first and second dielectric layers Barrier ribs defining a discharge space on the sidewalls and between the barrier ribs and the first dielectric layer between the barrier ribs and the barrier ribs, the barrier ribs being perpendicular to the barrier ribs and contacting the fluorescent membrane; Positive voltage on the side opposite and opposite to the secondary electron emission material plate in parallel with the secondary electron emission material plate between the partitions and the secondary electron emission material plate to which negative voltage is applied to emit secondary electrons in the form of long emission in the discharge space. A flat panel display device comprising the applied insulating plate is provided, and a PDP is provided.

Here, an electrode plate to which a positive voltage is applied is provided on a surface of the insulating plate opposite to the secondary electron emission material plate, and a negative voltage is applied to a surface not opposite to the electrode plate of the secondary electron emission material plate. The electrode plate is provided.

The secondary electron emission material plate is a single plate composed of carbon nanotube plates or a double plate composed of carbon nanotube plates and a protective film.

A double layer including a carbon nanotube layer or a carbon nanotube layer and a protective film is further formed on the second dielectric layer.

In addition, in order to achieve the above technical problem, the present invention is an address electrode and an inner surface of the rear substrate and the address electrode formed in a stripe shape on the inner surface facing the front substrate and the rear substrate and the rear substrate facing the front substrate at regular intervals Scan electrodes formed on the inner surface of the first dielectric layer formed to cover the address electrodes on the inner surface of the front substrate, the sides of the first dielectric layer being parallel to each other at predetermined intervals in a direction crossing the address electrodes; A second dielectric layer formed on the common electrodes and the front substrate to cover the scan electrode and the common electrodes, and the second dielectric layer formed on the second dielectric layer and emitting secondary electrons to a discharge region between the two substrates; 2 a protective film serving to protect the dielectric film and an image between the address electrodes Barrier ribs formed on a first dielectric layer in a direction parallel to the address electrodes, and having a predetermined height so as to define a discharge space between the first and second dielectric layers, sidewalls of the barrier ribs, and the barrier ribs A plane formed with a fluorescent film formed on the first dielectric film and an insulating layer formed between the passivation film and the barrier ribs and having a hole formed to expose the fluorescent film and a second electron emission material layer on an inner surface of the hole. PDP is provided as a display device.

Here, the protective film is any one material film selected from the group consisting of MgO, MgF 2, CaF 2, LiF, Al 2 O 3, ZnO, CaO, SrO, SiO 2 and La 2 O 3.

In addition, in order to achieve the above technical problem, the present invention is to control the light transmitted to the pixel in accordance with the applied voltage of the individual pixels to display the image and the LCD panel and the flat step of uniformly stepping on the LCD panel A liquid crystal display device comprising a backlight unit for supplying light and a driving circuit unit for controlling a voltage applied to individual pixels of the LCD panel, wherein the backlight unit provides light of uniform intensity to the entire bottom surface of the LCD panel. It provides a liquid crystal display device which is a light source that can be irradiated.

Here, the backlight unit further includes a diffusion layer between the LCD panel and the light source.

The light source uses discharge, and includes a front and rear substrates facing each other at regular intervals, a partition wall defining a discharge space together with the two substrates while maintaining the front substrate and the rear substrate at regular intervals, and between the partition walls. The first electrode for initial discharge formed on the inner side of the front substrate, the fluorescent film formed on the first electrode, and the inner side of the rear substrate between the barrier ribs, and are stripped side by side at regular intervals. The second and third electrodes for sustain discharge formed on the substrate, a dielectric film formed to cover the second and third electrodes on the rear substrate, and a material layer for emitting secondary electrons to the discharge space. And a secondary electron emission material layer formed.

According to another embodiment of the present invention, the light source is a front and rear substrate facing at regular intervals, a fluorescent film formed on the inner surface of the front substrate, and on the inner surface facing the front substrate of the back substrate Discharge electrodes formed in a stripe shape parallel to each other at regular intervals, a dielectric film formed to cover the electrodes on an inner side surface of the rear substrate, and the fluorescent film and the dielectric film at predetermined intervals; A barrier rib defining a discharge space between the fluorescent film and the dielectric layer, and a layer of a secondary electron emission material formed on a side surface of the barrier rib as a material layer for emitting secondary electrons into the discharge space.

In addition, according to another embodiment of the present invention, the light source is a front element and a back substrate facing each other at regular intervals, and in contact with the two substrates vertically to define a discharge space between the two substrates and the discharge space A secondary electron emission material layer applied with a negative voltage to emit long emission secondary electrons, and perpendicularly contacting the two substrates to define a discharge space between the two substrates together with the secondary electron emission material layer Another element and a fluorescent film formed on the inner surface of the front substrate between the insulating support and a positive voltage applied to the surface facing the secondary electron emission material layer and the secondary electron emission material layer and the electrode support And a positive voltage is applied to the surface facing the secondary electron emission material layer while dividing the discharge space in vertical contact with the fluorescent film and the rear substrate. A negative voltage is applied to emit long emission secondary electrons into the discharge space while being in vertical contact with the applied second insulating support, the fluorescent film between the insulating support and the second insulating support, and the back substrate. Formed on the back substrate between the second secondary electron emission material layer and the secondary electron emission material layer and the second insulating support and between the second secondary electron emission material layer and the insulating support. And a dielectric film formed to cover the electrodes on the back electrode and the discharge electrodes.

Here, the secondary electron emission material layer is a carbon nanotube layer or a double layer composed of a carbon nanotube layer and a protective film.

A double layer including the carbon nanotube layer or the carbon nanotube layer and a protective hemp is further formed between the first electrode and the fluorescent film.

The insulating support and the second insulating support each have an electrode plate to which a positive electrode is applied on a surface opposite the secondary electron emission material layer and the second secondary electron emission material layer.

The secondary electron emission material layer and the second secondary electron emission material layer each include an electrode plate to which a negative voltage is applied on a surface not facing the electrode plate.

In order to achieve the above technical problem, the present invention provides a method for forming an electrode on the front glass substrate, the method comprising: forming a first dielectric layer covering the electrode on the front glass substrate; Forming a carbon nanotube layer as a secondary electron emission material layer on the first dielectric layer, forming an address electrode on the rear glass substrate and spaced at predetermined intervals perpendicular to the electrode and on the rear glass substrate Forming a second dielectric layer on the second dielectric layer between the address electrodes, forming a barrier rib on the second dielectric layer between the address electrodes, and forming a fluorescent layer on the sidewalls of the barrier rib and the second dielectric layer between the barrier ribs; Applying the carbon nanotube layer to an upper surface of the partition wall so that the front glass substrate faces the rear glass substrate. And exhausting the gas introduced into the discharge space defined by the barrier rib and the carbon nanotube layer in the contacting step, and injecting and sealing a plasma discharge gas into the discharge space. A method of manufacturing a flat panel display device is provided.

In this process, a protective film having a secondary electron emission capability is further formed on the carbon nanotube layer.

In addition, before forming the fluorescent film, a second electron emission material layer is further formed on the second dielectric film between the partition walls, or a second electron emission material layer is further formed on the sidewall of the partition wall. In this case, the secondary electron emission material layer is formed of a carbon nanotube layer or a double layer consisting of the carbon nanotube layer and a protective film having a secondary electron emission capability.

On the other hand, the present invention is another method for achieving the other technical problem, forming an electrode spaced at a predetermined interval on the front glass substrate, and forming a first dielectric film covering the electrode on the front glass substrate Forming a protective film having a secondary electron emission capability on the first dielectric film, forming an insulating film including holes spaced apart from each other at predetermined intervals at which the protective film is exposed on the protective film; Forming a carbon nanotube layer along the side of the hole, forming an address electrode perpendicular to the electrode and spaced at a predetermined interval on the rear glass substrate, and covering the address electrode on the rear glass substrate; Forming a dielectric film, forming a barrier rib on the second dielectric film between the address electrodes, and forming a barrier rib between the barrier ribs; Applying a fluorescent film on a second dielectric film and sidewalls of the partition wall, contacting the insulating film with an upper surface of the partition wall to expose the fluorescent film through the hole, and the gas introduced into the partition wall in the contacting step And discharging the gas and injecting and sealing the plasma discharge gas between the partition walls.

In this process, a barrier layer may be further formed on the carbon nanotube layer, or a carbon nanotube layer may be further formed between the first dielectric layer and the protective layer, or the barrier layer may be formed before forming the fluorescent layer. A second electron emission material layer is further formed on the second dielectric film in between. In this case, the secondary electron emission material layer may be formed of a carbon nanotube layer, but may be formed of a double layer including the carbon nanotube layer and a protective film having secondary electron emission capability.

In addition, in order to achieve the above another technical problem, the secondary electron emission material plate is formed so that an external voltage is applied to the side wall of the partition wall formed between the front glass substrate and the rear glass substrate on which the fluorescent film is formed, There is also provided a method of manufacturing a flat panel display device, wherein an insulating plate to which a voltage opposite to the voltage applied to the secondary electron emission material plate is applied is formed on sidewalls of the partition wall.

In this process, the secondary electron emission material plate is preferably formed of a carbon nanotube plate.

As described above, in the case of using the flat display device according to the present invention having the secondary electron amplifying means in the discharge space, the secondary electron emission coefficient due to the ions inside the PDP becomes large, so that high luminance can be obtained. On the contrary, it means that the driving voltage for driving the PDP can be lowered, which also contributes to the stability of the PDP circuit and lowers the price. In addition, in the LCD, it is possible to uniformly supply light from the backlight to the LCD panel and increase brightness of the supplied light. This means that the driving voltage of the backlight can be lowered.

Hereinafter, a flat panel display according to an exemplary embodiment of the present invention and a method of manufacturing the same will be described in detail with reference to the accompanying drawings.

In the accompanying drawings, the width, height, or the like of the drawings are enlarged for convenience of description, and the thickness and the like are exaggerated. In addition, the same reference numerals (or signs) appear in the description means that the elements indicated by the reference numbers are the same member.

First, a flat display device according to an exemplary embodiment of the present invention will be described.

<First Embodiment>

The first embodiment is a PDP in a flat panel display device. Referring to FIG. 4, the front glass substrate 200 and the rear glass substrate 100 face each other at predetermined intervals. The partition wall 130 is formed between the front and back glass substrates 200 and 100. The partition wall 130 divides the discharge space formed between the front and rear glass substrates 200 and 100 into discharge cells 210 corresponding to each pixel. As can be seen in the drawing, it is not the front and rear glass substrates 200 and 100 that directly define the discharge cell 210, but the dielectric film 120 formed between the partition wall 130 and the rear glass substrate 100. And a material layer 175 formed between the partition wall 130 and the front glass substrate 200. The address electrodes 110 for discharging the discharge cells 210 are formed on the rear glass substrate 100 at regular intervals so as to correspond to the discharge cells 210 one-to-one, and are covered with the dielectric film 120. It is formed in the form. The material layer 175 is in direct contact with the barrier rib 130 and causes discharge in the secondary electron emission material layer 190, the dielectric film 180, and the discharge cell 210, which emit secondary electrons to the discharge cell 210. Necessary scan and common electrodes 140, 150. The secondary electron emission material layer 190 is preferably a carbon nanotube layer as a means for amplifying secondary electron emission.

Meanwhile, as shown in FIG. 5, the secondary electron emission material layer 190 may be a bilayer composed of the first and second material layers 190a and 190b. In this case, the first material layer 190a is a carbon nanotube layer, and the second material layer 190b is any one selected from the group consisting of an MgO layer, a fluoride layer, and an oxide layer. The fluorides are MgF 2, CaF 2 and LiF, and the oxides are Al 2 O 3, ZnO, CaO, SrO, SiO 2 and La 2 O 3.

Subsequently, the fluorescent film 170 is formed on the dielectric film 120 between the side surface of the partition wall 130 and the partition wall 130. The fluorescent film 170 absorbs ultraviolet rays generated from the discharge in the discharge cell 210 and emits visible light toward the front glass substrate 200.

When a voltage equal to or greater than the discharge start voltage is applied between the scan and the common electrodes 140 and 150 formed side by side in the direction crossing the address electrode 110, a large amount of secondary electrons are emitted while surface discharge occurs in the discharge space. . This means that a large amount of plasma discharge is formed in the discharge space while a voltage is applied between the scan and common electrodes 140 and 150. This also means that the inert gas injected into the discharge space is ionized more than before at the same applied voltage. Therefore, a larger amount of ultraviolet rays are emitted in the discharge space, and the emitted ultraviolet rays excite the fluorescent film 170, so that the light emitted from the fluorescent film 170 becomes much larger than before. In this way, the brightness of the image is significantly increased.

Second Embodiment

Referring to FIG. 6, in addition to the secondary electron emission material layer 190 formed between the front glass substrate 200 and the sidewall 130, a second secondary electron emission material is formed between the fluorescent film 170 and the dielectric film 120. A layer 230 is formed, and a third secondary electron emission material layer 240 is formed on the upper side of the sidewall 130. The second and third secondary electron emission material layers 230 and 240 are carbon nanotube layers. In this way, the secondary electron emission effect can be maximized. In this case, the secondary electron emission material layer 190 may be a bilayer composed of the first and second material layers 190a and 190b as shown in FIG. 7. The first material layer 190a is a carbon nanotube layer, and the second material layer 190b is any one selected from the group consisting of an MgO layer, a fluoride layer, and an oxide layer. The fluorides are MgF 2, CaF 2 and LiF, and the oxides are Al 2 O 3, ZnO, CaO, SrO, SiO 2 and La 2 O 3.

In addition, as shown in FIG. 8, the secondary electron emission material layer 190 is a single layer formed of a carbon nanotube layer, whereas the second and third secondary electron emission material layers 230 and 240 are each made of a single layer. It may be a double layer including the first material layers 230a and 240a and the second material layers 230b and 240b.

Third Embodiment

9, the scan and common electrodes 140 and 150, the dielectric layer 180, and the passivation layer 300 are sequentially formed on the inner surface of the front glass substrate 200. The protective film 300 is preferably a MgO layer, but may be any material layer selected from the group consisting of MgF 2, CaF 2, LiF, Al 2 O 3, ZnO, CaO, SrO, SiO 2 and La 2 O 3. Under the protective layer 300, barrier ribs 130 defining the discharge space 320 between the front and rear glass substrates 200 and 100 in units of cells cover the address electrode 110 on the rear glass substrate 100. It is formed on the dielectric film 120 formed in the shape. The fluorescent film 170 is formed on the dielectric film 120 between the sidewalls of the barrier ribs 130 and the barrier ribs 130. An insulating layer 340 is provided between the barrier ribs 130 and the passivation layer 300. A hole 350 through which the fluorescent film 170 is exposed is formed in the insulating layer 340. A fourth secondary electron emission material layer 360 is formed along the inner surface of the hole 350. The fourth secondary electron emission material layer 360 discharges a large amount of secondary electrons to the discharge space 320 as the discharge starts, thereby amplifying the secondary electrons. Preferably, as shown in circle (C), the carbon nanotube layer 360a and any one material layer 360b selected from the group consisting of MgO, MgF 2, CaF 2, LiF, Al 2 O 3, ZnO, CaO, SrO, SiO 2, and La 2 O 3. It may be a double layer consisting of.

FIG. 10 is a perspective view of the insulating layer 340, and more clearly in three dimensions, the fourth secondary electron emission material layer 360 formed along the inner surface and the shape of the plurality of holes 350 formed in the insulating layer 340. can see.

Fourth Example

Referring to FIG. 11, a fluorescent film 170 is formed on the dielectric film 120 between sidewalls of the barrier ribs 130 and the barrier ribs 130. In addition, the secondary electron emission material plate 400 and the insulating plate which are in contact with the fluorescent film 170 perpendicularly to the partition walls 130 between the partition walls 130 and spaced apart by a predetermined distance along the partition wall 130 ( 410 are facing each other. The secondary electron emission material plate 400 is a carbon nanotube plate. At this time, the surface facing the insulating plate 410 of the secondary electron emission material plate 400 is formed of any one material selected from the group consisting of MgO, MgF2, CaF2, LiF, Al2O3, ZnO, CaO, SrO, SiO2 and La2O3 A second secondary electron emission material plate may be further provided. In other words, the secondary electron emission material plate 400 may be a single or double secondary electron emission material plate. A negative voltage is applied to the secondary electron emission material plate 400 so that secondary electrons are emitted in a long emission form in the discharge space between the barrier ribs 130. To this end, the first electrode plate 412 is provided on a surface of the secondary electron emission material plate 400 that does not face the insulating plate 410. A negative voltage is applied to the first electrode plate 412 through the first voltage lead line 414 provided in a form embedded in the dielectric film 120 under the fluorescent film 170.

On the other hand, a positive voltage is applied to the insulating plate 410 to form an electric field in the discharge space between the secondary electron emission material plate 400 and the insulating plate 410. To this end, the second electrode plate 416 is provided with a positive voltage applied to a surface of the insulating plate 410 facing the secondary electron emission material plate 400. A positive voltage is applied to the second electrode plate 416 through a second voltage lead line 418 provided in a form embedded in the dielectric film 120 under the fluorescent film 170 in parallel with the first voltage lead line 414. do.

When the voltage is applied to the first and second electrode plates 412 and 416 as described above, the secondary electron emission material plate is formed on the second electrode plate 416 to which the positive voltage is applied between the positive electrode plates 412 and 416. An electric field directed to the first electrode plate 412 to which a negative voltage is applied via the 400 is present. As a result, there is an electric field passing through the secondary electron emission material plate 400. Accordingly, the quantum and electrons of the material elements constituting the secondary electron emission material plate 400 are subjected to electric force, and the electrons having relatively weak binding force have a potential difference between the positive electrode plates 412 and 416 at a predetermined value or more. Will be released. In this way, secondary electrons due to long emission are emitted from the secondary electron emission material plate 400 to the discharge space.

Subsequently, the structure consisting of the partition wall 130, the positive electrode plates 412 and 416, the secondary electron emission material plate 400 and the insulating plate 410 is formed on the front substrate and its bottom surface as in the first to third embodiments. In contact with the attached members, but not shown in Figure 11 for convenience. However, as shown in FIG. 12, a separate secondary on the dielectric layer 180 formed to cover the scan and common electrodes 140 and 150 formed on the inner side of the members provided on the bottom surface of the front substrate 200. The electron emission material layer 190 may be further provided. For example, as the secondary electron emission material layer in contact with the partition wall 130 on the dielectric layer 180, the carbon nanotube monolayer or the carbon nanotube layer and MgO, MgF 2, CaF 2, LiF, Al 2 O 3, ZnO, CaO, SrO, and SiO 2 are used. And it may be provided with a bilayer consisting of any one material layer selected from the group consisting of La2O3. This further increases the number of secondary electrons emitted to the discharge space.

FIG. 12 is a cross-sectional view of FIG. 11 cut in a direction parallel to the partition wall 130 passing between the partition walls and perpendicular to the secondary electron emission material plate 400 and the insulating plate 410 opposite to the partition wall 130. The opposing relationship between the secondary electron emitting material plate 400 and the insulating plate 410 and the position of the electrode plate as well as the upper structure in contact can be more clearly understood.

Hereinafter, the fifth to eighth embodiments relate to a liquid crystal display among flat display devices, and more particularly to a backlight among liquid crystal display devices. At this time, the same reference numerals in each embodiment represent the same member.

Fifth Embodiment

Referring to FIG. 13, a second substrate 60 is provided on the first substrate 50 opposite to and spaced from the predetermined substrate. The first and second substrates 50 and 60 are front and back glass substrates. The discharge space 59 between the first and second substrates 50 and 60 is defined by the partition wall 56 provided between the two substrates 50 and 60. The discharge space 59 is sealed by the partition walls 56 in contact with the first and second substrates 50 and 60. The first electrode 57 is provided on the bottom surface of the second substrate 60 between the partition walls 56 in the discharge space 59. The first electrode 57 is for causing initial discharge in the discharge space 59 (for forming wall charge). On the bottom of the first electrode 57, a fluorescent film 58 that absorbs ultraviolet rays generated in the discharge space 59 and emits visible light is coated. The visible light is uniformly irradiated through the second substrate 60 over the entire bottom surface of the LCD panel 62 arranged thereon. As such, the backlight unit of the LCD according to the embodiment of the present invention is used as an LCD light source which does not require a conventional light guide plate.

Subsequently, if wall charges are formed in the discharge space 59 by the initial discharge using the first electrode 57, it is necessary to generate surface discharge for continuously maintaining the discharge in the discharge space 59 using the wall charges. The second and third electrodes 51 and 52 for generating the surface discharge are formed on the first substrate 50 side by side at regular intervals between the partition walls 56. In addition, a first dielectric film 53 covering the second and third electrodes 51 and 52 is formed on the first substrate 50 between the partition walls 56. A secondary electron emission material layer 54 is formed on the first dielectric layer 53 and exposed to the discharge space 59. The secondary electron emission material layer 54 is a single layer formed of a carbon nanotube layer as a secondary electron emission means or a bilayer composed of first and second material layers 54a and 54b sequentially formed as shown in FIG. Can be. At this time, the first material layer 54a is a carbon nanotube layer, the second material layer 54b is an MgO layer, and the second material layer 54b is a fluoride such as MgF2, CaF2, LiF, etc. in addition to the MgO layer. The layer may be any one selected from oxide layers such as Al 2 O 3, ZnO, CaO, SrO, SiO 2, and La 2 O 3.

In the drawing, reference numeral 64 denotes a driving circuit portion for applying and controlling a driving voltage to the pixels formed in the LCD panel 62.

Although not shown, a diffuser may be further provided between the LCD panel 62 and the second substrate 60.

Sixth Example

This embodiment is characterized in that the bottom surface of the second substrate 60 as well as the first substrate 50 is provided with a secondary electron emission material layer.

Specifically, referring to FIG. 15, the first electrode 57 and the fluorescent film 58 are sequentially formed on the bottom surface of the second substrate 60 between the partition walls 56 as in the fifth embodiment. However, a second secondary electron emission material layer 61 is further provided between the first electrode 57 and the fluorescent film 58. The second secondary electron emission material layer 61 is a carbon nanotube layer and is formed in a form covered with the fluorescent film 58. In this case, the secondary electron emission material layer 54 or the second secondary electron emission material layer 61 may be a single layer composed of only carbon nanotube layers or each of the first material layers 54a as shown in FIG. 16. , 61a) and second layers 54b and 61b. In this case, the first material layers 54a and 61a and the second material layers 54b and 61b are the same as the first and second material layers of the fifth embodiment.

By doing so, the secondary electron emission is increased to increase the discharge amount of the inert gas filled in the discharge space 59. Thus, the ultraviolet light absorbed by the fluorescent film 58 is increased, so that the visible light emitted from the fluorescent film 58 is increased. It will increase. In this way, the light irradiated from the backlight to the entire bottom surface of the LCD panel 62 is uniform and bright, so that the luminance is further improved as compared with the conventional one.

Seventh Example

Referring to FIG. 17, electrodes 702 to which voltages of opposite polarities are applied are formed on the first substrate 700 side by side at predetermined intervals. The first substrate 700 is a rear glass substrate. A dielectric film 704 having a flat surface is formed on the first substrate 700 to cover the electrode 702. A partition wall 706 is formed on the dielectric film 704 and spaced apart at predetermined intervals. The space 708 between the partition walls 706 is used as the discharge space. A secondary electron emission material layer 710 is formed along the sidewall of the partition 706. The secondary electron emission material layer 710 is a carbon nanotube layer. The secondary electron emission material layer 710 is formed on the first material layer 710a and the first material layer 710a which directly surround the sidewall of the partition 706 as shown in the enlarged view indicated by reference A. It may be composed of a material layer 710b. In this case, the carbon nanotube layer is preferably used as the first material layer 710a, and is selected from the group consisting of MgO, MgF2, CaF2, LiF, Al2O3, ZnO, CaO, SrO, SiO2, and La2O3 as the second material layer 710b. Either layer of material is preferred. The fluorescent film 712 is coated on the barrier rib 706 to cover the discharge space 708 and to contact the upper portion of the secondary electron emission material layer 710. The fluorescent film 712 emits visible light having a uniform brightness at the entire surface while being irradiated with a visible light excitation factor, for example, ultraviolet rays, emitted from the discharge gases introduced into the discharge space 708. This visible light is emitted toward the LCD panel 716 located on the second substrate 714 through the bottom surface of the second substrate 714 formed on the fluorescent film 712. In this way, visible light having a uniform intensity is incident on the entire bottom surface of the LCD panel 716. The second substrate 714 is a front glass substrate facing the first substrate 700, and is preferably disposed in parallel with the first substrate 700.

In the drawing, reference numeral 718 denotes a driving circuit unit for applying and controlling a driving voltage to each pixel included in the LCD panel 716.

<Eighth Embodiment>

Referring to FIG. 18, first to fourth voltage lead lines 802, 804, 806, and 808 spaced apart from each other by a predetermined distance are buried in the first substrate 800. The first substrate 800 is a back glass substrate. Second and third voltage leads 804 and 806 are provided between the first and fourth voltage leads 802 and 808. A negative voltage is applied to the first and third voltage lead lines 802 and 806, and a positive voltage is applied to the second and fourth voltage lead lines 804 and 808. A second electron emission material plate 810 is provided on the first substrate 800 and is perpendicular to the first substrate 800, and is opposed to and spaced apart from the first substrate 800 by a predetermined distance from the first substrate 800. A vertical insulating plate 812 is provided. The secondary electron emission material plate 810 is preferably a carbon nanotube layer as a means for amplifying secondary electrons in the discharge space. However, the secondary electron amplification efficiency is further provided by further providing an MgO layer on the surface facing the insulating plate 812. Can be further increased. In this case, the MgO layer may be replaced with any one material layer selected from the group consisting of MgF 2, CaF 2, LiF, Al 2 O 3, ZnO, CaO, SrO, SiO 2 and La 2 O 3. The first electrode plate P1 connected to the first voltage lead wire 802 and thus to which a negative voltage is applied is provided on a surface of the secondary electron emission material plate 810 that does not face the insulating plate 812. The second electrode plate P2 connected to the fourth voltage lead line 808 on the side of the 812 facing the secondary electron emission material plate 810 and thus to which a positive voltage is applied is provided.

Meanwhile, a second substrate 814 is provided on the first substrate 800 to face the first substrate 800 and to be supported by the secondary electron emission material plate 810 and the insulating plate 812. The second substrate 814 is a front glass substrate. In this way, a discharge space 820 is defined between the first and second substrates 800 and 814 by the secondary electron emission material plate 810 and the insulating plate 812. The fluorescent film 816 that emits visible light with respect to ultraviolet rays is coated on the entire bottom surface of the second substrate 814 in the discharge space 820. The second insulating plate 822 and the second secondary electron emission material plate 824 dividing the discharge space 820 between the secondary electron emission material plate 810 and the insulating plate 812 are formed of the first substrate 800. ) And the fluorescent film 816 in contact with each other in a form perpendicular to the fluorescent film 816. The second secondary electron emission material plate 824 is preferably the same material plate as the secondary electron emission material plate 810, but may be another material plate having a high secondary electron amplification rate. The second insulating plate 822 faces the secondary electron emission material plate 810, and is provided with a third electrode plate P3 to which a positive voltage is applied through the second voltage lead line 804. have. The second secondary electron emission material plate 824 is provided near the second insulating plate 812 between the second insulating plate 812 and the second insulating plate 822 under the same conditions as the second insulating plate 822. It is provided to face the second electrode plate (P2) provided in the second insulating plate 812, the negative voltage through the third voltage lead-in line 806 on the surface facing the second insulating plate 822 The applied fourth electrode plate P4 is provided.

In this way, the discharge space 820 is caused by the potential difference applied between the secondary electron emission material plate 810 and the second insulating plate 822, and the second secondary electron emission material plate 824 and the insulating plate 812. Emission of secondary electrons is emitted.

Spaced apart on the first substrate 800 between the secondary electron emitting material plate 810 and the second insulating plate 822 and the second secondary electron emitting material plate 824 and the insulating plate 812. In this state, the initial discharge electrodes 826 are formed side by side, and a dielectric film 828 covering them is formed.

In order to support the above embodiment, the inventors conducted an experiment in which the electron emission efficiency of the secondary electron emission material layer was measured for electrons and ions.

<First Experimental Example>

When the electrons were irradiated to the sample, it is an experimental example measuring how much secondary electrons are emitted from the sample. A sample was formed for this purpose, and the sample was formed by dividing the first to third samples. At this time, the carbon nanotube layer was formed by chemical vapor deposition (Chemical Vapor Deposition) method.

<1st sample>

Referring to FIG. 19, the first sample sequentially performs a chromium (Cr) layer 910, a nickel (Ni) layer 920, a carbon nanotube layer 930, and an MgO layer 940 on the glass substrate 900. Formed to form. At this time, the glass substrate 900 was formed to a thickness of about 2.1mm, the chromium layer 910 used to attach the glass substrate 900 and the nickel layer 920 was formed to a thickness of about 200Å, used as an electrode The nickel layer 920 may be formed to a thickness of about 200 μs, and the carbon nanotube layer 930 and the MgO layer 940 formed of the secondary electron emission material layer may be formed to have a thickness of about 1 μm and about 1500 μm, respectively. The MgO layer 940 may be replaced with any one material layer selected from the group consisting of a fluoride layer such as MgF 2, CaF 2 and LiF, and an oxide layer such as Al 2 O 3, ZnO, CaO, SrO, SiO 2, and La 2 O 3. have. At this time, the thickness can be arbitrarily selected within the range of about 1000 kPa to 2000 kPa. In addition, the nickel layer 920 may be replaced with any one layer selected from the group consisting of a metal having a large electron emission coefficient value, such as ITO, Ag, Co, Cs, W, Mo, Ta, Fe, and Cu.

<Second sample>

It was formed in the same manner as the first sample, but only the carbon nanotube layer was used as the secondary electron emission material layer.

<Third sample>

It was formed in the same manner as the first sample, but only the MgO layer was formed as the secondary electron emission material layer.

-Experiment-

Secondary electron emission experiments on the samples were measured and compared with the secondary electron emission coefficient (δ) for the samples using a secondary electron emission coefficient measuring device as shown in FIG. In the drawing, reference numeral 500 is a vacuum chamber 500, 510 is a sample for measuring the secondary electron emission coefficient, 520 is an electron gun for irradiating an electron beam to the sample 510, 540 is connected to the sample 510 The variable power supply 530 is an ammeter for measuring a current flowing in the sample 510.

Prior to the experiment, the electron beam e1 irradiated from the electron gun 520 toward the sample 510 is called an applied current Ip, and the secondary electrons e2 emitted from the sample 510 by the electron beam e1 irradiation. Denotes the secondary electron current Is and the current flowing through the sample 510 is It, the following equation 1 is established between them.

Ip = It + Is

In addition, the secondary electron emission coefficient δ of the sample 510 may be expressed as a ratio of the secondary electron current Is and the applied current Ip emitted from the sample 510 as shown in Equation 2 below.

δ = Is / Ip

Substituting Equation 1 into Equation 2, the secondary electron emission coefficient δ may be represented by Equation 3 below.

δ = 1- (It / Ip)

Therefore, the secondary electron emission coefficient δ of the sample 510 can be known by measuring the current Ip applied to the sample 510 and the current It flowing through the sample 510. Since the applied current Ip can be known through the voltage applied to the electron gun, in the present experiment, the desired purpose can be achieved by measuring only the current It flowing through the sample 510.

Accordingly, the inventor loaded the sample 510 in the vacuum chamber 500 and connected the variable power source 540 to the sample 510 to apply a predetermined voltage. Subsequently, the electron beam e1 is irradiated onto the surface of the sample 510 using the electron gun 520 to emit secondary electrons e2 from the sample 510 and flows to the sample 510 through the ammeter 530. The secondary electron emission coefficient (δ) of the sample 510 was measured by measuring the current.

These measurements were first made on the first sample and then sequentially on the second and third samples.

The secondary electron emission coefficient of the first sample (CNT + MgO) varies with the formation conditions of the MgO layer, that is, the substrate temperature, deposition rate, oxygen partial pressure, thickness, and the like, which can be seen in Table 1 below.

turn Substrate temperature (℃) Deposition rate (Å / s) Thickness Oxygen supply rate (sccm) Secondary electron emission factor One 100 5 1000 2 3.11 2 200 15 1000 10 6.6 3 100 5 1000 10 2.9 4 200 15 1000 2 1000 5 100 5 2000 10 370 6 200 15 2000 2 2.28 7 100 5 2000 2 100 8 200 15 2000 10 1.83 9 150 10 1500 6 2.45 10 150 10 1500 6 4.36 11 100 5 1000 10 2600 12 200 5 1000 2 4 13 100 15 1000 2 140 14 200 15 1000 10 19000 15 100 5 2000 2 10.4 16 200 5 2000 10 9.6 17 100 15 2000 10 18.2 18 200 15 2000 2 240

The MgO layer of the first sample was formed under the condition (second film formation condition) having the largest secondary electron emission coefficient.

FIG. 21 is a graph illustrating secondary electron emission coefficients δ according to energy changes of the electron beam e1 emitted from the electron gun 520, where the horizontal axis represents energy change of the electron beam e1, and the vertical axis represents secondary electron emission coefficient. The change of (δ) is shown, respectively. Reference numeral " " denotes a first graph G1 showing the change of the secondary electron emission coefficient measured by irradiating the electron beam e1 to the first sample CNT + MgO (or MgO / CNT). Reference numerals “■” and “▲” denote second and third graphs G2 and G3 indicating changes in secondary electron emission coefficients for the second CNT and the third sample MgO, respectively.

Referring to the first to third graphs G1, G2, and G3, the maximum value of the secondary electron emission coefficient (δ) is 2300 for the first sample, whereas the maximum value is 2300 for the second and third samples, respectively. The secondary electron emission coefficient (δ) was much smaller than that of the first sample at 2.46 and 5.55. As a result, it was confirmed that the sample having the largest secondary electron emission coefficient δ was the first sample composed of the carbon nanotube layer and the magnesium oxide film (CNT / MgO).

Since the value of the secondary electron emission coefficient δ of the first sample is much larger than that of the second sample or the third sample composed only of the carbon nanotube layer or the magnesium oxide film, the CNT / MgO (or The use of MgO / CNTs in flat panel displays (PDP, LCD), electronic amplifiers, optical amplifiers, etc., has been shown to increase secondary electron amplification effects.

FIG. 22 is graphs of secondary electron emission coefficients δ for the first sample, wherein the conditions for forming the MgO layer in the first sample including the carbon nanotube layer and the MgO layer, for example, the temperature of the substrate and the MgO layer It shows the change of the secondary electron emission coefficient (δ) that appears when the thickness of the different.

In FIG. 22, when the graph shown by the reference figure "■" is the 14th condition of Table 1, the graph shown by "▲" is the 11th condition, and the graph shown by "+" is the 13th condition, respectively, when the MgO layer was formed. Is the change of the secondary electron emission coefficient of the graph, and the graph indicated by "*" is the 18th condition of Table 1, the graph represented by the reference figure "◆" is the 15th condition, and the graph represented by "●" is 16th As a condition, the graph indicated by "▼" shows the change of the secondary electron emission coefficient when the MgO layers were formed under the seventeenth conditions, respectively.

As shown in Figs. 21 and 22, when using the sample according to the present invention, it is possible to obtain a desired electron amplification rate by one or two amplifications. In other words, the signal gain (amplification factor) obtained from the secondary electron emission material can be expressed by the following equation (2). In the case of the secondary electron emission material layer according to the present invention, only a few amplifications are desired. Since the amplification factor can be easily obtained, the structure of the complex MCP and PMT can be simplified while being large in area. In fact, in large area fabrication, increasing the amplification factor is difficult to manufacture at high cost, while the cost for large area fabrication can be lowered by using the secondary electron emission material according to the present invention.

Gain = δ ¹ δ _(n-1)

Where δ ¹ is the gain in the initial impact, δ _(n-1) is the average amplification rate in the event of multiple impacts on the sample with the amplification rate in the initial impact, and n is the electron channel. The number of hits along the length is shown.

Second Experimental Example

When the ion is irradiated to the sample, it is an experimental example measuring how much secondary electrons are emitted from the sample. The experiment was conducted similarly to the first experimental example, but four samples, that is, the first to fourth samples were used. Among the four samples, the first to third samples are the same as the first to third samples of the first experimental example, respectively. Like the third sample, the fourth sample is composed of a carbon nanotube layer and a magnesium oxide layer, but the magnesium oxide layer of the fourth sample is formed under conditions different from those of the third sample. In the second experiment, the carbon nanotube layer was formed by printing.

23 is the secondary electron emission coefficient between the first to fourth samples for ion irradiation ( ) Is a graph for comparing. In FIG. 23, the horizontal axis represents the ion acceleration voltage, and the vertical axis represents the secondary electron emission coefficient due to ion irradiation ( ). And reference figure "▲" is the secondary electron emission coefficient for the first sample ( ), "●" is for the second sample, "■" is for the third sample, and "▼" is for the second sample. Indicates a change.

Since the acceleration voltage in the discharge cell of the actual PDP is usually about 50 V or less, the secondary electron emission coefficients for the first to fourth samples ( ) Value is also preferably compared with each other under the condition that the acceleration voltage is 50V or less.

Referring to the graphs of FIG. 23, under these conditions, the secondary electron emission coefficients of the second sample including only the carbon nanotube layer as well as the first and fourth samples in which the carbon nanotube layer and the MgO layer are laminated together ( ) Is the secondary electron emission coefficient of the third sample containing only the MgO layer ( It is much larger than). This means that the possibility of ionization of the gases present in the discharge space can be increased, which means that the driving voltage of a flat display device such as an LCD using a PDP structure or a PDP structure using a discharge is reduced.

As a result, through the above experiments, when the MgO layer, which is a conventional secondary electron emission material layer, is replaced by a carbon nanotube layer or a double layer composed of a carbon nanotube layer and an MgO layer, the secondary by both electrons and ions It was confirmed that the electron emission coefficient value is much larger.

First, the value of the secondary electron emission coefficient (δ) by electrons is about 2 to 5 in the conventional MgO layer, whereas in the case of the secondary electron emission material layer (CNT / MgO) of the present invention, the formation conditions of the MgO layer As a result, it can be seen to increase up to 19000. These results confirmed that the secondary electron emission by electrons is several hundred times larger than the coefficient value (about 80) of the secondary electron emission material known so far.

On the other hand, the secondary electron emission coefficient by the ion ( Even in the experiment of measuring the value, the secondary electron emission coefficient by the ion at the ion acceleration voltage (50V or less) inside the PDP ( ) Value was increased. As a result, it can be expected that the driving voltage of the flat panel display device using the discharge such as the PDP will be lowered.

Where Vf is the initial discharge voltage of the PDP, Is the secondary electron emission coefficient by ions, A and

B is a constant determined by a gas filled in the PDP discharge space, and d is a distance between electrodes. Secondary electron emission coefficient by ion in equation (5) It can be seen that as the value of) increases, the initial discharge voltage Vf decreases.

However, the flat panel display according to the embodiment of the present invention is a secondary electron emission material layer, as demonstrated through the above experimental example, and has a much higher secondary electron emission coefficient by both electrons and ions than the conventional MgO layer. A bilayer of CNT layer or CNT / MgO structure is provided. As such, the secondary electron emission coefficient of the secondary electron emission material layer of the flat panel display device, for example, PDP according to the present invention is much larger than that of the conventional one, so that the driving voltage of the PDP can be lowered, and further, the PDP according to the present invention. By applying a discharge system to the LCD backlight, the driving voltage of the LCD lamp is lowered, thereby lowering the driving voltage of the LCD.

On the other hand, as described above, the MgO layer in the composition of the secondary electron emission material layer according to the present invention is any one selected from the fluoride layer such as MgF2, CaF2 and LiF Al2O3, ZnO, CaO, SrO, SiO2 and The same effect can be obtained by substituting any one of the oxide layers such as La2O3 and the like. For example, when the MgO layer is replaced with an SiO2 layer, the secondary electron emission material layer is composed of CNT / SiO2. The case of a double layer is demonstrated.

Third Experimental Example

The result of the secondary electron emission coefficient (δ) when electrons were irradiated to the secondary electron emission material layer composed of CNT / SiO 2 is shown in FIG. 24.

Referring to FIG. 24, the horizontal axis represents energy of irradiated electrons, and the vertical axis represents secondary electron emission coefficient δ. In addition, the graph shown by reference figure "(circle)" is a graph which shows the change of the secondary electron emission coefficient (delta) with respect to irradiation electron. Referring to this graph, the secondary electron emission coefficient (δ) value of the CNT / SiO 2 structured secondary electron emission material layer is about 6000, which is applied to the secondary electron emission material layers 2 to 5 formed only of the conventional MgO layer. It is much larger than that.

Next, a method of manufacturing a flat panel display according to an exemplary embodiment of the present invention will be described. More specifically, the present invention relates to a PDP manufacturing method among flat display devices, and to a method of manufacturing the flat display devices according to the first and third embodiments among the flat display devices according to the embodiments of the present invention described above.

<First Embodiment>

Referring to FIG. 25, scan and common electrodes 140 and 150 are formed on the front glass substrate 200, but are spaced apart from each other by a predetermined interval. A dielectric layer 180 is formed on the front glass substrate 200 to cover the scan and common electrodes 140 and 150. The secondary electron emission material layer 190 is formed on the dielectric layer 180. The secondary electron emission material layer 190 is preferably formed of a carbon nanotube layer as a means for amplifying secondary electron emission.

As shown in the enlarged circle C1 of a portion of the secondary electron emission material layer 190, the secondary electron emission material layer 190 may be formed as a double layer. For example, the second electron emission material layer 190 may be formed by sequentially forming the first and second material layers 190a and 190b on the dielectric layer 180. In this case, the first material layer 190a is preferably formed of a carbon nanotube layer, and the second material layer 190b is preferably formed of any one selected from the group consisting of an MgO layer, a fluoride layer, and an oxide layer. Here, the fluoride is any one selected from the group consisting of MgF2, CaF2 and LiF, the oxide is any one selected from the group consisting of Al2O3, ZnO, CaO, SrO, SiO2 and La2O3.

Referring to FIG. 26, the address electrode 110 is formed on the rear glass substrate 100. The dielectric film 120 covering the address electrode 110 is formed on the rear glass substrate 100, and then the surface thereof is planarized. The partition wall 130 is formed on the dielectric film 120 having the planarized surface. The fluorescent film 170 is coated on the dielectric film 120 between the sidewall of the partition wall 130 and the partition wall 130.

Meanwhile, before forming the fluorescent film 170, a second secondary electron emission material layer (see '230' in FIG. 6 or 7) may be further formed on the dielectric film 120 between the partition walls 130. The fluorescent film 170 may be applied only to a portion of the sidewall of the partition wall 130, and a third secondary electron emission material layer (eg, '240 in FIG. 6 or 7) may be applied to the remaining portion, for example, on top of the sidewall of the partition wall 130. May be further formed. In this case, when the second and third secondary electron emission material layers are formed as a single layer, the second and third secondary electron emission material layers are preferably formed as a carbon nanotube layer. As the case may be formed of the first and second material layer (190a, 190b), each material layer is preferably formed of any one selected above.

Subsequently, as shown in FIG. 27, the resultant shown in FIGS. 25 and 26 is combined, but the dielectric film 190 is coupled to be in close contact with the upper surface of the partition wall 130. In this way, the discharge cells 210 divided by the partition wall 130 are formed between the front glass substrate 200 and the back glass substrate 100. Thereafter, the gas introduced into the discharge cell 210 is exhausted in the process of bonding the front and rear glass substrates 200 and 100, and then the gas required for plasma discharge is injected into the discharge cell 210 and sealed.

Third Embodiment

Referring to FIG. 28, the electrodes 140 and 150 used as the scan and common electrodes on the front glass substrate 200, the first dielectric layer 180 covering the electrodes 140 and 150, and the secondary electron emission capability are provided. The protective film 300 having the following is formed sequentially. The electrodes 140 and 150 are formed using at least one of a multitude of ITO, Ag, Ni, Co, Cs, W, Mo, Ta, Fe and Cu. The protective film 300 is formed using any one selected from the group consisting of MgO, MgF 2, CaF 2, LiF, Al 2 O 3, ZnO, CaO, SrO, SiO 2 and La 2 O 3. Although not shown, prior to forming the passivation layer 300, a material layer having a much higher secondary electron emission capability than the passivation layer 300 may be further formed on the dielectric layer 180, for example, a carbon nanotube layer.

Referring to FIG. 29, an insulating film 300 is formed on the protective film 300. A hole 350 in which the passivation layer 300 is exposed is formed in the insulating layer 300, but spaced apart at predetermined intervals. In forming the hole 350 in the insulating film 300, it is preferable to consider that the fluorescent film formed between the partition walls through the hole 350 is exposed and is in contact with the insulating film between the holes 350 and the upper surface of the partition wall. Do. That is, it is preferable that the fluorescent film between the partition walls is exposed through the hole 350 so that the insulating film 300 between the holes 350 and the upper surface of the partition wall correspond to each other accurately. Subsequently, a secondary electron emission material layer 360 having a much higher secondary electron emission capability than the passivation layer 300 is formed along the side surface of the hole 350. The secondary electron emission material layer 360 may be formed of a single layer or a double layer. When the single layer is formed of a single layer, the secondary electron emission material layer 360 may be formed of a carbon nanotube layer. After forming along the side of 350, it is preferable to form a second protective film on the carbon nanotube layer. In this case, the second passivation layer is preferably formed of the same material layer as the passivation layer 300, but may be formed of another material layer selected from the group consisting of MgO, MgF2, CaF2, LiF, Al2O3, ZnO, CaO, SrO, SiO2, and La2O3. It may be formed as.

Referring to FIG. 30, an address electrode 110 is formed on the back glass substrate 100 facing up and down with the front glass substrate 200 in the PDP as in the first embodiment, and covers the address electrode 110. The second dielectric layer 120 is sequentially formed. Subsequently, the partition wall 130 is formed on the second dielectric film 120 as in the first embodiment. The partition wall 130 may be formed at a position corresponding to the insulating layer 340 between the holes 350. The fluorescent film 170 is formed on the second dielectric film 120 between the sidewall of the partition wall 130 and the partition wall 130. Prior to forming the fluorescent film 170, a third secondary electron emission material layer (not shown) on the second dielectric film 120 between the barrier ribs 130 is much larger than the protective film 300. ) Can be further formed. In this case, the third secondary electron emission material layer may be formed in the same manner as the second secondary electron emission material layer.

Referring to FIG. 31, the front glass substrate 200 is turned upside down so that the center of the hole 350 corresponds to the center of the fluorescent film 170 formed on the second dielectric film 120 between the partition walls 130. ) Is in contact with the top surface of the partition wall (130). Subsequent processes proceed in the same manner as in the first embodiment.

On the other hand, as another method of manufacturing a flat panel display device, as can be seen with reference to FIG. 11 or 12, the secondary electron emission material plate 400 having a much higher secondary electron emission capability than the protective film 190 is formed on one sidewall of the partition wall. Next, the insulating plate 410 is formed by applying an external voltage thereto, and on the side wall of the other partition wall opposite to the insulating plate 410 to which a voltage opposite to the voltage applied to the secondary electron emission material plate 400 is applied. The manufacturing method which aimed at amplifying secondary electron emission as an effect is provided.

In addition, the above-described manufacturing method may be applied to a manufacturing method of an LCD which is one of the flat panel display devices, in particular, an LCD backlight manufacturing method. In this case, the fluorescent film covering the fluorescent film (or the secondary electron emission material layer) is used. ) Is attached to the bottom surface of the front glass substrate, and the layer of the secondary electron emission material does not differ greatly from the form formed on the rear glass substrate or from the expansion of one discharge cell of the PDP, so that a detailed description is omitted.

While many details are set forth in the foregoing description, they should be construed as illustrative of preferred embodiments, rather than to limit the scope of the invention. For example, those skilled in the art may apply the above-described secondary electron emission material layer according to the present invention to other flat display devices using discharges other than PDPs and LCDs. In addition, other similar materials besides carbon nanotubes may be provided with a double layer of secondary electron emission material layer that can replace the CNT / MgO layer. Alternatively, an additional layer of secondary electron emission material may be added to the bilayer of the CNT / MgO layer to include a triple layer or more layers of secondary electron emission material. Due to the diversity of the technical idea of the present invention, the scope of the present invention should be determined by the technical idea described in the claims rather than by the described embodiments.

As described above, the flat panel display device according to the present invention includes secondary electron amplifying means having a secondary electron emission coefficient by electrons or ions much larger than in the related art, and having a field emission characteristic. Therefore, in the case of the PDP, the secondary electron emission coefficient due to ions inside can be increased, so that a higher luminance can be obtained than that of the conventional PDP. In doing so, it is possible to lower the driving voltage (discharge sustain voltage) of the PDP. This can contribute to the stability of the PDP circuit and lower the price of the product. In the case of LCD, the backlight is applied to the PDP discharge system including the secondary electron amplifying means to uniformly supply light to the LCD panel and increase the amount of light, thereby increasing the brightness and lowering the driving voltage of the backlight. Can be.

Claims (44)

A flat panel display comprising a plasma discharge region for emitting light and having secondary electron emission means for emitting secondary electrons to the discharge region during discharge. And the secondary electron emission means is a carbon nanotube layer. The method of claim 1, wherein at least one material film selected from the group consisting of MgO, MgF2, CaF2, LiF, Al2O3, ZnO, CaO, SrO, SiO2 and La2O3 is further formed on the carbon nanotube layer. Flat display device. The flat panel display of claim 1, wherein the discharge area is a discharge area provided in a PDP or an LCD backlight. Front and back substrates facing at regular intervals; An address electrode formed on the rear substrate in a stripe shape; A first dielectric layer covering the address electrode; Barrier ribs formed on the first dielectric layer between the address electrodes in parallel with the address electrodes to support the predetermined distance from the front substrate and to form a discharge cell; A fluorescent film coated on side surfaces of the barrier ribs and the address electrode; Scan electrodes and common electrodes formed side by side at a predetermined interval on a stripe in a direction crossing the address electrodes on a surface of the front substrate facing the rear substrate; A second dielectric layer stacked on the front substrate to cover the scan electrodes and the common electrodes; And And a secondary electron emission amplifying means on the second dielectric layer. The flat panel display of claim 4, wherein the secondary electron emission amplifying means is further formed on an upper side of the partition wall. The flat panel display according to claim 4, wherein the secondary electron emission amplifying means is further formed between the fluorescent film and the first dielectric film. The flat panel display according to claim 4, wherein the secondary electron emission amplifying means is a carbon nanotube layer. The method of claim 7, wherein any one material layer selected from the group consisting of MgO, MgF2, CaF2, LiF, Al2O3, ZnO, CaO, SrO, SiO2 and La2O3 is further formed on the carbon nanotube layer. Flat display device. The flat panel display of claim 4, wherein the electrode is formed of at least one metal selected from ITO, Ag, Ni, Co, Cs, W, Mo, Ta, Fe, and Cu. Front and back substrates facing at regular intervals; An address electrode formed in a stripe shape on an inner side surface of the rear substrate facing the front substrate; A first dielectric layer formed on the inner surface of the rear substrate to cover the address electrode; Scan electrodes and common electrodes formed side by side at a predetermined interval on a stripe in a direction intersecting the address electrodes on an inner surface of the front substrate facing the rear substrate; A second dielectric layer formed on the front substrate to cover the scan electrode and the common electrode; Barrier ribs formed on the first dielectric layer between the address electrodes in parallel with the address electrodes to support a predetermined distance from the second dielectric layer and to define a discharge space between the first and second dielectric layers field; A fluorescent film formed on side surfaces of the barrier ribs and the first dielectric layer between the barrier ribs; A secondary electron emission material plate perpendicular to the barrier ribs between the barrier ribs and in contact with the fluorescent film, and having a negative voltage applied to the discharge space to emit secondary electrons in the form of long emission; And And an insulating plate to which a positive voltage is applied to a surface of the barrier ribs facing and facing the secondary electron emission material plate in parallel with each other. 12. The electrode plate according to claim 10, wherein an electrode plate to which a positive voltage is applied is provided on a surface of the insulating plate facing the secondary electron emission material plate, and negative on a surface not facing the electrode plate of the secondary electron emission material plate. An electrode plate to which a voltage of is applied is provided. The method of claim 10, wherein the secondary electron emission material plate is any one selected from the group consisting of carbon nanotube plate or carbon nanotube plate and MgO, MgF2, CaF2, LiF, Al2O3, ZnO, CaO, SrO, SiO2 and La2O3. Flat display device, characterized in that consisting of a plate. The layer of claim 10, wherein the carbon nanotube layer or the carbon nanotube layer and MgO, MgF 2, CaF 2, LiF, Al 2 O 3, ZnO, CaO, SrO, SiO 2, and La 2 O 3 are formed on the second dielectric layer. And a secondary electron emission material layer further formed. Front and back substrates facing at regular intervals; An address electrode formed in a stripe shape on an inner side surface of the rear substrate facing the front substrate; A first dielectric layer formed on the inner surface of the rear substrate to cover the address electrode; Scan electrodes and common electrodes formed side by side at a predetermined interval on a stripe in a direction intersecting the address electrodes on an inner surface of the front substrate facing the rear substrate; A second dielectric layer formed on the front substrate to cover the scan electrode and the common electrode; A protective film formed on the second dielectric film and emitting secondary electrons to a discharge region between the two substrates and protecting the second dielectric film during discharge; Barrier ribs formed on the first dielectric layer between the address electrodes in parallel with the address electrodes, the barrier ribs having a predetermined height so as to define a discharge space between the first and second dielectric layers; A fluorescent film formed on side surfaces of the barrier ribs and the first dielectric layer between the barrier ribs; And And a hole formed to expose the fluorescent film as an insulating layer formed between the passivation layer and the partition walls, and a secondary electron emission material layer on an inner surface of the hole. The flat panel display of claim 14, wherein the passivation layer is any one material layer selected from the group consisting of MgO, MgF 2, CaF 2, LiF, Al 2 O 3, ZnO, CaO, SrO, SiO 2, and La 2 O 3. The method of claim 14, wherein the secondary electron emission material layer is any one selected from the group consisting of carbo nanotube layer or carbon nanotube layer and MgO, MgF2, CaF2, LiF, Al2O3, ZnO, CaO, SrO, SiO2 and La2O3 A flat panel display comprising a material layer. An LCD panel, which serves to display an image by controlling incident light to be transmitted to pixels according to an applied voltage of individual pixels, and a backlight unit for supplying uniformly flat plane light to the LCD panel, and each of the LCD panel. A liquid crystal display device comprising a driving circuit portion for controlling a voltage applied to a pixel of The backlight unit is a liquid crystal display, characterized in that the light source using a plasma discharge capable of irradiating light of uniform intensity to the entire surface of the bottom of the LCD panel. 18. The liquid crystal display of claim 17, wherein the backlight unit further comprises a diffusion layer between the LCD panel and the light source. 19. The method of claim 17 or 18, wherein the light source using the plasma discharge, Front and back substrates facing at regular intervals; Barrier ribs defining a discharge space together with the two substrates while maintaining the front substrate and the back substrate at regular intervals; An initial discharge first electrode formed on an inner surface of the front substrate between the partition walls; A fluorescent film formed on the first electrode; Second and third electrodes for sustain discharge which are formed on the inner surface of the rear substrate between the barrier ribs, and are formed in a stripe shape parallel to each other at regular intervals; A dielectric film formed on the rear substrate to cover the second and third electrodes; And And a secondary electron emission material layer formed on the dielectric layer as a material layer for emitting secondary electrons to the discharge space. 20. The method of claim 19, wherein the secondary electron emission material layer is any one selected from the group consisting of carbon nanotube layer or carbon nanotube layer and MgO, MgF2, CaF2, LiF, Al2O3, ZnO, CaO, SrO, SiO2 and La2O3. A liquid crystal display comprising a layer. 21. The crowd selected of claim 20, wherein said carbon nanotube layer or carbon nanotube layer and MgO, MgF2, CaF2, LiF, Al2O3, ZnO, CaO, SrO, SiO2 and La2O3 are selected between said first electrode and said fluorescent film. A liquid crystal display device further comprising a secondary electron emission material layer formed of any one layer. 20. The liquid crystal of claim 19, wherein the second and third electrodes are electrodes formed of at least one metal selected from ITO, Ag, Ni, Co, Cs, W, Mo, Ta, Fe, and Cu. Display device. The method of claim 17 or 18, wherein the light source uses a discharge, Front and back substrates facing at regular intervals; A fluorescent film formed on an inner surface of the front substrate; Discharge electrodes formed on an inner side surface of the rear substrate facing the front substrate, the discharge electrodes being formed in parallel with each other at regular intervals; A dielectric film formed to cover the electrodes on an inner surface of the rear substrate; Barrier ribs defining a discharge space between the fluorescent film and the dielectric film while maintaining the fluorescent film and the dielectric film at predetermined intervals; And And a secondary electron emission material layer formed on a side surface of the barrier rib as a material layer for emitting secondary electrons to the discharge space. The method of claim 23, wherein the secondary electron emission material layer is any one selected from the group consisting of carbon nanotube layer or carbon nanotube layer and MgO, MgF2, CaF2, LiF, Al2O3, ZnO, CaO, SrO, SiO2 and La2O3. A liquid crystal display comprising a layer. 24. The liquid crystal display of claim 23, wherein the electrodes are electrodes formed of at least one metal selected from ITO, Ag, Ni, Co, Cs, W, Mo, Ta, Fe, and Cu. The method of claim 17 or 18, wherein the light source uses a discharge, Front and back substrates facing at regular intervals; A secondary electron emission material layer in contact with the two substrates in a vertical direction and defining a discharge space between the two substrates and having a negative voltage applied to emit long emission secondary electrons in the discharge space; Insulation in which a positive voltage is applied to a surface facing the second electron emitting material layer while being another element defining a discharge space between the two substrates together with the second electron emitting material layer in vertical contact with the two substrates. Support; A fluorescent film formed on an inner surface of the front substrate between the secondary electron emission material layer and the electrode support; A second insulating support in which a positive voltage is applied to a surface facing the secondary electron emission material layer while dividing the discharge space by vertically contacting the fluorescent film and the rear substrate; A second secondary electron emission material to which a negative voltage is applied so as to emit long emission secondary electrons in the discharge space while vertically contacting the fluorescent film between the insulating support and the second insulating support and the back substrate; layer; Initial discharge electrodes formed on the back substrate between the secondary electron emission material layer and the second insulating support and between the second secondary electron emission material layer and the insulating support; And And a dielectric film formed on the rear substrate to cover the electrodes. 27. The liquid crystal display device according to claim 26, wherein the secondary electron emission material layer and the second secondary electron emission material layer are carbon nanotube layers. 28. The method of claim 27, wherein the third secondary electron emitting material layer on the side of the carbon nanotube layer, any one selected from the group consisting of MgO, MgF2, CaF2, LiF, Al2O3, ZnO, CaO, SrO, SiO2 and La2O3 The liquid crystal display device further comprises a layer. 27. The method of claim 26, wherein the insulating support and the second insulating support each have an electrode plate to which a positive electrode is applied to a surface facing the secondary electron emission material layer and the second secondary electron emission material layer, respectively. A liquid crystal display device characterized in that. 27. The method of claim 26, wherein the secondary electron emission material layer and the second secondary electron emission material layer each comprises an electrode plate to which a negative voltage is applied on a surface that does not face the electrode plate. Liquid crystal display. 27. The liquid crystal display device according to claim 26, wherein the electrode is an electrode formed of at least one metal selected from ITO, Ag, Ni, Co, Cs, W, Mo, Ta, Fe, and Cu. Forming electrodes spaced at predetermined intervals on the front glass substrate; Forming a first dielectric layer covering the electrode on the front glass substrate; Forming a carbon nanotube layer as a secondary electron emission material layer on the first dielectric layer; Forming address electrodes on the rear glass substrate, the address electrodes being perpendicular to the electrodes and spaced at predetermined intervals; Forming a second dielectric layer on the rear glass substrate to cover the address electrode; Forming a partition on the second dielectric layer between the address electrodes; Applying a fluorescent film on the second dielectric film between the partitions and on sidewalls of the partitions; Contacting the carbon nanotube layer with an upper surface of the partition wall such that the front glass substrate faces the rear glass substrate; Exhausting the gas introduced into the discharge space defined by the barrier rib and the carbon nanotube layer in the contacting step; And And injecting and sealing a plasma discharge gas into the discharge space. 33. The method of claim 32, further comprising forming a protective film having secondary electron emission on the carbon nanotube layer. The method of claim 33, wherein the passivation layer is formed of any one selected from the group consisting of MgO, MgF 2, CaF 2, LiF, Al 2 O 3, ZnO, CaO, SrO, SiO 2, and La 2 O 3. 33. The method of claim 32, further comprising forming a secondary electron emission material layer on the second dielectric film between the barrier ribs before forming the fluorescent film. 33. The method of claim 32, further comprising forming a secondary electron emission material layer on an upper sidewall of the partition wall. 37. The flat panel display of claim 35 or 36, wherein the secondary electron emission material layer is formed of a carbon nanotube layer or a double layer composed of a carbon nanotube layer and a protective film having secondary electron emission capability. Manufacturing method. The method of claim 37, wherein the passivation layer is formed of any one selected from the group consisting of MgO, MgF 2, CaF 2, LiF, Al 2 O 3, ZnO, CaO, SrO, SiO 2, and La 2 O 3. Forming electrodes spaced at predetermined intervals on the front glass substrate; Forming a first dielectric layer covering the electrode on the front glass substrate; Forming a protective film having a secondary electron emission capability on the first dielectric layer; Forming an insulating film on the protective film, the insulating film including holes spaced at predetermined intervals at which the protective film is exposed; Forming a carbon nanotube layer along the side of the hole; Forming address electrodes on the rear glass substrate, the address electrodes being perpendicular to the electrodes and spaced at predetermined intervals; Forming a second dielectric layer on the rear glass substrate to cover the address electrode; Forming a partition on the second dielectric layer between the address electrodes; Applying a fluorescent film on the second dielectric film between the partitions and on sidewalls of the partitions; Contacting the insulating film with an upper surface of the partition wall so that the fluorescent film is exposed through the hole; Exhausting the gas introduced into the partition wall in the contacting step; And And injecting and sealing a plasma discharge gas between the barrier ribs. 40. The method of manufacturing a flat panel display device according to claim 39, further comprising forming a protective film having a secondary electron emission capability on the carbon nanotube layer. 40. The method of claim 39, further comprising forming a carbon nanotube layer between the first dielectric layer and the passivation layer. 40. The method of claim 39, further comprising forming a secondary electron emission material layer on the second dielectric film between the barrier ribs before forming the fluorescent film. 43. The method of claim 42, wherein the secondary electron emission material layer is formed of a carbon nanotube layer or a double layer composed of a carbon nanotube layer and a protective film having secondary electron emission capability. . 44. The method of claim 39, 40, 41 or 43, wherein the protective film is formed of any one selected from the group consisting of MgO, MgF2, CaF2, LiF, Al2O3, ZnO, CaO, SrO, SiO2 and La2O3. A method for manufacturing a flat panel display device.