KR20020031765A - Array Panel used for a Liquid Crystal Display and Method for Fabricating the same - Google Patents

Abstract

PURPOSE: An array substrate for a liquid crystal display and a method of fabricating the array substrate are provided to prevent poor products from being manufactured and to improve picture quality by forming a gate of a single metal layer. CONSTITUTION: An array panel for a liquid crystal display includes a gate line formed from a single metal layer containing aluminum, a data line intersecting the gate line, and a pixel electrode(130) formed at the intersection of the gate line and the data line. The array substrate further includes a thin film transistor electrically connected with the pixel electrode, a gate pad(106) placed at the end of the gate line, and a gate pad electrode(132) coming into contact with the gate pad. The gate pad is formed of the same material as the material of the gate line. The gate pad electrode is configured of an oxide thin film and ITO. The oxide thin film is easily oxidized at a low temperature and made of a metal having low coherence with oxygen. The ITO is formed on the oxide thin film.

Description

Array panel used for a liquid crystal display and a method of manufacturing the same {Array Panel used for a Liquid Crystal Display and Method for Fabricating the same}

The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a liquid crystal display device and a manufacturing method thereof.

The driving principle of the liquid crystal display device is to use the optical anisotropy and polarization property of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Accordingly, if the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular arrangement direction of the liquid crystal due to optical anisotropy to express image information.

Currently, a thin film transistor (TFT) and an active matrix liquid crystal display device in which matrix electrodes connected to the thin film transistor are arranged in a matrix form (hereinafter referred to as AM-LCD, abbreviated as liquid crystal display device) have a resolution. And the video implementation ability is attracting the most attention.

In general, the structure of a liquid crystal panel, which is a basic component of a liquid crystal display, will be described.

1 is an exploded perspective view schematically illustrating a general liquid crystal panel.

As shown, a general liquid crystal panel is composed of an upper substrate 10 and an array substrate 20 which is a lower substrate, and the black matrix 6a, R, and the lower substrate are disposed below the transparent substrate 1 of the upper substrate 10. A color filter 6 composed of G and B cells 6b is formed, and a common electrode 18 is formed on the lower surface of the color filter 6.

On the transparent substrate 1 of the array substrate 20, the thin film transistor T, which is a switching element, is positioned in a matrix type, and the gate wiring 13 and data passing through the plurality of thin film transistors T are crossed. The wiring 15 is formed.

The pixel electrode 17 is formed in the pixel portion P which is an area defined by the gate wiring 13 and the data wiring 15 crossing each other.

In addition, the liquid crystal 14 is filled between the upper substrate 10 and the array substrate 20.

In the liquid crystal display including the liquid crystal panel configured as described above, the liquid crystal 14 positioned on the pixel electrode 17 is oriented by a signal applied from the thin film transistor T, The image may be expressed by adjusting the amount of light passing through the liquid crystal 14 according to the degree of alignment.

2 is a process flowchart of an array substrate for a liquid crystal display device by a general five mask process.

In general, the thin film transistor structure of the liquid crystal display device has an inverted staggered type.

Because the inverted staggered thin film transistor is a process of depositing an insulating film, amorphous silicon, and impurity amorphous silicon in one chamber, the interface between the insulating film and the amorphous silicon is not exposed to air, thereby improving the interfacial characteristics of the thin film transistor. Because there is an advantage.

The manufacturing process of the array substrate for the liquid crystal display device is mainly by coating a thin film on the transparent substrate through a plasma enhanced chemical vapor deposition (PECVD) and sputtering method, in particular ITO (Indium Tin Oxide) and metal wiring of the pixel electrode Is deposited by the sputtering method.

As shown, in ST1, a transparent substrate is prepared, a cleaning process is performed to remove foreign substances on the transparent substrate, and a metal material is deposited on the cleaned transparent substrate by a sputtering method. Using the first mask is exposed and etched to form a gate wiring including a gate electrode and a gate pad.

Since the metal material forms a lower metal layer, the metal material includes a metal layer including aluminum (Al) having a low specific resistance.

In ST2, a gate insulating film is formed of an insulating material such as silicon nitride on a substrate on which the gate wiring is formed, and a semiconductor layer is continuously deposited.

Examples of the semiconductor material include polycrystalline silicon and amorphous silicon, and mainly, amorphous silicon capable of low temperature deposition is the mainstream.

That is, amorphous silicon and impurity amorphous silicon constituting the silicon nitride film and the semiconductor layer are formed by a low temperature process in PECVD has the following advantages.

Firstly, it is possible to prevent the hillock phenomenon of aluminum, in which a specific part grows to several micrometers above 200 ° C. Second, glass is widely used as a substrate of large area liquid crystal panel due to its low heat resistance and low price. Can be used as a substrate material.

In ST3, the active layer is formed by forming the semiconductor layer by a second mask process.

In the above process, an ohmic contact layer made of impurity amorphous silicon, which lowers contact resistance between the metal layer to be formed on the active layer and the active layer, is positioned.

In ST4, after depositing a metal material on the substrate on which the active layer is formed, the thin film transistor T is removed by removing the ohmic contact layer between the source and drain electrodes and the data wiring and the source and drain electrodes by a third mask process. Process of forming channels.

Examples of the metal material include molybdenum (Mo), tungsten (W), and chromium (Cr).

In ST5, a protective layer is deposited on the substrate on which the source and drain electrodes are formed, and a drain contact hole and a gate pad contact hole are formed by a fourth mask process.

The protective layer is used to prevent damage or deterioration of the thin film transistors caused by rubbing or moisture penetration during the liquid crystal cell process of the liquid crystal display device. Examples of the protective layer include a silicon nitride film and It is formed of BCB (BenzoCycloButene), which is an organic insulating film.

In ST6, after the transparent conductive material is deposited on the substrate on which the drain contact hole is formed, the pixel electrode and the gate pad electrode are formed by the fifth mask process.

Indium Tin Oxide (ITO) is mainly used as this transparent conductive material.

In the liquid crystal display manufacturing method according to the five mask process, the data pad is formed in the step of forming the data wiring, and the data pad contact hole and the data pad electrode are respectively formed in the step of forming the gate pad contact hole and the gate pad electrode. Forming a step.

3A is a cross-sectional view of a gate pad portion in which a gate pad is an aluminum single metal layer in the conventional liquid crystal display device according to the process of FIG. 2.

As shown in the figure, in the cross-sectional structure of the gate pad portion P, the gate insulating film 32, the protective layer 34, and the gate pad electrode 38 are sequentially stacked on the gate pad 30. The electrode 38 is configured to contact the gate pad 30 through the gate pad contact hole 36 formed in the protective layer 34 and the gate insulating layer 32.

In the related art, as described above in ST2 of FIG. 2, the gate pad 30 is formed of an aluminum single metal in which hillock is prevented by a low temperature deposition process using amorphous silicon.

However, when the gate pad 30 is formed of a single aluminum metal, oxygen (O ₂ ), which is a reactant gas, and aluminum react during the deposition process of ITO corresponding to ST6 of FIG. 2 to insulate aluminum oxide (Al _2). O ₃ ) layer to interfere with the electrical contact between the ITO and aluminum.

In addition, since the bonding force between aluminum and oxygen is stronger than that between ITO and oxygen, this aluminum oxide film has a problem of lowering the electrical properties of ITO.

In order to solve this problem, a method has been proposed in which the gate metal is a double metal layer including a barrier layer for reducing contact resistance between aluminum and ITO.

FIG. 3B is a cross-sectional view of a gate pad part having a double metal layer made of aluminum / molybdenum as an example of a general liquid crystal display according to the process of FIG. 2.

As shown, the cross-sectional structure of the gate pad portion of a general liquid crystal display device is formed of the first and second metal layers 40a and 40b to reduce the contact resistance between aluminum and ITO.

The first metal layer 40a is an aluminum single metal layer, and the second metal layer 40b is formed on the upper surface of the first metal layer 40a to serve as a barrier layer between aluminum and ITO. ) Is made of molybdenum, chromium, tungsten, etc., which have a weaker bond with oxygen than indium of ITO.

That is, since the gate pad electrode 42 made of ITO, which is a pixel electrode material, comes into contact with the second metal layer 40b of the gate pad 40, the problem of contact resistance with aluminum can be solved, and the gate pad 40 Even if the deposition temperature of the gate insulating film 41 is increased, the second metal layer 40b constituting the upper layer of the gate pad 40 prevents the hillock of aluminum.

However, when the gate pad is formed of a double metal layer, the following problems occur.

First, when the gate is formed of a double metal layer, the step height becomes larger than that of the single metal layer, and later, deposition of the metal layer to be deposited is not performed properly, causing disconnection, and when the metal layer is thicker than the thickness of the insulating layer, the liquid crystal There is a problem that acts as a factor to lower the electrical characteristics of the display device.

Second, in general, when the metal material is continuously deposited, galvanic corrosion occurs due to electrical contact between metals in an electrolyte solution such as a developer or an etchant during exposure and etching processes.

Third, when the gate is formed of a bimetallic layer such as molybdenum / aluminum, it is difficult to obtain a desired taper angle.

The taper angle of the gate serves to prevent disconnection of the data wiring caused by step coverage during the deposition of the data wiring and to determine the voltage-current characteristics, so that the taper angle becomes larger than the desired angle. Problem occurs that indicates the commutation characteristics.

In order to solve the above problems, the present invention provides a liquid crystal display device that can improve the contact resistance problem between aluminum and ITO while the gate wiring is made of a single metal layer containing aluminum, thereby preventing product defects and improving image quality. The purpose.

1 is an exploded perspective view showing a typical liquid crystal panel.

2 is a process flowchart of an array substrate for a liquid crystal display device by a general five mask process.

3A is a cross-sectional view of a gate pad portion in which a gate pad is made of an aluminum single metal layer in a conventional liquid crystal display device.

3B is a cross-sectional view of a gate pad portion in which a gate pad is a double metal layer made of aluminum and molybdenum in a general liquid crystal display device.

4 is a plan view of one pixel portion of an array substrate for a liquid crystal display device of the present invention;

5A to 5G are cross-sectional views of the process steps taken along the cutting lines A-A 'and B-B' of FIG. 4.

<Description of Symbols for Major Parts of Drawings>

106: gate pad 126: drain contact hole

127: gate pad contact hole 130a: first pixel electrode

130b: second pixel electrode 130: pixel electrode

132a: first gate pad electrode 132b: second gate pad electrode

132: gate pad electrode T: thin film transistor portion

P: gate pad part

In order to achieve the above object, in the present invention, the gate wiring formed of a single metal layer containing aluminum (Al); A data line crossing the gate line; A pixel electrode formed on an area where the gate line and the data line cross each other; A thin film transistor electrically connected to the pixel electrode; A gate pad made of the same material as the gate line positioned at the end of the gate line; A liquid crystal display device comprising a double layer gate pad electrode comprising an oxide thin film made of a metal that is easily oxidized at low temperature in contact with the gate pad and has a lower bonding force with oxygen than indium, and an ITO formed on the oxide thin film. An array substrate is provided.

The pixel electrode is made of the same material as the gate pad electrode, and the oxide thin film constituting the gate pad electrode is an oxide of any one metal of titanium (Ti) or zinc (Zn) having a thickness of 50 to 200 kV.

The metal constituting the data line is made of any one of chromium (Cr), molybdenum (Mo), tungsten (W), titanium (Ti), and indium (In).

In another aspect of the invention, there is provided a method comprising the steps of: providing a substrate; Forming a gate wiring and a gate pad at an end of the gate wiring using a single metal layer including aluminum (Al) on the substrate; Forming a gate insulating film on the substrate on which the gate wiring is formed; Forming a source, a drain electrode, and a data line on the insulated substrate; Forming a thin film transistor including the source and drain electrodes; Depositing a passivation layer on the substrate on which the source and drain electrodes are formed, and etching the gate insulating layer and the passivation layer to form a gate pad contact hole; Depositing a metal material on the substrate on which the gate pad contact hole is formed, the metal material having a property of being easily oxidized at low temperature and having a lower binding force with oxygen than indium; In depositing ITO on the substrate on which the metal material is deposited, the second metal material is oxidized by oxygen in the reaction gas of the ITO to oxidize to contact the gate pad through the gate pad contact hole. Forming a thin film; Fabricating an array substrate for a liquid crystal display device comprising depositing ITO on the substrate on which the oxide thin film is formed, forming a gate pad electrode formed of a double layer, and forming a pixel electrode electrically connected to the thin film transistor. Provide a method.

The metal material is oxidized to the oxide thin film is characterized in that any one of a metal (Ti) or Zn (Zinc) of 50 ~ 200Å thickness, the pixel electrode is made of the same material in the same process as the gate pad. It includes more.

The source, drain electrode and data wiring may be made of any one of molybdenum (Mo), chromium (Cr), tungsten (W), titanium (Ti), and indium (In), and the gate insulating film and the protective layer may be It is made of a silicon nitride film (SiNx).

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

4 is a plan view corresponding to one pixel portion of the array substrate for a liquid crystal display device of the present invention.

As shown, the gate wiring 103 including the gate electrode 102 is formed in the horizontal direction.

At this time, the gate electrode 102 is characterized in that a single metal layer containing aluminum.

The data line 117 including the source electrode 116 is formed in a direction orthogonal to the gate line 103, and the drain electrode 118 is formed to be spaced apart from the source electrode 116 by a predetermined interval.

The thin film transistor T, which is a switching element, is formed on a region where the source and drain electrodes 116 and 118 are formed.

The pixel electrode 130 is connected to the thin film transistor T.

A gate pad 106 having a predetermined area is formed at an end of the gate wiring 103, and a gate pad electrode 132 formed of the same material as the pixel electrode 130 is formed on the gate pad 106. have.

The pixel electrode 130 and the gate pad electrode 132 are formed of a double layer having an underlayer as an oxide thin film and an upper layer of the oxide thin film as ITO.

This oxide thin film is easily oxidized at 400 ° C. or lower, and has a weak bonding force with oxygen than indium of ITO, and is formed by the oxidation of a metal having conductor characteristics when formed thin even when oxidized.

Such metal materials include Ti (Titanium) or Zn (Zinc), and these metals have conductive properties even when they are oxidized at a thickness of 50 to 200Å.

That is, in the present invention, the gate pad 106 is a single metal layer containing aluminum, and an oxide thin film forming the lower layer of the gate pad electrode 132 serves as a barrier layer between aluminum and ITO.

5A through 5G are cross-sectional views illustrating the process steps of cutting lines A-A 'and B-B' of FIG. 3, which will be described in connection with the five-mask process flowchart of FIG. 2.

FIG. 5A illustrates a process corresponding to ST1 of FIG. 2. After depositing a single metal layer including aluminum on the cleaned transparent substrate 1, the gate electrode 102 and the gate pad 106 are formed by a first mask process. Form.

FIG. 5B is a step corresponding to ST2 of FIG. 2, wherein the gate insulating film 108, the amorphous silicon 110a (a-Si) and the impurity amorphous silicon 110b are formed on the entire surface of the substrate on which the gate electrode 102 is formed. n + -a-Si) are deposited successively.

At this time, since the semiconductor layer 110 is deposited in a low temperature deposition process of 150 ° C. or less, the heel lock of the aluminum forming the lower metal layer is prevented.

5C is a step corresponding to ST3 of FIG. 2, and the semiconductor layer 110 is patterned as shown to form the active layer 111a and the ohmic contact layer 111b on the active layer 111a.

That is, in this step, the active layer 111a is formed in the thin film transistor unit T and the semiconductor layer is etched in the gate pad part P to expose the gate insulating layer 108.

FIG. 5D illustrates the deposition of the metal material in the process corresponding to ST4 of FIG. 2, and then the source, the drain electrodes 116 and 118 and the not illustrated data line are formed by the third mask process.

At this time, the ohmic contact layer 110b between the source electrode 116 and the drain electrode 118 is etched to form a channel ch of the thin film transistor unit T.

The metal forming the source and drain electrodes 116 and 118 is made of a metal having strong chemical corrosion resistance and excellent heat resistance, such as chromium (Cr), tungsten (W), molybdenum (Mo), titanium (Ti), indium (In), and the like. .

FIG. 5E is a step corresponding to ST5 of FIG. 2, after depositing the protective layer 124 on the substrate on which the source and drain electrodes 116 and 118 are formed, and draining the protective layer 124 by a fourth mask process. The contact hole 126, the protective layer 124, and the gate insulating layer 108 in FIG. 5C are partially etched to form the gate pad contact hole 128.

In FIG. 5F, in forming a pixel electrode on a substrate on which the drain contact hole 126 is formed, a reaction gas is formed in a process of depositing Ti in a thin film at 50 to 200 kV and then depositing ITO on the Ti layer 129. In order to improve the transparency of heavy ITO, this Ti becomes an oxide thin film by TiOx by oxygen added.

This Ti metal is easy to oxidize even at a low temperature of 400 ° C. or less, and has a weak bonding strength with oxygen than indium of ITO, and has a characteristic of conducting when formed into a thin oxide film after deposition as thin as 50 to 200 kPa.

In addition, Zn (Zinc) may be cited as a metallic material having such characteristics.

5G illustrates a process step corresponding to ST6 of FIG. 2, in which ITO is deposited on an oxide thin film formed of TiOx to form first and second pixel electrodes.

In the gate pad part P, a gate pad electrode 132 including a double layer contacting the gate pad 106 through the gate pad contact hole 127 is formed in the above step.

At this time, the first gate pad electrode 132a substantially contacts the gate pad 106, and the first gate pad electrode 132a is formed of aluminum oxide forming TiOx, which is an oxide thin film, to form the gate pad 106. The contact resistance of the ITO forming the gate pad electrode is reduced.

In addition, since the barrier layer between aluminum and ITO is formed in the pixel electrode manufacturing process, the gate metal may be composed of a single metal layer including aluminum, thereby solving the problem of forming a conventional liquid crystal display device using a double metal layer.

In addition, when the gate metal is a double metal layer, there is a problem that galvanic corrosion occurs between the two metals. However, in the present invention, the gate metal is a single metal layer and the pixel electrode is composed of an oxide thin film and ITO. The phenomenon is prevented.

That is, in the conventional liquid crystal display, the aluminum oxide film formed by the contact between aluminum and ITO has a strong insulating film property, thereby increasing the contact resistance between aluminum and ITO, and the bonding strength of aluminum with oxygen is stronger than that of indium of ITO. Although the electrical properties were lowered, the oxide thin film made of TiOx, which is an oxide of Ti of 50 to 200 Å thickness of the present invention, has a conductive property, so that the gate pad and the gate pad electrode are electrically conductive, and Ti is more oxygen than indium of ITO. Since the bond strength is weak, there is an advantage that does not lower the electrical properties of the ITO.

As described above, in the present invention, before forming ITO in the pixel electrode manufacturing process, Ti, which is a metal that is easily oxidized at low temperature and has a weaker bonding force with oxygen than indium of ITO, is deposited at 50 to 200 kPa, and then ITO. By forming the oxide metal as TiOx, which is an oxide thin film serving as a barrier layer between aluminum and ITO by oxygen in the reaction gas, the gate metal is composed of an aluminum single metal layer, thereby preventing product defects and improving image quality.

Claims (9)

A gate wiring formed of a single metal layer containing aluminum (Al); A data line crossing the gate line; A pixel electrode formed on an area where the gate line and the data line cross each other; A thin film transistor electrically connected to the pixel electrode; A gate pad made of the same material as the gate line positioned at the end of the gate line; A double layer gate pad electrode comprising an oxide thin film made of a metal that is easily oxidized at low temperature in contact with the gate pad and has a lower bonding force with oxygen than indium, and ITO formed on the oxide thin film. Array substrate for a liquid crystal display device comprising a. The method of claim 1, And the pixel electrode is made of the same material as the gate pad electrode. The method of claim 1, And an oxide thin film forming the gate pad electrode is an oxide of any one of titanium (Ti) and zinc (Zn). The method of claim 1, The metal constituting the data line is any one of chromium (Cr), molybdenum (Mo), tungsten (W), titanium (Ti), and indium (In). Providing a substrate; Forming a gate wiring and a gate pad at an end of the gate wiring using a single metal layer including aluminum (Al) on the substrate; Forming a gate insulating film on the substrate on which the gate wiring is formed; Forming a source, a drain electrode, and a data line on the insulated substrate; Forming a thin film transistor including the source and drain electrodes; Depositing a passivation layer on the substrate on which the source and drain electrodes are formed, and etching the gate insulating layer and the passivation layer to form a gate pad contact hole; Depositing a metal material on the substrate on which the gate pad contact hole is formed, the metal material having a property of being easily oxidized at low temperature and having a lower binding force with oxygen than indium; In depositing ITO on the substrate on which the metal material is deposited, the second metal material is oxidized by oxygen in the reaction gas of the ITO to oxidize to contact the gate pad through the gate pad contact hole. Forming a thin film; Depositing ITO on the substrate on which the oxide thin film is formed to form a gate pad electrode formed of a double layer; Forming a pixel electrode electrically connected to the thin film transistor Method of manufacturing an array substrate for a liquid crystal display device comprising a. The method of claim 5, The metal material is oxidized to the oxide thin film is a method of manufacturing an array substrate for a liquid crystal display device of any one of a metal (Ti) or Zn (Zinc) of 50 ~ 200Å thickness. The method of claim 5, And the pixel electrode is made of the same material in the same process as the gate pad. The method of claim 5, And the source, drain electrode, and data wiring are any one of molybdenum (Mo), chromium (Cr), tungsten (W), titanium (Ti), and indium (In). The method of claim 5, And the gate insulating film and the protective layer are formed of a silicon nitride film (SiNx).