KR20020024935A - A fast convolution approximation scheme for estimating end-to-end delay - Google Patents

Abstract

PURPOSE: A system and a method for approximating high-speed convolution to estimate end-to-end delay are provided to perform convolution for delay distribution ranged in many nodes, so that the end-to-end delay is estimated in a short time and the delay distribution is delivered by being compressed. CONSTITUTION: A switch(201) exchanges data traffic in an ATM(Asynchronous Transfer Mode) network. A control block(202) connected to the switch(201) exchanges delay information between adjacent nodes. In the control black(202), a routing information manager(203) receives delay distribution by output ports in the switch(201) for outputting. Delay distribution processors(205) receive the delay distribution in the switch(201) through the routing information manager(203), and receive delay distribution from adjacent nodes respectively to perform convolution at a high speed. A delay information switching block(206) delivers delay distribution from higher nodes to the corresponding delay distribution processors(205), or delivers calculated results of the delay distribution processor(205) to the corresponding higher nodes.

Description

A fast convolution approximation system and its method for end-to-end delay prediction {A FAST CONVOLUTION APPROXIMATION SCHEME FOR ESTIMATING END-TO-END DELAY}

The present invention relates to a fast convolution approximation method for end-to-end delay prediction. More particularly, the present invention relates to a fast convolution of delay distribution over several nodes, thereby achieving short-to-end delay in a short time. A fast convolution approximation system and method for enabling estimation and for compressing and delivering delay distributions.

QoS required by users in ATM networks includes cell loss rate, cell delay, and cell delay variation. ATM networks must accommodate real-time traffic and non-real-time traffic simultaneously. For real-time traffic, cell delay (CTD) and cell delay variation (CDV) are important quality factors. The network shall be able to know whether or not the cell delay variation required in the course of call admission control can be satisfied during call setup. Thus, the network needs to predict acceptable end-to-end delay variation using cell delay and delay variation information at each switch or node. End-to-end QoS prediction can be used not only for signaling and call admission control, but also for QoS routing to select the best path to the destination.

The conventional method of estimating the end-to-end delay has been largely proposed in the following five methods.

The first method estimates the end-to-end CDV as the sum of the CDVs at each node from source to destination.

The second method assumes that the CDV at each node is a constant multiple of the standard deviation of the CTD and that the constant is the same for all nodes. Under this assumption, the end-to-end CDV will be equal to the SQUARE ROOT of the sum of the squares of the CDVs at each node.

The third method is to use average and variance of delay at each node and even CDV. Whatever the distribution of individual random variables, the larger the number of random variables, the central limit theorem that the sum of those random variables approaches a normal distribution.

The fourth method is to use CHERNOFF BOUND, which assumes that the queuing delay at each switch follows the GAMMA distribution.

The fifth method is to use an OAM cell in the network. Using OAM cells, we can find the end-to-end delay distribution without having to find the delay distribution at each node.

However, the above conventional methods cause the following problems.

The CDV obtained by the first method may not be the UPPER BOUND for the actual short-to-end CDV.

In the second method, the constant multiplied by the standard deviation at each node may not be the same.

The third method has a burden of calculating CDV at each node, and when a value of α is very small, (1-α) -QUANTILE of the cell delay time distribution requires a large number of samples. This means that the calculation time is long.

The fourth method is known to have broadband dependent characteristics for compressed video traffic, and the GAMMA distribution hypothesis is not generally established because the queue length distribution has HYPERBOLIC TAIL for broadband dependent traffic.

The fifth method can directly obtain the end-to-end delay distribution without having to obtain the delay distribution at each node. However, since the OAM cell is limited in frequency, it is very long to obtain the delay distribution using the OAM cell. It takes time, and OAM cells are generated for each connection. However, since the number of connections established in the ATM network is very large, signal traffic increases due to the OAM cell, which adds a load to the network.

The present invention devised to solve the above problems is to obtain a distribution of delays at each node in a distributed manner and to obtain an end-to-end delay using the information.

In order to achieve the above object, the present invention provides a call setup in a control system that receives a delay distribution from a neighbor node to perform a fast convolution and transfers the result to another node in order to calculate a end-to-end delay. Time routing information is recorded to determine which delay distribution processor to send when the delay distribution comes from the upstream node, and to determine which upstream node to send the calculation result of the delay distribution processor when the delay distribution comes from the downstream node. A routing information manager that receives a delay distribution for each output port from a switch and sends the delay distribution to a corresponding delay distribution processor; and a delay distribution that performs convolution at high speed by receiving a delay distribution from a directly connected switch and receiving a delay distribution from a neighboring node. The delay distribution from the upstream node to the corresponding delay distribution handler. Jugeona, the calculation result of the delay distribution information processor delays the switching block to forward to the upstream node; characterized by being a.

The present invention also provides a delay distribution processor for performing a fast convolution approximation function for two delay distributions, the method comprising: storing a delay distribution of a cell passing through a corresponding output port in probability distribution storage # 1; and, probability Receiving delay information from the upstream node or the downstream node in the distribution storage device # 2; and the probability distribution compressor # 2 is connected to the upstream node when the downstream node receives the delay information, or, if the delay information is received from the upstream node, the downstream node. And a delay distribution data compression ratio received from a neighbor node in the probability distribution storage device # 2 and transmitted as a delta 2 block; and the compressed delay distribution calculated by Equations 2 and 6 below. And calculating a data compression ratio in the delta 1 calculation block using the delay distribution input to the probability distribution storage device # 1. Generating and storing a compressed delay distribution at a compression rate calculated in the delta 1 block in the compressor # 1; and a maximum common divisor of the compression rate calculated in the delta 1 block and the compression rate stored in the delta 2 block in the minimum value calculation block. And convolving the compressed delay distribution in the convolution calculator; and restoring it to the original scale according to the results of the convolution calculator and the following equations (4) and (5) in the probability distribution storage device # 3. Storing a convolution result; and calculating a data compression ratio for the delay distribution obtained as a result of the convolution in a delta 3 block in order to deliver the convolution result to another neighbor node; and, the probability distribution compressor # Compressing the delay distribution using Equations 2 and 6 using the data compression ratio received in delta 3 in 2; and, data compression ratio It characterized in that it comprises a; transferring the compressed cumulative delay distribution to the next adjacent node.

The present invention also provides a delay distribution processor for transmitting a delay distribution of a node itself and a delay distribution of neighboring nodes, wherein the cell delay distribution generated at a corresponding output port of a directly connected switch has a probability distribution storage device # 1. Stored in the;

Delay information transmitted from an upstream node or a downstream node is stored in the probability distribution storage device # 2; and calculating a data compression ratio in a delta calculation block with respect to the delay distribution stored in the probability distribution storage device # 1; Storing the delay distribution and the data compression ratio obtained by compressing the delay distribution stored in the probability distribution storage unit # 1 in the distribution compressor # 1 by the data compression ratio calculated in the delta calculation block using Equations 2 and 6; and Determining a transmission order of branch delay distributions; and transmitting a delay distribution according to the determined transmission order.

The present invention also relates to a delay distribution processor that performs a fast convolution approximation function by receiving delay distributions at all nodes, wherein a delay distribution generated at a corresponding output port of a directly connected switch is stored in the probability distribution storage device # 1. And determining a data compression ratio in the delta 1 calculation block; and, in the probability distribution compressor # 1, compressing the delay code stored in the probability distribution storage device # 1 at a ratio of delta to send the compressed delay distribution and the compression ratio to the selector. And, starting the fast convolution calculation; selecting a result of the probability distribution compressor # 1 in the selector; and storing the delay distribution generated at the last node in the probability distribution storage device # 2; and Storing the compression ratio for the delay distribution in a delta 2 block; and whether the compression ratio is generated at a node closest to a final node in a probability distribution storage device # 3. Receiving a distribution and storing a data compression ratio for the distribution in a delta 3 block; and selecting a minimum value of two data compression ratios for two delayed distributions that are fast convolutioned in the minimum calculation block; and, a convolution calculator block Performing a convolution operation on the two compressed delay distributions and transmitting the result to the probability distribution storage device # 4; and the delay at the node closest to the delay distribution at the last node in the probability distribution storage device # 4. Fast convolution of the distribution and storing the result and the minimum value of the data compression rate; and feeding back the result to the selector; and after the feed-back step, the convolution ends from the second time in the selector. Selecting the probability distribution storage device # 4 until the cumulative convolution result is stored in the probability distribution storage device # 2; and A delay distribution for a cloud node is transmitted from the probability distribution queue to the probability distribution storage device # 3 and stored therein; and the delayed distribution accumulated in the probability distribution storage device # 2 and the next closest node stored in the probability distribution storage device # 3. Iteratively repeating the fast distribution of the delay distribution of; and storing the final result in the probability distribution storage # 4; characterized in that it comprises a.

1 is a block diagram showing the concept of an ATM node of the present invention.

2 is a control block for calculating a convolution for transmitting and receiving delay information with a neighbor node.

3 is an explanatory diagram of a principle of an approximation algorithm of high speed convolution.

4 is a flowchart illustrating an algorithm for calculating a data compression ratio required for approximation calculation of fast convolution.

5 is a block diagram of a delay distribution processor that performs a fast convolution approximation function for two delay distributions.

6 is a block diagram of a delay distribution processor that performs a function of transmitting a delay distribution of its own node and a delay distribution of a neighboring node.

7 is a block diagram of a delay distribution processor that performs a fast convolution approximation function by receiving delay distributions at all nodes.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

1 is a block diagram showing the concept of an ATM node of the present invention. As shown, several switch nodes are connected, and one node is a control block 102 that calculates a accumulated delay by exchanging information about a delay between a switch 101 exchanging data traffic and a neighboring node. consist of.

Assuming that data flows from left to right, in FIG. 1, node A on the left becomes the upstream node, and two nodes B and C on the right become the downstream node. Data traffic between neighboring nodes is carried over the data link 104, which represents a conceptual connection and may be physically included in the data link or may be separate from the data link. In the case of being physically included in the data link, the control message link 105 may be logically formed by distinguishing the data cell from the control cell and lowering only the control cell to the control block 102.

As a first step to find the end-to-end delay distribution, the delay distribution at each node must be obtained first. There are two ways to find the delay distribution at each node.

The first method is to create a test cell and measure the total time it takes to pass the switch. You can determine the delay at one node by creating a test cell and entering the input time into the test cell's timestamp immediately before or after the input and subtracting the input time stamped from the timestamp at the time of exiting the switch. .

The second method is a method that can be applied to an output buffer switch or a shared buffer switch that separates and manages cells by output ports. If the number of cells in the buffer observed at the arrival of each cell is N ', and the number of cells in the buffer observed at any time is N, N', N and the length of time the cell stays in the buffer just before it is served W The following relationship holds for the following equation (1).

Where K is the maximum number of cells that can exist in the buffer.

By using Equation 1, the distribution of time to wait until the cell is serviced in the buffer can be obtained by observing the buffer at the arrival of every cell or the buffer at every cell time. If the link rate is constant, W can be horizontally shifted by the service time to obtain a distribution of time the cell stays in the switching system.

By the method described above, the distribution of delays can be obtained at the switch 101 of each node. In order to obtain the end-to-end delay distribution, the delay information for each node is accumulated. The delay information is generated by simply sending upstream or downstream delay information from each node and delay information received from neighbor nodes. There may be a method of gathering and calculating a node or a destination node in one place, and ①, another method is to calculate and deliver the result including the delay information of its own node instead of just passing the delay information from another node. ② may be there.

In the case of ①, when the controller 102 of the intermediate node receives the delay distribution from the switch 101 directly connected (103), it compresses the delay information and sends it to the call originating node or the destination, and receives the delay information from the upstream node or the downstream node. It simply serves to convey in the opposite direction. In the last node where all the delay information is gathered, it is necessary to finally calculate the end-to-end delay using the delay information generated from the node and the received delay information.

In case of ②, the control block 102 of each node receives the delay information from the directly connected switch, and receives the delay distribution accumulated from the call originating node to the upstream node or from the destination to the downstream node from the control block of the upstream node or the downstream node. It performs the solution and delivers the accumulated delay distribution to itself in the opposite direction of receiving the delay information.

① has the advantage that the operation is reduced in the other nodes except the last node, while if the number of nodes from the call originating node to the destination node is Z, the number of times of delay information for each node is proportional to the square of Z, In the case of ②, since the fast convolution is performed at each node, the amount of computation required is a little larger, but the number of delay information for each node is proportional to Z. Therefore, the time taken to obtain the end-to-end delay prediction value may be shorter, but ①, which collects and processes all the information at once, is a little compared to ②, which continuously compresses the information after performing fast convolution at each node. More accurate end-to-end delay prediction may be made.

In the case of call admission control, before the traffic is sent from the call originating node, the node corresponding to the gateway enters the network to determine the network condition and determine whether to establish a connection. Nodes with admission control require end-to-end delay information. Therefore, in this case, each node delivers both delay information occurring at its own node and delay information received at the downstream node to the upstream node, or ①, receives delay information accumulated at the downstream node, and adds delay information to itself upstream. It is preferable to deliver ② to the node.

2 shows a control block for calculating a convolution for transmitting and receiving delay information with a neighbor node. As shown, the function of the control block 102 is shown in more detail.

In the case of a node at the edge of the network, the call admission control block 204 serves as a call admission control function. The routing information manager 203 manages routing information for all connections passing through its own node. If the call admission control block 204 allows the call connection during call setup, routing information for the new connection is added to the routing information manager 203. The function of the delay distribution processor 205 depends on how the delay information is accumulated at each node.

In the case of using the method of ①, the delay distribution processor 205 is allocated one for each output port and receives and stores the delay distribution of the cell passing through the corresponding output port. The delay information for each output port received from the switch 201 is transferred to the delay distribution processor 205 via the routing information manager 203. When the delay information is collected at the call originating node, the delay distribution processor also stores the delay information coming from the downstream node and decides which delay information from the delay information generated from the directly connected switch and the delay information received from the downstream node to be transmitted upstream first. In order to be passed upstream through the delay information switching block 206. In this case, the port number to which each delay information goes out is determined by the routing information manager 203.

When the delay information is collected at the destination node, delay information coming upstream is transmitted to the delay distribution processor 205 in the direction of the corresponding downstream node through the delay information switching block 206. The delay distribution processor 205 determines which of the delay information received from the directly connected switch and the delay information received from the upstream node is transmitted first, and immediately delivers the delay information to the downstream node.

In the case of using the delay information accumulation method of ②, the delay distribution processor 205 allocates one delay for each output port, stores a delay distribution of cells passing through the corresponding output port, and receives a delay of another node to perform fast convolution approximation calculation. do.

When the delay distribution processor 205 receives the delay distribution accumulated in the downstream node and performs high-speed convolution, the calculation result is stored, and the routing information manager 203 finds the corresponding upstream node and finds the corresponding upstream node. When the related information is sent, the calculation result is transmitted to the upstream node via the delay information switching block 206. When the delay distribution processor 205 receives the delay distribution accumulated at the upstream node and performs fast convolution, the delay distribution coming from the upstream node is transmitted to the corresponding delay distribution processor 205 through the delay information switching block 206. As soon as the delay distribution processor 205 receives both the delay distribution at its node and the delay distribution at the upstream node, the delay distribution processor 205 performs fast convolution and sends the result to the downstream node.

3 illustrates the principle of an approximation algorithm of fast convolution. As shown, if X is the delay at its own node and Y is the delay at the neighboring node, then the probability mass function (pmf) 303,304 of the probability variables X ₂ and Y ₂ is the probability mass of the probability variables X and Y. From the functions 301 and 302 is made by the following equations (2) and (3).

3 deals with the case where both the values of Δ and Δ ₂ are 2.

Convolution of pmf (303,304) of X ₂ and Y ₂ in FIG. 3 makes it easy to predict that a large number of zeros will be obtained in the distribution function as a result. When Δ and Δ ₂ are the same, as shown in Equations 4 and 5, if the case of 0 is excluded from the multiplication calculation, the number of multiplications may be reduced and the speed may be increased.

In the above, P_ {X_2 ^ '} (i) and P_ {Y_2 ^'} (i) are defined as follows.

This result means that the convolution of pmf of X ₂ and pmf of Y ₂ can be calculated by changing the scale after convolving P_ {X_2 ^ '} (i) and P_ {Y_2 ^'} (i) do. If the maximum values of X and Y are D _X and D _Y , respectively, the number of probability values constituting pmf P_ {X_2 ^ '} (i) is about 1 / Δ smaller than P _X (i). Therefore, convolving pmf of X2 and Y2 instead of X and Y will multiply the number of multiplications from (D _X +1) x (D _Y +1). The upper limit of the COMPLEMENTARY CUMULATIVE DISTRIBUTION FUNCTION is obtained. When Δ and Δ ₂ are different, the maximum common divisor of Δ and Δ ₂ is Δ '. Can be reduced. However, even if each of Δ and Δ _{2 is} large, the data compression ratio Δ is always taken as a power of 2 since no gain is obtained in terms of convolutional speed when the values are small.

As described above, by introducing the data compression ratios Δ and Δ ₂ , the number of multiplications can be reduced as compared with the conventional convolution. In addition, using data compression can reduce the amount of data transferred between adjacent nodes to estimate end-to-end delays. In the above case, when Y is a delay to a neighbor node and the maximum value of _Y is D _Y , if the data compression ratio of pmf of Y is Δ _2, the probability value that the neighbor node should pass to calculate the delay distribution over successive nodes The number of Becomes

If Δ _{2 is set} to a constant value, the number of probability values transmitted between neighboring nodes increases as the maximum delay increases. This is undesirable because it means that the end-to-end delay calculation is affected by the degree of delay occurring at each node.

To solve this problem, FIG. 4 proposes an algorithm for determining a data compression ratio based on delay at each node. 4 is a flowchart illustrating an algorithm for calculating a data compression ratio required for approximation calculation of fast convolution. As shown, it is assumed that the number of probability values transferred between nodes is m, and m is also a power of two. Memory is allocated and initialized in an array a [i] that stores all variables and delay distributions used in the algorithm (401). The delay distribution is stored in array a [i] (402). I denotes a delay in unit of cell time, and a [i] denotes a probability that the delay is i cell time. Given the delay distribution, the next finds the maximum delay and stores the value in D _max (403). Since the data compression ratio Δ is always taken as a power of 2, Find the minimum j that satisfies (404,405), When Δ is determined (406), and the data is compressed using the algorithms of Equations 2 and 6, the number of probability values to be transmitted to neighboring nodes does not exceed m.

5 is a block diagram illustrating a delay distribution processor that performs a fast convolution approximation function for two delay distributions. As shown in FIG. 2, the detailed configuration of the delay distribution processor 205 that performs the fast convolution approximation calculation when using the delay accumulation method of ② is shown.

The probability distribution storage device # 1 502 stores a delay distribution of a cell passing through a corresponding output port. At this time, the delay is measured in cell time units, and the occurrence rate is stored for each delay value.

Probability distribution storage # 2 503 receives delay information from an upstream node or a downstream node. The result of the high speed convolution in the controller is stored in probability distribution compressor # 2 (511). When probability distribution storage device # 2 503 receives delay information at an upstream node, probability distribution compressor # 2 511 is connected to a downstream node, and probability distribution storage device # 2 503 receives delay information at a downstream node. Probability distribution compressor # 2 511 is connected to an upstream node.

The probability distribution storage device # 2 503 first receives the delay distribution data compression ratio Δ ₂ at the neighboring node and transmits it to the delta2 block 505. Then, the compressed delay distribution P_ {Y_2 ^ '} calculated by Equations 3 and 6 is obtained. Receive (i) and save.

Probability distribution storage # 1 502 accepts the distribution of delay experienced by the cell going to the corresponding output port of its switch. Using the delay distribution inputted by the probability distribution storage device # 1 502, the DELTA 1 calculation block 504 calculates the data compression ratio Δ using the algorithm of FIG. Increasing Δ increases the speed but decreases the accuracy. If the emphasis is placed on accuracy, the DELTA1 calculation block 504 may always output Δ at a fixed value of 1 instead of the algorithm of FIG. 4.

The probability distribution compressor # 1 generates and stores the compressed delay distribution P_ {X_2 ^ '} (i) using Equations 2 and 6 together with Δ calculated in the DELTA 1 calculation block 504.

The minimum value calculation block 507 calculates the greatest common divisor of Δ calculated in the DELTA 1 calculation block 504 and Δ ₂ stored in the DELTA 2 block 505. If both Δ and Δ ₂ are powers of 2, the maximum common divisor of two numbers is equal to the smaller of the two numbers, so the minimum value calculation block 507 selects the minimum value Δ 'between Δ and Δ ₂ . .

The convolution calculator 508 functions to convolve the compressed delay distributions P_ {X_2 ^ '} (i), P_ {Y_2 ^'} (i). The probability distribution storage device # 3 509 receives the convolution result of the convolution calculator 508 and Δ 'and restores the convolution result by reconstructing the original scale according to equations (4) and (5). Convolution results must be passed back to another neighboring node for end-to-end delay calculations. In order to reduce the amount of data delivered before delivering the result distribution, the DELTA 3 calculation block 510 calculates the data compression ratio Δ ₃ for the delay distribution resulting from the convolution.

Probability distribution compressor # 2 (511) compresses the delay distribution using the algorithms of Equations 2 and 6 with the data compression ratio Δ ₃ received from the DELTA 3 calculation block 510 and then converts the data compression ratio and the compressed cumulative delay distribution to other neighbor nodes. Store for delivery 514.

6 illustrates a delay distribution processor 205 for transmitting a delay distribution of a node and a delay distribution of a neighboring node in nodes except for an end node where all delay distributions are collected when using the delay accumulation method of ①. Is shown in blocks. Like the delay distribution processor 501 of ② described in FIG. 5, the cell delay distribution generated at the corresponding output port of the directly connected switch is stored in the probability distribution storage device # 1 602 and received from the upstream node or the downstream node. Is stored in the probability distribution storage device # 2 (604). In the delay distribution processor 501 of ②, the data compression ratio is separated from the delay information received from the upstream node or the downstream node and stored in the DELTA 2 block 505. However, in the case of the delay distribution processor 601 of ①, high-speed convolution is not performed. Since the data compression ratio is not separated, the data compression rate is stored in the probability distribution storage device # 2 604 together with the probability values of the delay distribution. For the delay distribution stored in the probability distribution storage device # 1 602, the DELTA calculation block 603 calculates the data compression ratio Δ according to the algorithm of FIG. 4, and the probability distribution compressor # 1 605 uses the probability distribution storage device # 1. The delay distribution stored at 602 is compressed at a ratio of Δ according to the algorithms of Equations 2 and 6 to store the compressed delay distribution and Δ.

② The delay distribution processor 501 of the method receives two delay distributions, performs a high-speed convolution, compresses the result, and transmits the calculation result only once. However, the delay distribution processor 601 of the method has two delays. Since each distribution is delivered separately, it is necessary to determine which of the two delayed distributions to deliver first. This role is performed by the scheduler block 606. As a scheduling algorithm, a FIFO (FIRST-IN FIRST-OUT) method in which an early arrival delay distribution is transmitted first may be used. When two delay distributions arrive at the same time, it is considered that the amount of information transmitted from neighboring nodes is generally higher than the delay information generated by directly connected nodes. The ranking and delivery method can be used to minimize the amount of buffer required for probability distribution storage # 2 (604). On the other hand, if you want to reduce the time required by starting high-speed convolution before the delay distribution of each node arrives at the final node where all delay information is collected, the probability of storing the delay information generated from the directly connected switch It is preferable to give the distribution compressor # 1 605 a high priority to first transmit the delay information at a node close to the node performing the convolution.

Intermediate nodes simply transmit the delay distribution occurring in their own node and the delay distribution received from the neighboring node to the call originating node or the destination node, but the delay distribution processor of the last node conballs the delay distribution occurring in the multiple nodes. The structure is more complicated than the intermediate node because it must be rooted.

FIG. 7 is a block diagram illustrating a delay distribution processor 205 that performs a fast convolution approximation function by receiving delay distributions from all nodes at an end node where delay distributions are collected when using the delay accumulation method of ①.

The delay distribution generated at the corresponding output port of the directly connected switch is stored in the probability distribution storage device # 1 of the delay distribution processor 701. The DELTA 1 calculation block 703 determines the data compression ratio Δ according to the algorithm of FIG. 4, and the probability distribution compressor # 1 705 compresses the delay distribution stored in the probability distribution storage device # 1 702 at a ratio of Δ. The compressed delay distribution and compression rate Δ are sent to the selector 706.

When the fast convolution calculation starts, the selector initially selects the result of probability distribution compressor # 1, so the probability distribution storage device # 2 stores the delay distribution that occurred at the last node and the data compression ratio for that delay distribution is DELTA 2 block ( 708). Probability distribution storage device # 3 709 initially receives a delay distribution occurring at the node closest to the last node, and stores the data compression ratio for the distribution in DELTA 3 block 710. The minimum value calculation block 711 then selects the minimum of two data compression rates for the two delayed distributions with fast convolution, and the convolution calculator block 712 performs a convolution operation on the two compressed delayed distributions as a result. Is sent to the probability distribution storage device # 4 713. Accordingly, the probability distribution storage device # 4 713 stores the result of the fast convolution of the delay distribution at the node closest to the delay distribution at the last node and the minimum value of the data compression ratio. Feeding this result back to the selector 706 selects the probability distribution storage device # 4 713 from the second until the convolution is complete. Therefore, the accumulated convolution result is stored in the probability distribution storage device # 4 707 and the delay distribution for the next closest node is transferred from the probability distribution queue QUEUE 704 to the probability distribution storage device # 3 and stored. . As such, the process of performing fast convolution on the cumulative delay distribution stored in the probability distribution storage device # 2 707 and the delay distribution of the next closest node stored in the probability distribution storage device # 3 709 is repeated. The large-to-short delay is approximated. This result is finally stored in probability distribution storage # 4 713.

The present invention has the effect of enabling the estimation of end-to-end delay in a short time by convolving the delay distribution over several nodes at high speed.

In addition, it is possible to reduce the load due to the control information and to shorten the end-to-end delay estimation time by compressing and transferring the delay distribution instead of all of them.

In addition, the present invention can improve call admission control by grasping the current network situation by using the estimated information of end-to-end delay, and can provide useful information even when QoS routing is performed.

Claims (14)

In a system for obtaining end-to-end delay using delay information of each unit node in an ATM network, Each unit node includes a switch for exchanging data traffic; A fast convolution approximation system for end-to-end delay prediction, comprising: a control block connected to the switch and communicating information about a delay between neighboring nodes and calculating a accumulated delay. The method according to claim 1, Each unit node is divided into an end node where delay information is collected and other intermediate nodes, A data link for transferring data traffic between neighboring nodes; A fast convolution approximation system for end-to-end delay prediction, further comprising a control message link for delivering the control message. The method according to claim 2, The control message link may be included in the data link, and may be configured independently of the data link, the fast convolution approximation system for end-to-end delay prediction. The method according to claim 3, If the control message link is included in the data link, high-speed convolution approximation system for the end-to-end delay prediction, characterized in that to distinguish the data cell and the control cell to send only the control cell to the control block. In a system having a plurality of unit nodes including a switch for exchanging data traffic in an ATM network, and a control block connected to the switch and exchanging delay information between neighboring nodes, The control block, the routing information manager for receiving and outputting the delay distribution for each output port in the directly connected switch; A plurality of delay distribution processors that receive a delay distribution from a switch directly connected through the routing information manager and receive a delay distribution from a neighboring node and perform convolution at high speed; A delay information switching block for sending a delay distribution coming from an upstream node to a corresponding delay distribution processor or for conveying a calculation result of the delay distribution processor to a corresponding upstream node, wherein the device is configured to calculate a short-to-end delay. A fast convolution approximation system for end-to-end delay prediction, which receives a delay distribution from a neighbor node, performs fast convolution, and delivers the result to another node. In a system having a plurality of unit nodes including a switch for exchanging data traffic in an ATM network, and a control block connected to the switch and exchanging delay information between neighboring nodes, The control block, A routing information manager for receiving and outputting a delay distribution for each output port from the directly connected switch; Receive a delay distribution from the switch directly connected through the routing information manager and receives a delay distribution from neighboring nodes and delivers each to a call originating node or a destination node or performs fast convolution at a call originating node or a destination node. A plurality of delay distribution processors, A delay information switching block for sending a delay distribution coming from an upstream node to a corresponding delay distribution processor or for delivering a calculation result of the delay distribution processor to a corresponding upstream node, As the device, a fast convolution is performed at a call originating node or a destination node where all delay information is collected, and at other nodes, a fast convolution is performed on all delay information received by the node, including delay information generated at its own node. Fast convolution approximation system for end-to-end delay prediction, characterized by propagation in node direction. The method according to claim 5 or 6, In the routing information manager, routing information is recorded during call setup to determine which delay distributor to send when a delay distribution comes from an upstream node, and to which upstream node to send a delay distribution when a delay distribution comes from a downstream node. A fast convolution approximation system for end-to-end delay prediction, characterized in that it is determined. The method according to claim 5, The delay distribution processor includes a delay distribution compression ratio DELTA calculation block, A minimum value calculation block that calculates the greatest common divisor of the data compression ratios for two delay distributions as the minimum of two numbers; A probability distribution compressor # 1 that compresses the delay distribution in a directly connected switch according to the algorithm A convolution calculator that convolves two delay distributions compressed with Equations 2 and 6, A probability distribution storage device # 3 for restoring and restoring the distribution of the convolution calculation result to the original scale; Probably calculating the convolution of two delay distributions independent of each other by using a probability distribution compressor # 2 which compresses the convolution result again with the algorithms of Equations 2 and 6 before transmitting the convolution result to another node. A fast convolution approximation system for end-to-end delay prediction. The method according to claim 8, The delay distribution processor determines the data compression ratio such that the amount of compressed information is constant based on the maximum value of the delay in order to perform fast convolution calculation or reduce the amount of information transmitted between nodes. Fast Convolution Approximation System for Delay Prediction. The method according to claim 6, The delay distribution processor may include a probability distribution storage device when the delay distribution processor belongs to a node other than the final node where all the delay information is collected. DELTA calculation block, With probability distribution compressor # 1, When delay information from one's own node and delay information from neighboring node arrives, the arrival information is transmitted first with high priority, or with delay information from one's own node with high priority, or from neighboring nodes. A scheduler that prioritizes and delivers the delay information, Compressing the delay information generated at the corresponding output port of the directly connected switch once, and forwards the delay information generated in its own node and the delay information received from the neighboring node to the call originating node or the destination node in the order of arrival. Fast convolution approximation system for end-to-end delay prediction. The method according to claim 6, The delay distribution processor may include a probability distribution storage device when the delay node belongs to a final node where all delay information is collected. DELTA calculation block, A probability distribution QUEUE that stores the delay distributions of all nodes except the call originating node in order between the call originating node and the destination node, starting from the delay distribution of the nearest node, A selector for selecting one of the delay distribution and the accumulated delay distribution at its node; A minimum calculation block for selecting a minimum value between a data compression ratio of the accumulated delay distribution and a data compression ratio of the delay distribution at the nearest node among the nodes not included in the accumulation; With a convolution calculator, A fast convolution approximation system for end-to-end delay prediction, which receives delay distributions from all nodes passing through a call from a call originating node to a destination node, and calculates fast convolution in turn from delay distributions of nearby nodes. In a delay distribution processor that performs a fast convolution approximation function for two delay distributions, Storing the delay distribution of the cell passing through the corresponding output port in the probability distribution storage device # 1; and, Receiving delay information from an upstream node or a downstream node in the probability distribution storage device # 2; Probability distribution compressor # 2 is connected to the upstream node when receiving the delay information from the downstream node, or connected to the downstream node when receiving the delay information from the upstream node; And, Receiving the delay distribution data compression ratio of the neighbor node in the probability distribution storage device # 2 and transmitting the received data in a delta 2 block; Storing the compressed delay distribution calculated by the following equations (2) and (6); Calculating a data compression ratio in a delta 1 calculation block by using a delay distribution input to the probability distribution storage device # 1; and Generating and storing a compressed delay distribution at a compression ratio calculated in the delta 1 block in a first probability distribution compressor; and Calculating a maximum common divisor of the compression rate calculated in the delta 1 block and the compression rate calculated in the delta 2 block in a minimum value calculation block; Convolving the compressed delay distribution in the convolution calculator; and Storing a convolution result by reconstructing the original scale according to the result of the convolution calculator and the following Equations 4 and 5 in probability distribution storage device # 3; and, Calculating a data compression ratio of a delay distribution obtained as a result of the convolution in a delta 3 block to convey the convolution result back to another neighbor node; and Compressing a delay distribution using Equations 2 and 6 by using a data compression ratio received at delta 3 in a second probability distribution compressor; Fast data convolution approximation method for the end-to-end delay prediction comprising the step of delivering the data compression ratio and the compressed cumulative delay distribution to the next neighbor node. In the delay distribution processor for transmitting the delay distribution of the node itself and the delay distribution of the neighbor node, Storing the cell delay distribution generated at the corresponding output port of the directly connected switch in the probability distribution storage device # 1; and, Storing delay information transmitted from an upstream node or a downstream node in a probability distribution storage device # 2; and Calculating a data compression ratio in the delta calculation block using the delay distribution stored in the probability distribution storage device # 1; and Storing the delay distribution and the data compression ratio obtained by compressing the delay distribution stored in the probability distribution storage device # 1 in the probability distribution compressor # 1 according to equations 2 and 6 with a data compression ratio; Determining the transmission order of the two delay distributions in the scheduler block; And a step of transmitting delay distributions according to the determined transmission order. A fast convolution approximation method for end-to-end delay prediction, comprising: In a delay distribution processor that performs a fast convolution approximation function by receiving delay distributions at all nodes, A delay distribution generated at a corresponding output port of a directly connected switch is stored in the probability distribution storage device # 1; and, determining a data compression ratio in a delta 1 calculation block; and Compressing, by the probability distribution compressor # 1, the delay distribution stored in the probability distribution storage device # 1 at a ratio of delta and sending the compressed delay distribution and the compression ratio to the selector; and, Starting a fast convolution calculation; and Selecting a result of the probability distribution compressor # 1 in the selector; and, Storing the delay distribution generated at the last node in the probability distribution storage device # 2; and Storing the compression ratio for the delay distribution in a delta 2 block; Receiving a delay distribution generated at a node closest to a final node in the probability distribution storage device # 3 and storing a data compression ratio of the distribution in a delta 3 block; and, Selecting a minimum value of two data compression ratios for two high-convolutional delay distributions in the minimum calculation block; and Performing a convolution operation on the two compressed delay distributions in the convolution calculator block and transmitting the result to the probability distribution storage device # 4; and, Fast convolution of the delay distribution at the node closest to the delay distribution at the last node in the probability distribution storage # 4, and storing the result and the minimum value of the data compression ratio; Feeding back the results to a selector; and Selecting the probability distribution storage device # 4 from the second time after the feed-back step until the convolution ends from the second time; and, Storing the accumulated convolution result in the probability distribution storage device # 2; and A delay distribution for a nearby node is transmitted from the probability distribution queue to the probability distribution storage device # 3 and stored; and Repeating the fast convolution of the delay distribution accumulated in the probability distribution storage device # 2 and the delay distribution of the next closest node stored in the probability distribution storage device # 3; and, Storing the final result in probability distribution storage # 4; and fast convolution approximation method for end-to-end delay prediction.