KR20020008977A - Device for quantization of image conpression/restoration - Google Patents

Abstract

PURPOSE: A quantizer is provided to reduce quantization error and simplify a circuit configuration, by performing quantization/dequantization functions using one multiplier. CONSTITUTION: A comparison and detection part(20) converts a DCT or IDCT input value(10) into an absolute value and judges a data format of the input value. A ROM table(30) divides a QP value by an inverse number and stores result data. The second multiplexor receives and outputs an output value of the ROM table or the QP value. A multiplier(60) multiplies an output signal of the comparison and detection part(20) and data of the ROM table to quantize and dequantize data. The third multiplexor(70) clamps and encodes an output value of the multiplier when operated as a quantizer. The fourth multiplexor(80) clamps and encodes an output value of the multiplier when operated as a dequantizer. The fifth multiplexor(90) receives and outputs one of output signals of the third and fourth multiplexors.

Description

Quantizer for Compression / Restoration of Image Signals {DEVICE FOR QUANTIZATION OF IMAGE CONPRESSION / RESTORATION}

The present invention relates to a quantizer for compressing and restoring a video signal, and more particularly, to a quantizer for implementing a circuit for performing quantization and inverse quantization through a single multiplier.

In general, a quantization method is widely used as a method of compressing a video signal.

In this case, quantization means a method of reducing a code amount by dividing the entire DCT transform coefficient by a certain value and expressing it as a small number of values.

Rather than using a divider to divide the QP, store the 1 / QP and multiply this value to increase the number of bits to get the correct quantization value.

However, since the method of increasing the number of bits as described above means designing a circuit having a larger data size and a longer calculation time in terms of hardware, it is not desirable to increase the number of bits.

In addition, since the quantizer and the inverse quantizer must be configured separately, it is not efficient in terms of economics.

The present invention devised to solve the above problems is to simplify the circuit configuration by using one multiplier and to reduce the error caused by quantization.

Another object of the present invention is to construct a circuit having the functions of a quantizer and an inverse quantizer.

The present invention for achieving the above object, a comparison detector for converting the input value to an absolute value and determines the format of the data, a first multiplexer for receiving and outputting the value output from the comparison detector, and the value of the QP To multiply or dequantize by multiplying the ROM-table storing 1 / QP and outputting it, the second multiplexer receiving and outputting the output value of the ROM-table, and the value output from the first multiplexer and the second multiplexer. And a third multiplexer that receives, multiplies, and encodes the output of the multiplier when operating with quantization, and makes a two's complement when it is negative, and claps the output of the multiplier when operating with inverse quantization. A fourth multiplexer for making a two's complement and a fifth multiplexer for receiving and outputting an output value of the third or fourth multiplexer. It features.

The present invention is also characterized in that it further comprises a separate DATA PATH when the value of the QP is 1 or 2 or INTRA-DC.

The present invention is also characterized in that the image compression / restore quantizer can operate by quantization or inverse quantization, but cannot operate simultaneously with the two functions.

The present invention is also characterized in that the multiplier stores 1 / QP in a ROM-table and multiplies it by the input value treated as an absolute value.

In the present invention, when storing 1 / QP, when the QP is 3 to 8, the fractional part of 1 / QP is used; when the QP is 9 to 16, the fractional part of 1 / (QPX4) is used; In case of 31, the fractional part of 1 / (QPX8) is stored to reduce the error of operation.

The present invention is also characterized in that it is possible to selectively apply a method of rounding the value obtained through the multiplier and a method of reducing the distortion of data due to quantization among the method of rounding up and storing the 1 / QP value. do.

The present invention is also characterized in that the error due to quantization can be reduced by minimizing the 'maximum quantization error' in selecting the above methods.

In the present invention, the 'maximum quantization error' is an error that indicates the error between the quantization interval and the quantization interval by the quantization equation, and when the error is positive, 1 is subtracted when the error is positive, and negative. It has a value as it is, and when the quantization coefficient is even, the error is negative, and 1 is added.

Figure 1 shows the configuration of the present invention in one embodiment.

2 is a flowchart illustrating a quantization process according to the present invention.

3 is a flowchart illustrating an inverse quantization process in the present invention.

Figure 4 compares the quantization interval by the quantizer and the quantization equation in the present invention using a graph.

Figure 5 shows the maximum quantization error (MAX QUANT ERROR) in one embodiment of the present invention.

* Description of symbols on the main parts of the drawings *

10: input signal 20: comparison detector (BIT-RATE ALLOCATION SIGNAL

30: ROM-TABLE 40: First Multiplexer

50: second multiplexer 60: multiplier (MULTILIER

70: third multiplexer 80: fourth multiplexer

90: fifth multiplexer

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

Figure 1 shows the configuration of the present invention in one embodiment. As shown, the solid line represents the data processing path of the quantization circuit, and the dotted line represents the data processing path of the inverse quantization circuit. The two processes will be described with reference to FIGS. 2 and 3.

A comparison detector 20 which receives the input value 10 to be DCT or IDCT, converts it into an absolute value and determines the data type of the input value, and a ROM table that stores and outputs the data by dividing the QP value by an inverse ( ROM table 30, a second multiplexer which receives an output value of the ROM table or receives a value of QP, and outputs a signal output from the comparison detector 20 and data of the ROM table. A multiplier 60 that multiplies and dequantizes the data by multiplying the received data, and a third multiplexer 70 that receives the output value of the multiplier when the quantization is performed, and clipping and encoding the data to a predetermined level. In case of operating by inverse quantization, the output of the multiplier 60 is input to the fourth multiplexer 80, and the third multiplexer or the fourth multiplexer to clip and encode the data to a predetermined level. It consists of a fifth multiplexer 90 to receive the output value from the output as an input.

2 is a flowchart illustrating a quantization process according to the present invention. As shown, the DCT input value is accepted (S10) to determine whether the input value is INTRA-DC (S11), and if the input value is not intra-DC, it is input to the comparison detector 20 and The comparison detector 20 determines the shape of the data and converts the value to an absolute value (S20). The data is classified into three types. When the data is an INTRA BLOCK (S30), Q / 2 is subtracted from the value output from the comparison detector (S40), and the value is first. It is input to the multiplexer (S50). The data output from the first multiplexer 40 becomes an input of the multiplier 60.

On the other hand, the QP (quantization coefficient) value is also input to the ROM-table together with the data input. In the ROM table, the QP value is stored as 1 / QP, which is the inverse, and the value is received from the second multiplexer and output.

The multiplier 60 receives the 1 / QP value and the output value of the first multiplexer as inputs, multiplies the two values, and outputs quantized data (S60).

A value of 0.125 is added to the value output from the multiplier to take only an integer part (S70) and is input to the third multiplexer 70. The third multiplexer is clipped and encoded according to a predetermined reference (S80), inputted to the fifth multiplexer 90, and the quantized signal is output from the fifth multiplexer (S90), and ends (S100).

If the quantization coefficient is 1 (S33) or 2 (S31), since 1 / QP cannot be stored in the ROM-table, a separate DATA PATH configuration is required without going through the above process, and is input to the third multiplexer. After clapping to a certain level, if it is negative, make it to 2's complement and send it to the fifth multiplexer. In addition, if the input data is intra-DC, the value is divided by 8 and input to the third multiplexer.

In the quantization process, the ROM-table converts QP into 1 / QP and stores 10 bits. In this case, instead of storing 1 / QP as a binary number and storing more than the decimal point as it is, in order to include more significant digits, if the QP is 3-8, the fractional part of the 1 / QP is 9-16. The fractional part of 1 / QP * 4 and the fractional part of 1 / QP * 8 are stored when QP is 17 to 31 so that more accurate division is possible.

3 is a flowchart illustrating an inverse quantization process in the present invention. As shown, if data is input (T10), it is checked whether the data is INTRA-DC (T11), and if it is not intra-DC (INTRA-DC), it is input to the comparison detector 20. The comparison detector converts the data into an absolute value (T20), multiplies the output data by two, adds one again (T30), and then inputs the multiplier 60. On the other hand, the QP is also input to the second multiplexer together with the data input, and the output value is input to the multiplier (T31). The multiplier multiplies the two values to dequantize and output the result (T40). If the output data is even or odd (T50), an odd number is input to the fourth multiplexer as it is, and if it is even, it is converted to an odd number by subtracting 1 from the data (T60) and then input to the fourth multiplexer. In the fourth multiplexer 80, the data is clad, decoded on a predetermined basis, decoded and output (T70), and it is received by the fifth multiplexer and outputted (T80) to end (T90).

If the input signal is an intra-DC, a separate DATA PATH is required. After multiplying the input signal by 8 (T33), the input signal is clad to a predetermined level in the fourth multiplexer, decoded, and transmitted to the fifth multiplexer. (T70).

When rounding the output of the multiplier in the quantization process, 1/8 for QP 3-8, 1/32 for QP 9-16, 1/64 for QP 17-31. In addition, it is implemented by taking the integer part. However, depending on the Q value, it may be more accurate to round up the 1 / QP when storing 10 bits instead of rounding the value from the multiplier, and then not round the value from the multiplier. Therefore, when storing 1 / QP in 10 bits, it is necessary to select a method of storing in round down and rounding the value from the multiplier, and of storing 1 / QP in rounding and not rounding the value from the multiplier.

The criterion for selecting one of the above two methods is to select a value from which the original quantization equation and the value with less error are calculated. If both methods do not produce the same result as the quantization equation, a method with little distortion of data due to quantization should be selected. To this end, a process of selecting the two methods will be described with reference to FIGS. 4 and 5.

Figure 4 compares the quantization interval by the quantizer and the quantization equation in the present invention using a graph. As shown, the error with the quantization interval by the quantization equation is set as 'error'. The horizontal axis of the graph is a value to be quantized, and the vertical axis is a quantized value. The result of the quantizer of the present invention is the upper graph, and the criterion according to the quantization equation is the lower graph. Finding the way the error in the graph is small is the basic selection criterion.

Figure 5 shows the maximum quantization error (MAX QUANT ERROR) in one embodiment of the present invention. As shown, the values described above for the case where QP = 3 are quantized to 1 when the error described above is -1, 0, 1, or 2 are represented by dots. If the values to be quantized occur with the same probability, the error due to quantization / dequantization is as follows.

If ERROR = -1, (4 + 3 + 2 + 1 + 0 + 1) / 6 = 11/6

If ERROR = 0, then (3 + 2 + 1 + 0 + 1 + 2) / 6 = 9/6

If ERROR = 1, then (2 + 1 + 0 + 1 + 2 + 3) / 6 = 9/6

If ERROR = 2, (1 + 0 + 1 + 2 + 3 + 4) / 6 = 11/6

That is, it can be seen that when the errors are 0 and 1, the minimum error is made and when the errors are -1 and 2, the error is larger. In other words, if the error is 1, it is not exactly the same as the quantization equation, but in terms of the error due to quantization, it can be seen that the method according to the quantization equation, that is, when the error is 0, is equivalent. Therefore, when error is -1, it is better to have error 1 than -1, so if Q is odd, subtract 1 if error is positive, and if it is negative, having a value as it is can represent quantization error more accurately. You can see that it is a new variable. Set this variable to the MAX QUANT ERROR. If Q is even, add 1 if the error is negative; if Q is positive, leave the value as it is.

In the quantization process, multiply by 1 / QP The value of this quantization error is taken into account when choosing between a rounding method that adds and a rounding method to store 1 / QP itself.

The present invention has the effect of simplifying the configuration of the circuit by performing a quantization / dequantization function using a single multiplier, and also has the effect of reducing errors due to quantization.

Claims (5)

A comparison detector for converting an input value to an absolute value and determining a format of the data, a first multiplexer for receiving and outputting an output value of the comparison detector, a ROM table for storing and outputting a value of QP as 1 / QP; A second multiplexer for receiving and outputting an output value of the ROM-table, a multiplier for quantizing or inverse quantizing by multiplying the values output from the first multiplexer and the second multiplexer, and receiving the output of the multiplier when operating with quantization A third multiplexer for clapping and encoding, a fourth multiplexer for receiving the output of the multiplier when the quantization is operated in inverse quantization, and a fifth multiplexer for receiving and outputting the output values of the third or fourth multiplexer. Image compression / restore quantizer. The method of claim 1, When storing 1 / QP, the fractional part of 1 / QP when QP is 3-8, the fractional part of 1 / (QPX4) when QP is 9-16, and 1 when QP is 17-31 A quantizer for image compression / restore, characterized in that it stores a fractional part of / (QPX8) to reduce the error of operation. The method of claim 1, Image compression / restore, characterized in that it is possible to selectively apply a method of rounding the value obtained through the multiplier and a method of rounding and storing 1 / QP values when the distortion of data due to quantization is small Quantizer. The method of claim 3, wherein In selecting the above methods, the error due to quantization can be reduced by minimizing the 'maximum quantization error'. The method of claim 4, wherein 'Maximum quantization error' is an error that indicates the error between the quantization interval by the quantization formula and the quantization interval by the quantizer.If the quantization coefficient is odd, 1 is subtracted if the error is positive, and if it is negative, A quantizer for image compression / restore, characterized in that it is obtained by adding 1 when the error is negative when the quantization coefficient is even and having a value as it is when the positive quantization coefficient is positive.