KR20020005872A - Method for measuring overlay of semiconductor device - Google Patents

Abstract

PURPOSE: A method for measuring an overlay of a semiconductor device is provided to minimize an alignment error of a reference key by measuring simultaneously two or more reference keys formed on a wafer. CONSTITUTION: A pattern formation area is formed on a center portion of the first reticle. The first reference pattern is formed on an outside of the pattern formation area. The first reference key(220) is formed on all semiconductor chips of a wafer by performing an exposure process and a development process. A photo-resist is applied on the wafer. A pattern formation area is formed on a center portion of the second reticle. The second reference pattern is formed on an outside of the second reticle. The second pattern is formed on a center of the semiconductor chips formed with the first pattern. The second reference key(230) is formed on an edge of the second pattern. A predetermined layer pattern is formed on a center portion of the third reticle. The third reference pattern is formed on an edge of the third reticle. The third reference key(240) and the third pattern are formed on the semiconductor chips. A location of the third reference key(240) is detected by measuring an X-direction distance and a Y-direction distance.

Description

Method for measuring overlay of semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for measuring a semiconductor device overlay, and more particularly, a preceding thin film formed on a wafer together with the preceding thin film pattern when the subsequent thin film pattern is formed at a designated position in association with the preceding thin film pattern formed in the preceding semiconductor process. The pattern key is enclosed by a subsequent thin film pattern key formed on the wafer together with the subsequent thin film pattern, so that the measurement error between the preceding thin film pattern key and the subsequent thin film pattern key is minimized and at the same time, The present invention relates to a method for measuring a semiconductor device overlay in which measurement is performed, and the area of the wafer is minimized.

Photo process, one of the semiconductor manufacturing processes, allows light to be exposed on a wafer in the form of a predetermined semiconductor thin film pattern in a state in which a photoresist that chemically reacts with light is applied on the wafer so that openings are formed in the shape of the semiconductor thin film pattern in the photoresist. It is a process to make sure.

When forming a precise semiconductor pattern on the wafer through such a photo process, the position of the "reticle", which is a pattern mask that serves to expose light on the wafer in the shape of a thin film pattern, is not a specified position or a wafer In the case where the position of is not in the specified position, if the alignment of the reticle and the wafer is not made correctly due to various reasons, the subsequent semiconductor thin film pattern is not formed at the designated position of the semiconductor thin film pattern formed by the preceding semiconductor process As a result, such a problem means that a semiconductor product loses its original function.

In order to overcome this fatal problem, a unique pattern alignment pattern is formed on every reticle used in the photo process, and the pattern alignment pattern forms a reference key having a thin film pattern shape on the wafer. Do it.

The reference keys formed on the conventional wafer are formed one by one so as not to overlap each other when the reticle is changed, and the wafer on which the reference key is formed is transferred to the overlay measuring equipment to measure / control the position of the reference key, thereby ensuring that the thin film patterns are formed at the designated positions. The position of the reticle and the wafer are feedback controlled according to the result of the measurement and the measurement, so that the thin film pattern is formed at the correct position.

In this case, the reference keys measured by the overlay measuring equipment are formed so as not to overlap each other on the wafer, and are formed one by one each time one thin film is formed and thus are not positioned in the same plane because they are stacked together with the thin film.

For this reason, the reference keys are individually photographed and imaged, and then measurements are performed by reading the images. In other words, any one reference key measures only the X axis while the other reference key measures only the Y axis, and then the data is collected to calculate the measured value.

However, since these reference keys are individually photographed and the measured values are calculated, it takes a very long time to calculate the measured values, and the area occupied by the reference keys on the wafer is gradually increased in proportion to the number of thin film layers. have.

Accordingly, the present invention has conventionally considered such a problem, and an object of the present invention is to simultaneously measure at least two or more reference keys formed on a wafer to minimize the measurement error of the reference key, greatly shorten the measurement time, and This is to minimize the area occupied by the reference key.

Other objects of the present invention will become more apparent from the following detailed description of the invention.

1 is a conceptual diagram conceptually showing a photo equipment according to the present invention.

2A to 4B are process diagrams illustrating a process of forming first, second and third reference keys on a wafer for semiconductor device overlay measurement according to the present invention;

5A is a sectional view taken along the line BB of FIG. 4B.

5B is a cross-sectional view taken along line C-C in FIG. 4B.

6 is an operation explanatory diagram showing a method of measuring an overlay by a first and a second third reference key;

7 is a conceptual diagram showing another embodiment according to the present invention.

The semiconductor device overlay measuring method for realizing the object of the present invention is a first reference of a predetermined shape centering on a reference point formed in a predetermined region of the semiconductor substrate except for the first thin film pattern and the first thin film pattern in the predetermined region of the semiconductor substrate. Forming a key, forming a second reference key having a predetermined shape in a radial shape so as not to overlap with the first thin film pattern around the second thin film pattern and the reference point on the first thin film pattern, and forming the first thin film pattern and the A third reference key is formed inside the third thin film pattern, the first reference key, and the second reference key in association with the second thin film pattern, and is formed at a predetermined position of the first, second, and third reference keys formed on the semiconductor substrate. The distance between the first and second reference keys and the third reference key is measured, and the formation position correction value of the third reference key is calculated based on the distance.

Hereinafter, a more specific embodiment of the semiconductor device overlay measurement method according to the present invention will be described with reference to the accompanying drawings.

1, a photo facility for performing a photo process is conceptually illustrated.

Referring to the accompanying drawings, the photo equipment 600 is a light source 100 for generating light of a predetermined wavelength as a whole, the thin film pattern is formed on the lower portion of the light source 100 and the same thin film pattern to be formed on the wafer 200 The reduced projection lens 400 and the wafer 200 installed at the lower portion of the reticle 300 and the reticle 300 which are formed pattern masks to reduce the light passing through the reticle 300 at a predetermined ratio to irradiate the wafer 200. ) And a wafer chuck (not shown) for adjusting the level of the wafer 200.

The light passing through the light source 100-the reticle 300-the reduction projection lens 400 in the photo facility 600 reaches the wafer 200 to which a photoresist chemically reacts with light is applied to a predetermined thickness. A pattern opening is formed in the photoresist in accordance with the thin film pattern formed on the reticle 300 so as to allow subsequent semiconductor processes to proceed.

More specifically, the reticle 300 forms a transparent pattern in a pattern shape to be formed on the wafer 200 of the chromium plating film 310 in which opaque chromium is plated on a transparent substrate so that light generated from the light source 100 passes. do.

At this time, a unique reference key having a predetermined shape is formed in a portion of the reticle 300 corresponding to the scribe line 211 of the wafer 200.

A method of forming a plurality of reference keys on the wafer 200 by the photo facility 600 having such a configuration and measuring the reference keys in a semiconductor device overlay measurement facility (not shown) is shown in FIGS. 2A to 6. Referring to the following.

In a preferred embodiment, in the present invention, two first and second reference keys are formed on the wafer in the preceding semiconductor process, and one third reference key is formed on the wafer in the subsequent semiconductor process. The key serves as a measurement reference and the third reference key is the measurement object.

Hereinafter, a method of forming and measuring the first reference key, the second reference key, and the third reference key by the overlay measurement facility will be described.

In FIG. 2A, reference numeral 310 is a first reticle used in the preceding semiconductor process, and a pattern formation region for forming a predetermined thin film pattern on the wafer 200 in a center portion except for an edge of the first reticle 310 ( 315 is formed, and a first reference pattern 320 is formed at a predetermined position outside of the pattern formation region 315 and spaced at both sides of the reference point A shown in FIG. 2A and parallel to the defined Y axis.

At this time, in a preferred embodiment, two first reference patterns 320 are paired as shown in a bar shape having a short length.

In this case, the first reference pattern 320 may be formed on at least one corner of four corners of the first reticle 310. In the present invention, all of the first reference patterns 320 are formed at four corners of the first reticle 310.

As shown in FIG. 1 by the first reticle 310, after exposure is performed on the wafer 200 to develop a photoresist, a predetermined semiconductor thin film process is performed to thereby process the wafer as shown in FIG. 2B. The first reference key 220 having the same shape as the position of the first pattern 215 and the first reference pattern 320 formed on the first reticle 310 is formed in all the semiconductor chips 210 formed in the 200. .

Subsequently, after a predetermined semiconductor thin film process is performed on the semiconductor chip 210 on which the first pattern 215 is formed, photoresist is applied to the wafer 200 again, and once again by the second reticle 330 shown in FIG. 3A. The exposure proceeds.

In this case, when a predetermined pattern region 335 is formed at the center except for the edge of the second reticle 330, and overlaps with the first reticle 310 at the outside of the second reticle 330, the attached reticle 330 is illustrated in FIG. 3A. As described above, the second reference pattern 340 is formed to be spaced apart from each other by a predetermined distance to both sides of the reference point B formed at the same position as the reference point A of the first reticle 310 and parallel to the defined X axis.

In this case, like the first reference pattern 320, two second reference patterns 340 may form a pair in a bar shape.

After exposure is performed in this state, when a predetermined thin film process is performed, as shown in FIG. 3B, a second pattern 225 is formed at the center of the semiconductor chip 210 on which the first pattern 215 is formed. The second reference key 230 having the same shape as the second reference pattern 340 is formed at the edge of the second pattern 225.

The first reference key 220 and the second reference key 230 formed in such a manner and shape serve as a measurement reference for the third reference key to be described later, and at the same time, the third reference key is designated by one measurement. It is possible to measure how much error has occurred.

Thereafter, photoresist is applied to the wafer 200 again, and exposure is performed once again by the third reticle 345 illustrated in FIG. 4A.

In this case, a predetermined thin film pattern 355 is formed at the center portion excluding the edge of the third reticle 345, and a third reference pattern 350 is formed at the edge of the third reticle 345.

More specifically, when the first and second reticles 310 and 320 overlap the third reticle 345, the reference point C is located at the same position as the reference point A of the first reticle 310 and the reference point B of the second reticle 330. The third reference pattern 350 is formed at a position spaced apart from the reference point C by a predetermined distance.

At this time, the position of the third reference pattern 350 is positioned at a predetermined position inside the regions formed by the first and second reference patterns 320 and 340. As shown in FIG. 4B, the third reticle 345 is shown. In the semiconductor chip 210, the third reference key 240 and the third pattern 235 are formed by a semiconductor thin film process.

In an embodiment, first, second, and third patterns 215, 225, and 235 and first, second, and third reference keys 220, 230, and 240 are formed on the semiconductor chip 210 by three semiconductor processes.

The first, second, and third reference keys 220, 230, and 240 are structurally described with reference to FIGS. 4B to 5B.

In the bottom of FIG. 5B, the first reference key 220 is shown with an interval between L ₁ in one embodiment, and as shown in FIG. 5A, an upper part of the first reference key 220 is shown. For example, a second reference key 230 having a narrower gap than L ₁ and a gap of L ₂ formed between L ₁ is formed, and as shown in FIG. 5A, an upper portion of the second reference key 230 is formed. is formed with a third reference key 240 were to have a narrow gap between than L ₂ formed between the L _2.

The semiconductor chip 210 having the first to third reference keys 220, 230, and 240 having the above structure is transferred to an overlay measurement facility (not shown), and then a third reference key for the first and second reference keys 220, 230 is provided. The position of 240 is measured.

Thereafter, the position of the third reference key 240 with respect to the first and second reference keys 220 and 230 is compared with a predetermined value, and the result is feedback-controlled.

Hereinafter, the measuring method by the overlay measuring equipment will be described.

First, when the measurement target wafer 200 is transferred to the overlay measurement facility, as shown in FIGS. 5B and 6, the focus of the image capturing apparatus is focused on the center of the third reference key 240, and the image is photographed. The X-direction distance between the predetermined position of the first reference key 220 and the predetermined position of the third reference key 240 is measured, and the predetermined position of the second reference key 230 and the predetermined position of the third reference key 240 are measured. The distance in the Y direction between is measured.

In this manner, the first reference key 220 to the third reference key 240 can be measured at one time.

The position of the third reference key 240 is read by the X direction distance and the Y direction distance measured in this manner.

At this time, it is determined whether the position of the third reference key 240 is corrected based on the read position of the third reference key 240.

In detail, the third reference key 240 should be formed at the position of the hatched portion of FIG. 6, but the third reference key 240 is spaced a predetermined distance in the X and Y directions from the position designated by various variables. In this case, distances in the X and Y directions to be corrected are calculated from the positions of the third reference keys 240.

When the position to be corrected is calculated, the semiconductor thin film process may reflect the same, and the subsequent semiconductor thin film process may perform a more accurate and accurate photo process.

In FIG. 7, another embodiment according to the present invention is illustrated. In the above-described embodiment, the first and second reference keys 220 and 230 use two bars spaced apart from each other by a predetermined distance. In the example, four first reference keys 220 are configured to have a predetermined area, four second reference keys 230 are also configured to be four, and are formed inside the first reference key 220. Since the third reference key 240 is formed at a predetermined position inside the 230, the embodiment of FIG. 7 may also have the same effect as the above-described embodiment, which is performed every time a semiconductor process is performed. Has the advantage of checking whether the pattern is corrected.

As described in detail above, the measurement time required for measuring pattern alignment defects by using the reference key is greatly reduced, the space required for forming the reference key in the wafer is reduced, and the pattern position by one measurement process. Whether or not is calculated, and has a variety of effects, such as minimizing the measurement error.

Claims (3)

Forming a first reference key having a predetermined shape around a reference point formed in a predetermined region of the semiconductor substrate except for the first thin film pattern and the first thin film pattern in a predetermined region of the semiconductor substrate; Forming a second reference key having a predetermined shape in a radial shape on the first thin film pattern such that the second thin film pattern and the reference point do not overlap with the first thin film pattern; Forming a third reference key inside the third thin film pattern, the first reference key and the second reference key in association with the first thin film pattern and the second thin film pattern; Measuring a distance between the first, second reference key and the third reference key at a predetermined position of the first, second, and third reference keys formed on the semiconductor substrate; And calculating a position correction value of the third reference key based on the distance. The semiconductor device of claim 1, wherein the first reference key is formed in a bar shape on both sides of a reference point formed at a predetermined position of the semiconductor substrate, and the second reference key is perpendicular to the first reference key with respect to the reference point. And a third reference key formed in an area formed by the first and second reference keys. The semiconductor device of claim 1, wherein a plurality of first reference keys are formed on a radiation basis based on a reference point formed at a predetermined position of the semiconductor substrate, and the second reference keys surround the first reference key based on the reference point. And a plurality of third reference keys are formed in regions formed by the first and second reference keys.