KR200157889Y1 - Inductor laminated system for exothermic protection - Google Patents

Inductor laminated system for exothermic protection Download PDF

Info

Publication number
KR200157889Y1
KR200157889Y1 KR2019930025156U KR930025156U KR200157889Y1 KR 200157889 Y1 KR200157889 Y1 KR 200157889Y1 KR 2019930025156 U KR2019930025156 U KR 2019930025156U KR 930025156 U KR930025156 U KR 930025156U KR 200157889 Y1 KR200157889 Y1 KR 200157889Y1
Authority
KR
South Korea
Prior art keywords
oscillation circuit
inductor
ceramic substrate
pcb
heat generation
Prior art date
Application number
KR2019930025156U
Other languages
Korean (ko)
Other versions
KR950016066U (en
Inventor
김영신
Original Assignee
이형도
삼성전기주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이형도, 삼성전기주식회사 filed Critical 이형도
Priority to KR2019930025156U priority Critical patent/KR200157889Y1/en
Publication of KR950016066U publication Critical patent/KR950016066U/en
Application granted granted Critical
Publication of KR200157889Y1 publication Critical patent/KR200157889Y1/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)

Abstract

본 고안은 발열방지를 위한 인덕터 적층구조에 관련한다.The present invention relates to an inductor stack structure for heat generation.

종래에는 PCB(3)에 인덕터(1)가 부착된 발진회로가 형성되어 발진회로 외부에 있는 능동소자의 발열로 인한 열전도현상으로 발진회로의 발진주파수가 변동되는 문제점이 발생하였다.In the related art, an oscillation circuit having an inductor 1 attached to the PCB 3 is formed, and thus, an oscillation frequency of the oscillation circuit is changed due to heat conduction due to heat generation of an active element outside the oscillation circuit.

본 고안은 세라믹기판(4)의 발진회로 형성부위(2)밑면에는 저항(R)과 트랜지스터(Tr)및 커패시터(C)등 인덕터를 제외한 발진회로 구성소자를 부착하고, 상기 세라믹기판(4)의 발진회로 형성부위(2) 윗면에는 인덕터(1)를 부착하며, 상기 세라믹 기판(4)은 지지핀(a,b)과 원통형보스로 PCB(3)에 고정되어 발진회로 주위에 있는 능동소자의 발열로 발진회로에 미치는 영향이 극미해져 온도변화에 따른 발진주파수의 변동을 극소화할 수 있다.According to the present invention, an oscillation circuit component other than an inductor such as a resistor (R), a transistor (Tr), and a capacitor (C) is attached to the bottom of the oscillation circuit forming portion 2 of the ceramic substrate 4, and the ceramic substrate 4 The inductor 1 is attached to the upper surface of the oscillation circuit forming portion 2 of the ceramic substrate 4, and the ceramic substrate 4 is fixed to the PCB 3 by the support pins a and b and a cylindrical boss and is formed around the oscillation circuit. The effect of heat generation on the oscillation circuit is minimized, which minimizes the fluctuation of oscillation frequency due to temperature change.

Description

발열방지를 위한 인덕터 적층구조Inductor stack structure to prevent heat generation

제1도는 종래의 인덕터 적층구조를 도시한 구조도.1 is a structural diagram showing a conventional inductor stack structure.

제2도는 본 고안에 따른 인덕터 적층구조를 도시한 구조도.2 is a structural diagram showing an inductor stacked structure according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 인덕터 2 : 발진회로 형성부위1: inductor 2: oscillation circuit forming part

3 : 인쇄회로기판(PCB) 4 : 세라믹기판3: printed circuit board (PCB) 4: ceramic board

a,b : 지지핀 5 : 원통형보스a, b: support pin 5: cylindrical boss

본 고안은 발열방지를 위한 인덕터 적층구조에 관한 것으로, 이는 특히 인쇄회로기판(이하, "PCB"라함)의 상측으로 세라믹기판을 원통형보스를 개재하여 착설 시킨후 구성된 발진회로 상측으로 인덕터를 적층함으로써, 발열에 따른 튜너등의 주파수 변동을 최소화하여 발진회로 특성이 향상될 수 있도록 한 발열방지를 위한 인덕터 적층구조에 관한 것이다.The present invention relates to an inductor stack structure for preventing heat generation, and in particular, by placing a ceramic substrate on the upper side of a printed circuit board (hereinafter referred to as "PCB") through a cylindrical boss and stacking the inductor on the upper side of the oscillation circuit configured. In addition, the present invention relates to an inductor stack structure for preventing heat generation to improve oscillation circuit characteristics by minimizing frequency fluctuations such as tuners caused by heat generation.

일반적으로 튜너에 적용되는 발진회로는 믹서로 발진주파수를 출력하여 안네타로 공급된 RF신호와 믹싱하여 IF신호를 만든다. 따라서 발진회로는 정확한 발진주파수로 출력됨이 요구된다.In general, the oscillator circuit applied to the tuner outputs the oscillation frequency to the mixer and mixes with the RF signal supplied to the antenna to make the IF signal. Therefore, the oscillator circuit is required to be output at the correct oscillation frequency.

제1도는 종래의 발진회로 인덕터의 적층구조를 도시한 것으로서, PCB(3)위로 구현되는 발진회로 형성부위(2)에 저항(R), 트랜지스터(Tr)및, 커패시터(C)들을 실장시키고, 상기 발진회로 형성부위(2)의 상측으로 인덕터(1)를 PCB(3)에 적층시키는 구조로 이루어 지며, 이와 같은 종래의 발진회로 인덕터 적층구조에 있어서는, 발진회로 자체의 내부적인 발열과 PCB기판에 있는 능동소자의 발열에 민감하게 작용하며, 이때 도면에는 도시 하지 않았지만 상기 각 부품(R)(Tr)(C)들이 실장되어 구현된 발진회로 형성부위(2)는 적층된 인덕터(1)와 접속선(미도시)으로서 전기적으로 접속토록 된다.FIG. 1 illustrates a stack structure of a conventional oscillation circuit inductor. The resistor R, the transistor Tr, and the capacitors C are mounted on the oscillation circuit forming portion 2 implemented on the PCB 3, The inductor 1 is laminated on the PCB 3 on the upper side of the oscillation circuit forming portion 2. In the conventional oscillation circuit inductor stacking structure, the internal heat generation of the oscillation circuit itself and the PCB substrate are performed. Although not shown in the drawing, the oscillation circuit forming portion 2 implemented by mounting the respective components R, Tr, and C, is not shown in the drawing. It is electrically connected as a connecting line (not shown).

그러나, 상기와 같은 종래의 발진회로 인덕터 적층구조에 있어서는, 제1도에서 도시한 바와 같이, 발진회로 형성부위(2)가 PCB(3)상에 직접 실장된 각부품(R)(Tr)(C)과 인덕터(1)에 의해 구현됨으로 인하여, 각 부품(R)(Tr)(C)와 PCB(3)에서의 발열에 따라 발진회로에서 출력하는 발진주파수가 주변온도의 상승으로 손쉽게 변동되는 문제점이 있었다.However, in the conventional oscillation circuit inductor stack structure as described above, as shown in FIG. 1, each component R (Tr) (with which the oscillation circuit forming portion 2 is mounted directly on the PCB 3 ( C) and the inductor 1, the oscillation frequency output from the oscillation circuit is easily changed by the increase of the ambient temperature according to the heat generated in each component (R) (Tr) (C) and PCB (3). There was a problem.

또한, 도면에는 도시하지 않았지만, 상기 PCB(3)의 발열 문제를 피하도록 열전도성이 양호한 철판을 사용할 경우에는 어느정도 발열에 따른 주파수 변동을 감소시킬 수 있지만 제조원가가 상승되는 문제점들이 있었다.In addition, although not shown in the drawings, in order to avoid the heat generation problem of the PCB (3) when using a good thermal conductivity iron plate can reduce the frequency fluctuations due to heat to some extent there were problems that the manufacturing cost is increased.

본 고안은 상기와 같은 종래의 여러 문제점들을 개선시키기 위하여 안출된 것으로서 그 목적은, PCB의 상측으로 세라믹기판을 원통형보스를 개재하여 착설시킨후 구성된 발진회로 상측으로 인덕터를 적층하여, 손쉽게 발열되는 PCB패턴과 세라믹 기판의 발진회로를 서로 분리함으로써, PCB와 각 능동소자들의 발열에 따른 온도변화로 인한 튜너등의 주파수 변동을 최소화하여 발진회로 특성이 향상될 수 있도록 한 발열방지를 위한 인덕터 적층구조를 제공하는 데에 있다.The present invention has been made in order to improve the various problems as described above, the purpose is to install an inductor on the upper side of the oscillator circuit configured after mounting the ceramic substrate through the cylindrical boss on the upper side of the PCB, the PCB is easily generated By separating the oscillation circuit of the pattern and the ceramic substrate from each other, the inductor stack structure is prevented to minimize the frequency variation of the tuner and the like due to the temperature change caused by the heating of the PCB and each active element so that the oscillation circuit characteristics can be improved. To provide.

상기와 같은 목적을 달성하기 위한 기술적인 수단으로서 본고안, PCB상에 착설된 원통형보스의 상측으로 세라믹기판이 안착되어 지지핀으로서 상기 PCB와 일체로 고정되며, 상기 세라믹기판의 밑면에는 발진회로의 형성부위를 구현토록 저항 (R),트랜지스터(Tr)및 커패시터(C)들의 발진회로 구성소자들이 실장되며, 상기 세라믹기판의 발진회로 형성부위 상측으로 인더터가 적층되어 발열에 의한 주파수 변동을 감소토록 한 구성으로 이루어진 발열방지를 위한 인덕터 적층구조를 마련함에 의한다.As a technical means for achieving the above object, the ceramic board is seated on the upper side of the cylindrical boss mounted on the PCB, and is integrally fixed to the PCB as a support pin. The oscillation circuit components of the resistor (R), transistor (Tr), and capacitors (C) are mounted to implement the formation site, and an inverter is stacked above the oscillation circuit formation site of the ceramic substrate to reduce frequency fluctuation due to heat generation. By providing an inductor laminated structure for the heat generation made of a configuration.

이하, 첨부된 도면에 의거하여 본 고안의 실시예를 상세하게 설명하면 다음과같다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

제2도는 본 고안에 따른 발열방지를 위한 인덕터 적층구조를 도시한 구조도로서, 열전도성이 양호한 세라믹기판 (4)의 밑면에 저항(R), 트랜지스터(Tr)및 커패시터(C)들과 같은 발진회로 구성소자들을 부착하여 발진회로 형성부위(2)를 구성한다. 이때, 상기 세라믹기판(4)의 상측으로 인덕터(1)를 적층 실장시키어 발진회로를 형성시키고, 상기 세라믹 기판(4)은 PCB(3)상에 착설되는 원통형보스(5)상에 안착된 후, 상기 원통형보스(5)의 내부 양측을 통하여 삽입되면서 PCB(3)에 결합되는 지지핀(a),(b)으로서 일체로 고정된다.2 is a structural diagram showing an inductor stack structure for preventing heat generation according to the present invention, and oscillations such as resistors R, transistors Tr, and capacitors C are formed on the bottom surface of the ceramic substrate 4 having good thermal conductivity. Circuit components are attached to form the oscillation circuit forming portion 2. At this time, the inductor 1 is stacked on the ceramic substrate 4 to form an oscillation circuit, and the ceramic substrate 4 is mounted on the cylindrical boss 5 mounted on the PCB 3. It is inserted into both sides of the cylindrical boss (5) and is fixed integrally as support pins (a), (b) coupled to the PCB (3).

한편, 도면에는 도시하지 않았지만, 상기 세라믹기판(4)의 발진회로 형성부위(2)와 PCB(3)에 형성된 각각의 회로(패턴)(미도시)는 전기적으로 접속되어야 하므로 접속선(미도시)으로서 서로 연결 접속되어 전기적으로 통하게 된다.On the other hand, although not shown in the drawings, the circuit (pattern) (not shown) formed on the oscillation circuit forming portion 2 of the ceramic substrate 4 and the PCB 3 should be electrically connected, so the connection line (not shown) Are connected to each other and communicate electrically.

따라서, 제1도에서와 같이, 종래의 PCB (3)상에 직접 발진회로 구성소자(R)(Tr)(C)들을 실장하고 그 위로 인덕터(1)를 적층시키어 발진회로를 구현하는 경우에는 PCB(3)와 발진회로에서의 발열에 의하여 손쉽게 주파수변도이 발생되는 데, 제2도에서와 같이, PCB(3)상측으로 원통형보스(5)상에 고정된 세라믹기판(4)에 발진회로를 구현함으로써, PCB(3)와 각 부품(R)(Tr)(C)에서 발생하는 발열에 따른 발진회로의 손쉬운 주파수 변동을 서로 격리시키고 열전도성이 양호한 세라믹기판에 의해 효율적으로 방지하는 한편, PCB(3)대신 별도의 열 전도성이 양호한 철판사용을 피할 수 있어 제조원가의 상승도 방지되는 것이다.Therefore, as shown in FIG. 1, when the oscillation circuit is implemented by mounting the oscillation circuit components R (Tr) (C) directly on the conventional PCB 3 and stacking the inductor 1 thereon. Frequency variation is easily generated by heat generation in the PCB 3 and the oscillation circuit. As shown in FIG. 2, the oscillation circuit is mounted on the ceramic substrate 4 fixed on the cylindrical boss 5 above the PCB 3. By realizing this, easy frequency fluctuations of the oscillation circuit caused by the heat generated from the PCB 3 and each component R (Tr) (C) are isolated from each other and efficiently prevented by a ceramic substrate having good thermal conductivity. Instead of the PCB (3), it is possible to avoid the use of an iron plate having good thermal conductivity, thereby preventing a rise in manufacturing cost.

이와 같은 본 고안인 발열방지를 위한 인덕터 적층구조에 의하면, 손쉽게 발열되는 PCB패턴과 세라믹 기판의 발진회로를 서로 분리함으로써, PCB와 각 능동소자들의 발열에 따른 온도변화로 인한 튜너등의 주파수 변동을 최소화하여 발진회로 특성이 향상되는 효과가 있는 것이다.According to the inductor stack structure for preventing heat generation according to the present invention, by separating the oscillating circuit of the PCB pattern and the ceramic substrate which are easily generated from each other, the frequency variation of the tuner or the like due to the temperature change due to the heat generation of the PCB and each active element is eliminated. Minimize the effect of improving the oscillator circuit characteristics.

Claims (1)

인덕터 적층구조에 있어서, PCB(3)상에 착설된 원통형보스(5)의 상측으로 세라믹기판(4)이 안착되어 상기 원통형보스(5)의 내부 양측을 통하는 지지핀(a)(b)으로서 상기 PCB(3)와 일체로 고정되며, 상기 세라믹기판(4)의 밑면에는 발진회로 형성부위(2)를 구현토록 저항(R), 트랜지스터(Tr)및 커패시터(C)들의 발진회로 구성소자들이 실장되며, 상기 세라믹 기판(4)의 발진회로 형성부위(2)상측으로 인덕터(1)가 적층되어 발열에 의한 주파수 변동을 감소시키는 구조로 이루어 지는 것을 특징으로 하는 발열방지를 위한 인덕터 적층구조.In the inductor stack structure, the ceramic substrate 4 is seated on the upper side of the cylindrical boss 5 mounted on the PCB 3, and is provided as a support pin (a) (b) passing through both sides of the cylindrical boss 5. An oscillating circuit component of resistors R, transistors Tr, and capacitors C is formed on the bottom surface of the ceramic substrate 4 so as to form an oscillation circuit forming portion 2. The inductor stack structure of claim 1, wherein the inductor (1) is stacked on the oscillation circuit forming portion (2) of the ceramic substrate (4) to reduce the frequency fluctuation caused by the heat generation.
KR2019930025156U 1993-11-26 1993-11-26 Inductor laminated system for exothermic protection KR200157889Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019930025156U KR200157889Y1 (en) 1993-11-26 1993-11-26 Inductor laminated system for exothermic protection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019930025156U KR200157889Y1 (en) 1993-11-26 1993-11-26 Inductor laminated system for exothermic protection

Publications (2)

Publication Number Publication Date
KR950016066U KR950016066U (en) 1995-06-19
KR200157889Y1 true KR200157889Y1 (en) 1999-10-01

Family

ID=19368860

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019930025156U KR200157889Y1 (en) 1993-11-26 1993-11-26 Inductor laminated system for exothermic protection

Country Status (1)

Country Link
KR (1) KR200157889Y1 (en)

Also Published As

Publication number Publication date
KR950016066U (en) 1995-06-19

Similar Documents

Publication Publication Date Title
US7345552B2 (en) Constant temperature type crystal oscillator
JP4426375B2 (en) Highly stable crystal oscillator using a thermostatic chamber
JP4629760B2 (en) Constant temperature crystal oscillator
US4719384A (en) Miniature thermostatted oscillator
US20080224786A1 (en) Apparatus and method for temperature compensating an ovenized oscillator
US5867069A (en) Orthogonally mounted substrate based resonators
KR200157889Y1 (en) Inductor laminated system for exothermic protection
JP4273948B2 (en) Highly stable piezoelectric oscillator
KR20030055681A (en) Teperature compensated crystal oscillator and method for manufacturing the same
JP2005167507A (en) Surface-mounting piezoelectric oscillator
CA2231841C (en) Oscillator for digital atv signals having low phase noise
JP2553807Y2 (en) Oscillator
JP2008205886A (en) Highly stable piezoelectric oscillator
JP2553083Y2 (en) Hybrid integrated circuit device
JP2623742B2 (en) Abnormal resonance prevention printed circuit board
JPH09102749A (en) Radio transmitter device
JPS6259482B2 (en)
JP2594854Y2 (en) Terminal arrangement of mixed / local oscillation IC
JPH054299Y2 (en)
JPH04324704A (en) Crystal oscillator
JPS6134743Y2 (en)
JPH08293739A (en) Mounting structure for temperature detection element for power amplifier circuit
JPH0611603Y2 (en) Microstrip resonator
Elliott Surface mount ceramic resonators
JP2000077940A (en) Piezo-oscillator

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
REGI Registration of establishment
LAPS Lapse due to unpaid annual fee