KR200155242Y1 - Polishing apparatus for semiconductor manufacturing process - Google Patents
Polishing apparatus for semiconductor manufacturing process Download PDFInfo
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- KR200155242Y1 KR200155242Y1 KR2019960025585U KR19960025585U KR200155242Y1 KR 200155242 Y1 KR200155242 Y1 KR 200155242Y1 KR 2019960025585 U KR2019960025585 U KR 2019960025585U KR 19960025585 U KR19960025585 U KR 19960025585U KR 200155242 Y1 KR200155242 Y1 KR 200155242Y1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B53/00—Devices or means for dressing or conditioning abrasive surfaces
- B24B53/017—Devices or means for dressing, cleaning or otherwise conditioning lapping tools
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Abstract
본 고안은 웨이퍼 뒷면 연마공정에서 거친면을 연마하는 제1연마부와 연마된 웨이퍼를 이차적으로 미세하게 연마하는 제2연마부를 구비하는 반도체 제조장비를 연마장치에 있어서, 제2연마부와 폭이 제1연마부 폭이 1/2배로 형성되는 반도체 제조장비의 연마장치에 관한 것이다.The present invention is a polishing apparatus for a semiconductor manufacturing apparatus having a first polishing portion for polishing a rough surface and a second polishing portion for secondly polishing a polished wafer in a wafer backside polishing process. It relates to a polishing apparatus of a semiconductor manufacturing equipment, the width of the first polishing portion is formed 1/2 times.
Description
제1도의 (a)는 종래기술에 따른 제1, 제2연마부가 구비된 반도체 제조장비의 연마장치의 단면도이고,Figure 1 (a) is a cross-sectional view of the polishing apparatus of the semiconductor manufacturing equipment provided with the first and second polishing parts according to the prior art,
제1도의 (b)는 종래기술에 따른 반도체 제조장비의 연마장치에 있어서, 제2연마부 및 이 제2연마부에 구비된 제2연마면의 저면을 보인 도면이고,(B) of FIG. 1 is a view showing a bottom surface of a second polishing portion and a second polishing surface provided in the second polishing portion in the polishing apparatus of the semiconductor manufacturing equipment according to the prior art,
제2도는 본 고안에 따른 반도체 제조장비의 연마장치에 있어서, 제2연마부 및 제2연마부에 구비된 제2연마면의 저면을 보인 도면이다.2 is a view showing a bottom surface of a second polishing surface provided in the second polishing portion and the second polishing portion in the polishing apparatus of the semiconductor manufacturing equipment according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
10, 20 : 웨이퍼척 A, A' : 웨이퍼10, 20: wafer chuck A, A ': wafer
11 : 제1연마부 13, 23 : 제2연마부11: first polishing part 13, 23: second polishing part
12 : 제1연마부 14, 24 : 제2연마면12: first polishing unit 14, 24: second polishing surface
본 고안은 웨이퍼 뒷면의 연마 공정을 진행시키기 위한 반도체 제조장비의 연마장치에 관한 것으로, 특히 웨이퍼 뒷면과 연마부의 연마면 사이에 발생되는 접촉마찰을 줄일 수 있는 반도체 제조장비의 연마장치에 관한 것이다.The present invention relates to a polishing apparatus of a semiconductor manufacturing equipment for carrying out the polishing process of the back surface of the wafer, and more particularly to a polishing apparatus of the semiconductor manufacturing equipment that can reduce the contact friction generated between the back surface of the wafer and the polishing surface of the polishing portion.
제1도의 (a)는 종래기술에 따른 제1, 제2연마부가 구비된 반도체 제조장비의 연마장치의 단면도이고, 제1도의 (b)는 종래기술에 따른 반도체 제조장비의 연마장치에 있어서, 제2연마부 및 이 제2연마부에 구비된 제2연마면의 저면을 보인 도면이다.Figure 1 (a) is a cross-sectional view of the polishing apparatus of the semiconductor manufacturing equipment equipped with the first and second polishing parts according to the prior art, Figure 1 (b) is a polishing apparatus of the semiconductor manufacturing equipment according to the prior art, The bottom surface of the 2nd polishing part and the 2nd polishing surface provided in this 2nd polishing part is shown.
종래의 반도체 제조장비의 연마장치는 제1도의 (a)와 같이, 몸체(1)와, 몸체(1) 하부에 각각 형성된 제1, 2연마부(11)(13)로 구성된다.The polishing apparatus of the conventional semiconductor manufacturing equipment is composed of a body 1 and first and second polishing parts 11 and 13 formed under the body 1, as shown in FIG.
제1연마부(11)는 웨이퍼 뒷면(소자가 형성된 면의 이면)의 거친 부분을 1차적으로 연마시키기 위한 것으로, 그 저면에는 360매시(mash)인 다야몬드입자와 아교를 섞어 만든 제1연마면(14)이 일정간격으로 다수개 형성되어 있다.The first polishing portion 11 is primarily for polishing the rough portion of the back surface of the wafer (the back surface of the device on which the device is formed), and the first polishing material is made by mixing diamond particles and glue, which is 360 mash on the bottom surface. A plurality of faces 14 are formed at regular intervals.
제2연마부(13)는 1차 연마가 진행된 웨이퍼를 미세하게 2차로 연마시키기 위한 것으로, 그 저면에는 2000매시의 다야몬드입자와 아교를 섞어 만든 제2연마면(14)이 일정간격으로 다수개 형성되어 있다.The second polishing portion 13 is for finely polishing the wafer subjected to the first polishing finely, and the second polishing surface 14, which is made by mixing 2000 diamond particles and glue, has a plurality of at regular intervals. Dogs are formed.
상기 구성을 갖는 종래의 반도체 제조장비의 연마장치를 이용하여 웨이퍼 뒷면을 연마시키는 과정을 설명하면 다음과 같다.Referring to the process of polishing the back side of the wafer using a polishing apparatus of a conventional semiconductor manufacturing equipment having the above configuration as follows.
제1도의 (a)와 같이, 웨이퍼(A)가 안착된 웨이퍼척(10) 상부에는 종래기술에 따른 연마장치가 준비되며, 연마장치가 고속회전하면서 서서히 웨이퍼(A)에 접촉되어 연마공정이 실시된다. 웨이퍼(A)는 웨이퍼척(10)상에서 그 뒷면이 연마장치와 마주보도록 놓여져 있다.As shown in FIG. 1A, a polishing apparatus according to the related art is prepared on the wafer chuck 10 on which the wafer A is seated, and the polishing apparatus is gradually brought into contact with the wafer A while rotating at a high speed, thereby completing the polishing process. Is carried out. The wafer A is placed on the wafer chuck 10 so that the rear surface thereof faces the polishing apparatus.
먼저, 제1연마부(11)의 제1연마면(12)을 이용하여 웨이퍼 뒷면의 거친면을 연마하는 1차 연마공정이 행해지며, 1차 연마 공정에서는 790㎛ 정도의 두께를 갖는 웨이퍼를 310㎛ 까지 연마시키며, 접촉마찰을 줄이기 위해 웨이퍼의 1/2만 제1연마면과 접촉되도록 한다. 이 때, 제1연마부(11)는 웨이퍼(A) 상에서 보통 4,800RPM으로 고속회전되면서 1차 연마 공정을 진행시킨다.First, a first polishing process of polishing the rough surface of the back surface of the wafer using the first polishing surface 12 of the first polishing portion 11 is performed. In the first polishing process, a wafer having a thickness of about 790 μm is formed. Abrasion is performed up to 310 mu m, and only half of the wafer is in contact with the first polishing surface to reduce contact friction. At this time, the first polishing unit 11 is rotated at a high speed, usually 4,800 RPM on the wafer A to proceed with the primary polishing process.
제1연마 공정이 완료되면, 1차 연마를 끝낸 웨이퍼의 뒷면을 정리한다.When the first polishing process is completed, the back surface of the wafer after the first polishing is cleaned up.
이어서, 1차 연마공정이 완료된 웨이퍼에 제1도의 (b)에 도시된 제2연마부(13)의 제2연마면(12)을 이용하여 1차 연마 공정 시에 미처 연마되지 못한 부분을 다시 한 번 미세하게 연마하는 2차 연마 공정이 진행된다.Subsequently, the second polishing surface 12 of the second polishing portion 13 shown in FIG. A second polishing process is performed once, which is finely polished.
이 때, 제2연마부(13)는 1차 연마 공정이 완료된 웨이퍼 상에서 보통 2000RPM으로 회전되면서 2차 연마 공정을 진행시키며, 2차 연마 공정에서는 1차 연마 공정으로 310㎛ 두께까지 연마된 웨이퍼를 280㎛ 까지 연마시킨다. 상기의 제2연마면(14)의 폭(A`-A`)은 보통 4mm 정도의 범위를 갖는다.At this time, the second polishing unit 13 rotates at a normal RPM of 2000 RPM on the wafer on which the primary polishing process is completed, and proceeds the secondary polishing process. In the secondary polishing process, the wafer polished to 310 μm in the primary polishing process is processed. Polish to 280 μm. The width A′-A ′ of the second polishing surface 14 is usually in the range of about 4 mm.
그러나, 종래의 반도체 제조장비의 연마장치에서는 1차, 2차 연마공정으로 인하여 웨이퍼의 두께가 점차로 얇아짐에 따라, 웨이퍼 뒷면과 이에 접촉되는 제1, 제2연마면 간에는 접촉마찰이 발생된다.However, in the conventional polishing apparatus of the semiconductor manufacturing equipment, as the thickness of the wafer gradually decreases due to the first and second polishing processes, contact friction occurs between the back surface of the wafer and the first and second polishing surfaces in contact with the wafer.
즉, 웨이퍼가 대구경화됨으로써 연마되는 연마량이 많아짐에 따라, 특히, 웨이퍼 뒷면과 접촉되는 제2연마면과의 접촉마찰은 더욱 증가하게 되어 웨이퍼에 미치는 손상이 커지는 문제점이 있었다.That is, as the wafer is large-size, the amount of polishing to be polished increases, in particular, the contact friction with the second polishing surface in contact with the back surface of the wafer is further increased, thereby causing a problem that the damage to the wafer is increased.
상기 문제점을 해결하고자, 본 고안의 목적은 웨이퍼 뒷면과 접촉되는 연마면과의 접촉면적을 최소화함으로써 접촉마찰을 줄일 수 있는 반도체 제조장비의 연마장치를 제공하려는 것이다.In order to solve the above problems, an object of the present invention is to provide a polishing apparatus of a semiconductor manufacturing equipment that can reduce the contact friction by minimizing the contact area with the polishing surface in contact with the back surface of the wafer.
상기의 목적을 달성하고자, 웨이퍼 뒷면의 거친부분을 1차적으로 연마하기 위한 제1연마부와, 1차 연마된 웨이퍼를 미세하게 2차적으로 연마하기 위한 제2연마부를 구비한 반도체 제조장비의 연마장치에 있어서, 본 고안은 제1연마부에는 320매시 다야몬드입자로 형성된 제1연마면이 다수개 형성되고, 제2연마부에는 2000매시 다야몬드입자로 형성되며, 적어도 상기 제1연마면보다도 적은 폭을 갖는 제2연마면이 다 수개 형성된 것이 특징이다.In order to achieve the above object, polishing of a semiconductor manufacturing equipment having a first polishing portion for firstly polishing a rough portion of the back surface of a wafer and a second polishing portion for finely secondarily polishing a first polished wafer In the present invention, the first polishing part is formed of a plurality of first polishing surface formed of 320 particles of diamond particles, the second polishing portion is formed of diamond particles of 2000 times, at least than the first polishing surface It is characterized in that a plurality of second polishing surfaces having a small width are formed.
제2도는 본 고안에 따른 반도체 제조장비의 연마장치에 있어서, 제2연마부 및 이 제2연마부에 구비된 제2연마면의 저면을 보인 도면이다.2 is a view showing a bottom surface of a second polishing portion and a second polishing surface provided in the second polishing portion in the polishing apparatus of the semiconductor manufacturing equipment according to the present invention.
이하, 첨부된 도면을 참고로 하여 본 고안의 반도체 제조장비의 연마장치를 설명한다.Hereinafter, with reference to the accompanying drawings will be described a polishing apparatus of a semiconductor manufacturing equipment of the present invention.
본 고안의 반도체 제조장비의 연마장치는 제2도와 같이, 몸체(미도시)와, 몸체 하부에 형성되어, 웨이퍼 뒷면을 1차, 2차 연마 공정을 진행시키기 위한 제1, 제2연마부로 구성된다.The polishing apparatus of the semiconductor manufacturing equipment of the present invention, as shown in Fig. 2, is formed of a body (not shown) and a lower portion of the body, and comprises a first and a second polishing part for performing a first and second polishing process on the back surface of the wafer. do.
제1연마부(미도시)는 웨이퍼 뒷면의 거친 부분에 1차적으로 연마 공정을 진행시키기 위한 것으로, 그 저면에는 320매시인 다야몬드입자와 아교를 섞어 만든 제1연마면(미도시)이 일정간격으로 형성되어 있다. 이 제1연마면은 4mm 정도의 폭을 갖는다.The first polishing unit (not shown) is used for the first polishing process on the rough portion of the back surface of the wafer, and the first polishing surface (not shown) made of a mixture of diamond particles and diamond, which is 320 mesh at the bottom, is uniform. It is formed at intervals. This first polishing surface has a width of about 4 mm.
제2연마부(23)는 1차 연마 공정이 진행된 웨이퍼를 다시 미세하게 연마시키기 위한 2차 연마공정을 진행시키기 위한 것으로, 그 저면에는 2000매시의 다야몬드 입자와 아교를 섞어 만든 제2연마면(24)이 일정간격으로 형성되어 있다. 이 제2연마면은 웨이퍼 와의 접촉면적을 최소화하기 위해 적어도 제1연마면보다는 적은 폭을 갖되, 바람직하게는 제1연마면의 1/2정도인 2mm 폭(B-B) 범위를 갖는다.The second polishing part 23 is for carrying out a second polishing process for finely polishing the wafer subjected to the first polishing process again, and at the bottom thereof, a second polishing surface made of a mixture of 2000 particles of diamond particles and glue 24 is formed at regular intervals. The second polishing surface has a width at least less than the first polishing surface in order to minimize the contact area with the wafer, and preferably has a 2 mm width (B-B) range of about 1/2 of the first polishing surface.
상기 구성을 갖는 본 고안의 반도체 제조장비의 연마장치를 이용하여 웨이퍼 뒷면을 연마시키는 과정을 알아본다.The process of polishing the back side of the wafer using the polishing apparatus of the semiconductor manufacturing equipment of the present invention having the above configuration will be described.
웨이퍼척 상에 웨이퍼를 안착시키며, 그 상부에 본 발명에 따른 연마장치를 설치시킨다.The wafer is mounted on the wafer chuck, and the polishing apparatus according to the present invention is installed thereon.
이어서, 제1연마부가 4,800RPM 정도로 고속회전되면서 제1연마면이 웨이퍼와 접촉되면서 1차 연마공정이 실시된다. 이 때, 웨이퍼는 웨이퍼척 상에서 그 뒷면이 연마장치와 마주보도록 놓여져 있다. 1차 연마 공정시, 790㎛ 정도의 두께를 갖는 웨이퍼가 310㎛ 까지 연마된다. 이 제1연마면은 4mm 정도의 폭을 가지며, 제1연마면과 웨이퍼 뒷면 간의 접촉마찰을 줄이기 위해, 웨이퍼 전면적의 1/2 정도와 접촉되도록 한다.Subsequently, the first polishing portion is rotated at a high speed of about 4,800 RPM, and the first polishing surface is in contact with the wafer to perform the primary polishing process. At this time, the wafer is placed on the wafer chuck with its back side facing the polishing apparatus. In the primary polishing process, a wafer having a thickness of about 790 μm is polished to 310 μm. The first polishing surface has a width of about 4 mm and is in contact with about half of the entire surface of the wafer to reduce contact friction between the first polishing surface and the back surface of the wafer.
제1연마 공정이 완료되면, 웨이퍼 뒷면을 정리하고, 제2연마부(23)가 2,000RPM으로 회전되면서 제2연마 공정이 완료된 웨이퍼에 제2연마면이 접촉되어 2차 연마공정이 진행된다. 2차 연마공정은 제1연마부로 미처 연마되지 못한 웨이퍼의 미연마된 부분을 다시 한 번 연마시키는 과정으로, 1차 연마공정으로 310㎛ 두께까지 연마된 웨이퍼가 280㎛ 정도까지 연마된다. 제2연마면(24)의 폭은 바람직하게는 제1연마면 폭보다는 적은 2mm 정도로 형성되며, 이에 따라, 웨이퍼와 접촉되는 면적이 최소화된다.When the first polishing process is completed, the rear surface of the wafer is cleaned, and the second polishing unit 23 is rotated at 2,000 RPM, and the second polishing surface is brought into contact with the wafer on which the second polishing process is completed. In the second polishing process, the unpolished portion of the wafer that has not been polished by the first polishing unit is polished once again, and the wafer polished to 310 μm in the first polishing process is polished to about 280 μm. The width of the second polishing surface 24 is preferably formed on the order of 2 mm less than the width of the first polishing surface, whereby the area in contact with the wafer is minimized.
본 고안에서는 제2연마면의 폭을 제1연마면보다 적게 형성함으로써, 최종적으로 웨이퍼를 미세하게 연마시키는 제2연마면과 이 제2연마면에 접촉되는 웨이퍼간의 접촉면적을 최소화할 수 있다. 따라서, 연마 공정 진행 시에 웨이퍼가 제2연마면에 의해 눌려 손상되는 것이 방지된다. 따라서, 본 고안에서는 웨이퍼와 연마장치의 연마면 사이의 마찰을 최소화할 수 있어 웨이퍼가 파손되는 것이 방지된다.In the present invention, the width of the second polishing surface is less than that of the first polishing surface, whereby the contact area between the second polishing surface which finally polishes the wafer finely and the wafer in contact with the second polishing surface can be minimized. Therefore, the wafer is prevented from being pressed and damaged by the second polishing surface during the polishing process. Therefore, in the present invention, friction between the wafer and the polishing surface of the polishing apparatus can be minimized, thereby preventing the wafer from being broken.
또한, 본 고안에서는 제1연마면을 320매시로 함으로써, 웨이퍼에 미치는 손상을 줄일 수 있다.In addition, in the present invention, by setting the first polishing surface to 320 meshes, damage to the wafer can be reduced.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019960025585U KR200155242Y1 (en) | 1996-08-24 | 1996-08-24 | Polishing apparatus for semiconductor manufacturing process |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019960025585U KR200155242Y1 (en) | 1996-08-24 | 1996-08-24 | Polishing apparatus for semiconductor manufacturing process |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR19980012045U KR19980012045U (en) | 1998-05-25 |
| KR200155242Y1 true KR200155242Y1 (en) | 1999-08-16 |
Family
ID=19464607
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019960025585U KR200155242Y1 (en) | 1996-08-24 | 1996-08-24 | Polishing apparatus for semiconductor manufacturing process |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR200155242Y1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW474852B (en) * | 1999-04-29 | 2002-02-01 | Ebara Corp | Method and apparatus for polishing workpieces |
-
1996
- 1996-08-24 KR KR2019960025585U patent/KR200155242Y1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR19980012045U (en) | 1998-05-25 |
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