KR200153869Y1 - Gain control circuit for ultra high frequency signal - Google Patents
Gain control circuit for ultra high frequency signal Download PDFInfo
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- KR200153869Y1 KR200153869Y1 KR2019930025165U KR930025165U KR200153869Y1 KR 200153869 Y1 KR200153869 Y1 KR 200153869Y1 KR 2019930025165 U KR2019930025165 U KR 2019930025165U KR 930025165 U KR930025165 U KR 930025165U KR 200153869 Y1 KR200153869 Y1 KR 200153869Y1
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- South Korea
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- signal
- gain
- output
- amplifier
- high frequency
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers without distortion of the input signal
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
- H03G3/3052—Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver
- H03G3/3068—Circuits generating control signals for both R.F. and I.F. stages
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G2201/00—Indexing scheme relating to subclass H03G
- H03G2201/70—Gain control characterized by the gain control parameter
- H03G2201/708—Gain control characterized by the gain control parameter being temperature
Abstract
소형위성지구국의 RF 출력레벨조정을 위한 초고주파 신호출력이득 제어회로는, ALC 의 온도변화 이득 보상제어신호로 RF 입력신호의 이득레벨을 감쇄시키는 감쇄기를 단단으로 마련하고, 상기 감쇄기에서 출력되는 RF 신호를 증폭하는 RF 증폭기의 이득레벨이 가변저항에 의해 조정된 바이어스 전압·전류에 따라 결정되게 구성한다.The ultra-high frequency signal output gain control circuit for adjusting the RF output level of a small satellite earth station includes a single stage of an attenuator for attenuating the gain level of the RF input signal with a temperature change gain compensation control signal of the ALC, and outputs an RF signal output from the attenuator. The gain level of the RF amplifier for amplifying is determined in accordance with the bias voltage and current adjusted by the variable resistor.
Description
제1도는 종래의 이득제어회로도이다.1 is a conventional gain control circuit diagram.
제2도는 본 고안에 의한 이득제어회로의 회로구성도이다.2 is a circuit diagram of a gain control circuit according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
10 : ALC(Automatic Level Control) 16 : 감쇄기10: ALC (Automatic Level Control) 16: Attenuator
14, 15 : RF 증폭기 R1~ R3: 저항14, 15: RF amplifier R 1 to R 3 : resistance
본 고안은 소형위성지구국(VSAT : Very Small Aperature Terminal)에서 사용되는 초고주파수신호의 처리회로에 관한 것으로, 특히 VAST의 실내기기로부터 변조 출력되는 RF신호의 이득레벨을 일정하게 유지시켜주기 위한 초고주파 신호출력 이득제어회로에 관한 것이다.The present invention relates to a processing circuit for ultra high frequency signals used in Very Small Aperature Terminals (VSAT), and in particular, ultra high frequency signal output for maintaining a constant gain level of RF signals modulated and output from indoor equipment of VAST. It relates to a gain control circuit.
위성통신을 위한 VSAT에서 RF신호를 송출할 때, 세트에는 RF 신호레벨의 안정화를 위해 다단 감쇄기가 마련된다.When transmitting an RF signal from the VSAT for satellite communication, the set is provided with a multistage attenuator to stabilize the RF signal level.
제1도는 VSAT에 구비되어 초고주파신호를 처리하는 종래의 RF이득제어회로를 도시한 구성도로서, 온돈변화에 따른 이득변화분을 보상하기 위한 제어신호를 출력하는 ALC(Automatic Level Control)회로(10)와, 전체 RF신호의 이득을 수동으로 제어하는 수동이득조절회로(11)의 출력신호가 합산기(12)에서 합산되어 다단감쇄기(13)에 감쇄신호로 제공된다.FIG. 1 is a block diagram illustrating a conventional RF gain control circuit provided in a VSAT and processing an ultra high frequency signal. The automatic level control (ALC) circuit 10 outputs a control signal for compensating a gain change due to a change in temperature. ) And the output signals of the passive gain control circuit 11 for manually controlling the gain of the entire RF signal are added in the summer 12 and provided as attenuation signals to the multi-stage attenuator 13.
상기 다단감쇄기(13)는 통상 3단 감쇄회로로 구성되며, 합산기(12)로부터 출력되는 감쇄제어신호에 따라서 RF입력신호(RFin)의 이득을 일정하게 유지시켜 출력하게 되며, 이렇게 원하는 크기로 이득조절된 RF신호는 다단감쇄기(13)의 후단에 마련된 제1,2RF증폭기(14,15)에서 증폭되어 초고주파신호가 위성으로 송출된다.The multi-stage attenuator 13 is generally composed of a three-stage attenuation circuit, and according to the attenuation control signal output from the summer 12, the gain of the RF input signal RF in is kept constant and output. The gain-adjusted RF signal is amplified by the first and second RF amplifiers 14 and 15 provided at the rear end of the multi-stage attenuator 13, and the ultra-high frequency signal is transmitted to the satellite.
이때, RF신호의 다단감쇄기(13)는 넓은 범위에 걸쳐 이득을 조절할 수 있다는 이점이 있기는 하지만, RF신호통로가 길어지고, 세트사이즈의 증가를 가져오며, 결과적으로 세트조립성을 떨어뜨린다.At this time, although the multi-stage attenuator 13 of the RF signal has an advantage that the gain can be adjusted over a wide range, the RF signal path is lengthened, the set size is increased, and as a result, the set assembly is degraded.
본 고안은 상기와 같은 종래의 문제점을 해결하기 위하여 안출된 것으로서, 그 목적은 다단의 RF신호감쇄회로 대신 RF증폭기의 바이어스 전류값 조정을 통하여 초고주파 출력레벨을 넓은 범위에 걸쳐 안정한 값으로 조정할 수 있는 VSAT의 초고주파 신호출력 이득제어회로를 제공하는 것이다.The present invention has been made to solve the conventional problems as described above, and its purpose is to adjust the ultra-high frequency output level to a stable value over a wide range by adjusting the bias current value of the RF amplifier instead of the multi-stage RF signal attenuation circuit. It is to provide VSAT ultra high frequency signal output gain control circuit.
상술한 본 고안의 목적을 달성하기 위한 구성수단으로서, 본 고안에 의한 초고주파 신호출력 이득제어회로는 온도변화에 따른 이득변화분을 보상하기 위한 제어신호를 출력하는 ALC와, 상기 ALC의 제어신호에 따라 RF입력신호의 이득을 감쇄조정하는 1단 감쇄기와, 가변저항을 통해 회로전원(B+)을 바이어스전압으로 입력받아 상기 1단 감쇄기의 RF출력신호를 증폭하는 제1RF증폭기와, 상기 제1RF증폭기의 RF출력신호를 고정이득으로 증폭하여 RF송출신호로 출력하는 제2RF증폭기로 이루어지는 것을 특징으로 한다.As a construction means for achieving the object of the present invention described above, the ultra-high frequency signal output gain control circuit according to the present invention includes an ALC for outputting a control signal for compensating a gain change due to temperature change, and a control signal of the ALC. A first stage attenuator for attenuating and adjusting the gain of the RF input signal, a first RF amplifier for amplifying the RF output signal of the first stage attenuator by receiving a circuit power supply B + as a bias voltage through a variable resistor, and the first RF And a second RF amplifier for amplifying the RF output signal of the amplifier with a fixed gain and outputting the RF output signal.
이하, 첨부한 도면에 기초하여 본 고안을 설명한다.Hereinafter, the present invention will be described based on the accompanying drawings.
제2도는 본 고안에 따른 VSAT의 초고주파 신호출력 이득제어회로를 보이고 있다.2 shows an ultrahigh frequency signal output gain control circuit of the VSAT according to the present invention.
여기에서 참고되는 바와 같이, ALC(10)의 자동레벨조정출력에 따라서, RF입력신호(RFin)의 이득레벨 감쇄정도를 결정하는 1단의 감쇄기(16)가 제어되게 구성한다.As referred to here, according to the automatic level adjustment output of the ALC 10, the first stage attenuator 16 for determining the gain level attenuation degree of the RF input signal RF in is configured to be controlled.
그리고, 상기 감쇄기(16)를 거친 RF신호는 제1RF증폭기(14)에서 증폭된 후, 제2RF증폭기(15)로 제공되게 구성한다.The RF signal passed through the attenuator 16 is configured to be amplified by the first RF amplifier 14 and then provided to the second RF amplifier 15.
상기 제1RF증폭기(14)에는 직렬연결된 고정저항(R1)과 가변저항(R2)을 통해 회로전압(B+)으로 바이어스전압이 공급되게 연결한다.The first RF amplifier 14 is connected so that a bias voltage is supplied to a circuit voltage B + through a fixed resistor R 1 and a variable resistor R 2 connected in series.
상기 제2RF증폭기(15)에서 다시 2차증폭된 RF신호가 최종 초고주파출력신호(RFout)로 출력되게 구성한다. 상기 제2RF증폭기(15)에는 고정저항(R3)을 거친 회로 전압(B+)이 바이어스전류/전압으로 제공되게 연결한다.The second RF amplifier 15 is configured to output the second amplified RF signal as the final microwave output signal RFout. The second RF amplifier 15 is connected such that a circuit voltage B + passing through the fixed resistor R 3 is provided as a bias current / voltage.
이와 같이 구성된 본 고안의 작용 및 효과를 설명하면 다음과 같다.Referring to the operation and effects of the present invention configured as described above are as follows.
제2도에서, ALC(10)에서는 온돈변화에 따른 VSAT의 RF출력의 이득변화분을 보상하기 위한 제어신호가 출력된다.In FIG. 2, the ALC 10 outputs a control signal for compensating the gain change of the RF output of the VSAT according to the on-change.
이에 따라, 감쇄기(16)에서는 입력되는 RF신호를 ALC(10)의 제어출력에 의존하여 RF신호의 이득레벨을 조정출력한다.Accordingly, the attenuator 16 adjusts and outputs the gain level of the RF signal based on the input RF signal depending on the control output of the ALC 10.
이러한, 1단 감쇄기(16)에서의 RF신호출력은 제1RF증폭기(14)에서 증폭되는데, 이때 상기 제1RF증폭기(14)의 고정저항(R1)과 가변저항(R2)을 통한 회로전압(B+)에 의해 바이어스되고 있기 때문에 상기 가변저항(R2)을 조정하는 것으로 RF출력신호의 레벨을 원하는 대로 조정가능하게 된다.The RF signal output from the first stage attenuator 16 is amplified by the first RF amplifier 14, wherein the circuit voltage through the fixed resistor R 1 and the variable resistor R 2 of the first RF amplifier 14 is increased. Since it is biased by (B + ), by adjusting the variable resistor R 2 , the level of the RF output signal can be adjusted as desired.
여기에서, 고정저항(R1)은 제1RF증폭기(14)의 오프셋 전류설정용이다. 이렇게, 제1RF증폭기(14)에서 이득조절된 RF신호는 다시 제2RF증폭기(15)를 거쳐 최종 초고주파 신호로 출력된다.Here, the fixed resistor R 1 is for setting the offset current of the first RF amplifier 14. In this way, the gain-adjusted RF signal in the first RF amplifier 14 is again output as a final microwave signal via the second RF amplifier 15.
여기에서도 마찬가지로 제2RF증폭기(15)에서도 고정저항(R3)에 의해 그 오프셋전류가 설정된다.Here again, the offset current is set in the second RF amplifier 15 by the fixed resistor R 3 .
따라서, 본 고안에서는 VSAT의 RF출력단에 설치되는 RF증폭기의 회로전압(B +)에 의한 바이어스전류(전압)를 조정하여 이득레벨을 변경시킬 수 있는 가변저항을 설치하는 것으로 매우 넓은 범위에 걸쳐 원하는 초고주파 출력신호와 이득레벨을 조정할 수 있게 되며, 회로구성소자의 간략화에 따른 세트사이즈 축소 및 원가 절감효과를 얻을 수 있다.Therefore, in the present invention, the circuit voltage (B) of the RF amplifier installed at the RF output terminal of the VSAT. By installing a variable resistor that can change the gain level by adjusting the bias current (voltage) by +), it is possible to adjust the desired microwave output signal and gain level over a very wide range. It can reduce set size and reduce cost.
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Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019930025165U KR200153869Y1 (en) | 1993-11-26 | 1993-11-26 | Gain control circuit for ultra high frequency signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019930025165U KR200153869Y1 (en) | 1993-11-26 | 1993-11-26 | Gain control circuit for ultra high frequency signal |
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| Publication Number | Publication Date |
|---|---|
| KR950015822U KR950015822U (en) | 1995-06-19 |
| KR200153869Y1 true KR200153869Y1 (en) | 1999-08-02 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019930025165U KR200153869Y1 (en) | 1993-11-26 | 1993-11-26 | Gain control circuit for ultra high frequency signal |
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| KR (1) | KR200153869Y1 (en) |
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1993
- 1993-11-26 KR KR2019930025165U patent/KR200153869Y1/en not_active IP Right Cessation
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| KR950015822U (en) | 1995-06-19 |
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