KR200152727Y1 - Multi output circuit of smps - Google Patents
Multi output circuit of smps Download PDFInfo
- Publication number
- KR200152727Y1 KR200152727Y1 KR2019960023007U KR19960023007U KR200152727Y1 KR 200152727 Y1 KR200152727 Y1 KR 200152727Y1 KR 2019960023007 U KR2019960023007 U KR 2019960023007U KR 19960023007 U KR19960023007 U KR 19960023007U KR 200152727 Y1 KR200152727 Y1 KR 200152727Y1
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- output
- smps
- inductor
- transformer
- output circuit
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
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- Theoretical Computer Science (AREA)
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- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dc-Dc Converters (AREA)
Abstract
본 고안은 PC용 SMPS의 다출력회로에 관한 것으로, 특히 SMPS출력단을 보호하기 위하여 출력단(+5V,+12V,-5V,-12V)을 멀티인덕터(L6)로 코먼시키고, 출력단의 임피이던스를 낮게 하기 위하여 출력단(+12V)에 인덕터(L7)를 연결하며, 출력단의 임피이던스를 높게 하기 위하여 출력단(+5V)에 임피이던스(L8)를 연결하여 회로를 간소화하고, 신뢰성이 있는 출력회로를 구성하는데 있다.The present invention relates to a multi-output circuit of the SMPS for PC, and in particular, to protect the SMPS output stage, common output stage (+ 5V, + 12V, -5V, -12V) with a multi-inductor (L 6 ), and the impedance of the output stage Connect the inductor (L 7 ) to the output terminal (+ 12V) to make it low, and connect the impedance (L 8 ) to the output terminal (+ 5V) to make the output terminal high. It is in composition.
Description
제1도는 종래의 SMPS의 출력회로 구성도.1 is a block diagram of an output circuit of a conventional SMPS.
제2도는 본 고안에 의한 SMPS의 다출력회로 구성도이다.2 is a configuration diagram of a multi-output circuit of the SMPS according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
T, T2: 트랜스포머 SR1, SR2: 쇼트레귤레이터T, T 2 : Transformer SR 1 , SR 2 : Short Regulator
IC1, IC2: 비교기 L6: 멀티인덕터IC 1 , IC 2 : comparator L 6 : multi-inductor
L7, L8: 인덕터L 7 , L 8 : Inductor
본 고안은 PC용 SMPS(Switching Mode Power Supply)의 다출력회로에 관한 것으로, 특히 멀티 출력회로를 구성하는 SMPS의 상호간의 간섭으로 인한 크로스전압변동율(Cross Regulation) 및 SMPS출력단의 보호회로를 간소화하고, 신뢰성이 있는 출력회로를 구성하는 SMPS의 다출력회로에 관한 것이다.The present invention relates to the multi-output circuit of the switching mode power supply (SMPS) for PC, in particular, to simplify the cross regulation and protection circuit of the SMPS output stage due to the mutual interference of the SMPS constituting the multi output circuit The present invention relates to a multiple output circuit of an SMPS constituting a reliable output circuit.
종래의 PC용 SMPS출력회로는 제1도에 도시되어 있다. 제1도에 도시한 바와 같이, 트랜스포머(T)의 2차측단자와 -5V/-12V출력단 사이에 인덕터(L1)와, 쇼트레귤레이터(SR1),(SR2)를 연결하고, 상기 트랜스포머(T)의 2차측단자와 +5V/+12V출력단 사이에 인덕터(L2-L5)를 각각 연결하고, 인덕터(L4,L5) 양단의 드롭전압차를 비교하는 비교기(IC1,IC2)를 구성하고, +5V를 검출하기 위해 비교기의 출력단에 정전압회로부(1)를 연결하여 구성한 것이다.A conventional SMPS output circuit for a PC is shown in FIG. As shown in FIG. 1, an inductor L 1 and a short regulator SR 1 and SR 2 are connected between a secondary side terminal of a transformer T and an output terminal of -5V / -12V, and the transformer connect the inductor (L 2 -L 5) between the secondary-side terminal and the + 5V / + 12V output terminal of the (T) and the inductor (L 4, L 5) a comparator for comparing the voltage drop across the primary (IC 1, IC 2 ), and the constant voltage circuit unit 1 is connected to the output terminal of the comparator to detect + 5V.
이와 같이 종래의 PC용 SMPS출력회로는, -5V/-12V출력단의 보호를 위하여 쇼트레귤레이터를 사용해야 하고, 또한 +5V/+12V출력단의 보호를 위하여 비교기를 사용하였으며, 또한 +5V의 전원을 검출하기 위하여 정전압회로부를 사용하고 있다.Thus, the conventional SMPS output circuit for PC should use the short regulator to protect the -5V / -12V output stage, and also use the comparator to protect the + 5V / + 12V output stage, and also detect the + 5V power supply. In order to do this, a constant voltage circuit part is used.
그런데 상기와 같은 PC용 SMPS출력회로는 크로스(cross)전압변동율의 특성이 저하되고, 코스트 측면에서 저가형 SMPS로는 다소 불합리한 회로구성이다.However, the PC SMPS output circuit as described above has a deterioration in the characteristics of the cross voltage fluctuation rate and is somewhat unreasonable as a low cost SMPS in terms of cost.
본 고안은 상기와 같은 종래의 문제점을 해결하고자 이루어진 것으로서, 그 목적은 멀티출력회로를 구성하는 SMPS의 상호간의 간섭으로 인한 크로스전압변동율 및 SMPS출력단의 보호 회로를 간소화하고, 신뢰성이 있는 출력회로를 구성하는 SMPS의 다출력회로를 제공하는데 있다.The present invention has been made to solve the conventional problems as described above, the purpose of which is to simplify the protection circuit of the cross voltage fluctuation rate and SMPS output stage due to mutual interference of the SMPS constituting the multi-output circuit, and to provide a reliable output circuit The present invention provides a multi-output circuit of an SMPS.
좀더 상세하게는 모든 출력보호회로를 멀티인덕터의 특성을 이용하여 회로의 구성을 간단하게 하고, 또한 +5V/+12V출력단의 인덕터를 이용하여 상호간의 크로스전압변동율의 특성을 개선하고, 최소한의 부품소자를 사용하여 코스트를 절감시킬 수 있게 하는데 있다.More specifically, all the output protection circuits use the characteristics of the multi-inductor to simplify the circuit configuration, and also improve the characteristics of mutual cross voltage fluctuation rate by using the inductors of the + 5V / + 12V output stages, It is possible to reduce the cost by using the device.
이를 첨부 도면에 의거하여 본 고안을 상세히 설명하면 다음과 같다.The present invention will be described in detail with reference to the accompanying drawings as follows.
제2도는 본 고안에 의한 SMPS의 다출력 회로구성도로서, 제2도에 도시한 바와 같이, SMPS출력단을 보호하기 위하여 출력단(+5V,+12V,-5V,-12V)을 멀티인덕터(L6)로 코먼시키고, 출력단의 임피이던스를 낮게 하기 위하여 출력단(+12V)에 인덕터(L7)를 연결하며,출력단의 임피이던스를 높게 하기 위하여 출력단(+5V)에 인덕터(L8)를 연결하여 구성한 것이다.2 is a schematic diagram of a multi-output circuit of an SMPS according to the present invention. As shown in FIG. 2, an output terminal (+ 5V, + 12V, -5V, -12V) is connected to a multi-inductor (L) to protect the SMPS output terminal. Common to 6), and connected to the inductor (L 7) to an output (+ 12V) to a low impedance of the output stage, is configured by connecting an inductor (L 8) to an output (+ 5V) to increase the impedance of the output stage will be.
이와 같이 구성된 본 고안의 작용효과를 설명하면 다음과 같다.Referring to the effect of the present invention configured as described above are as follows.
먼저 스위치온(ON)시 트랜스포머(T1)의 2차측으로 전달된 에너지가 멀티인덕터(L6)에 차지된다.First, the energy transferred to the secondary side of the transformer T 1 when switched on is occupied by the multi-inductor L 6 .
이렇게 차지된 에너지는 +5V,+12V가 더블-피드백으로 콘트롤되고 있어 코먼(Common)된 -5V/-12V(소전류)에 절대적인 자기영향을 주고 받는다.The energy occupied is controlled by a double-feedback of + 5V and + 12V, giving absolute magnetic influence to the common -5V / -12V (small current).
이때 -5V,-12V출력단의 전압변동율이 +5V,+12V출력단의 인덕터의 자기영향으로 전압변동율이 좋아진다.At this time, the voltage fluctuation rate of the -5V, -12V output stage is improved due to the magnetic influence of the inductor of the + 5V, + 12V output stage.
따라서 -5V,-12V출력단이 단락시 멀티인덕터(L6)의 상호 자기영향으로 메인 피드-백되는 +5V,+12V출력단에 영향을 주어 마치 +5V,+12V출력단이 단락되는 현상을 초래하여 출력단을 보호하게 된다.Therefore, when the -5V, -12V output stage is short-circuited, the + 5V, + 12V output stage main feed-back is affected by the mutual influence of the multi-inductor (L 6 ). It will protect the output stage.
또한 +5V출력단에 연결된 인덕터(L8)의 임피이던스를 낮게 하고, +12V출력단에 연결된 인덕터(L7)의 임피이던스를 높게하여 리플노이즈를 억제시킴과 동시에 크로스 전압변동율을 좋게 함으로써 +5V출력단과 +12V출력단의 크로스 전압변동율을 보상할 수 있게 되는 것이다.In addition, the impedance of the inductor (L 8 ) connected to the + 5V output terminal is lowered and the impedance of the inductor (L 7 ) connected to the + 12V output terminal is increased to suppress ripple noise and to improve the cross voltage fluctuation rate, thereby improving the cross voltage fluctuation rate and the + 5V output terminal. It is possible to compensate the cross voltage fluctuation rate of the 12V output stage.
이상에서와 같이 동작하는 본 고안은 모든 출력보호회로를 멀티인덕터의 특성을 이용하여 회로의 구성을 간단하게 하였으며, 또한 +5V,+12V출력단의 인덕터를 이용하여 상호간의 크로스 전압변동율의 특성을 개선시키고, 최소한의 부품소자를 사용하여 코스트를 절감시켜 주는 효과가 있다.The present invention, which operates as described above, simplifies the circuit configuration of all output protection circuits using the characteristics of the multi-inductor, and also improves the characteristics of the cross-voltage fluctuation rate between the inductors by using the + 5V and + 12V output stage inductors. In this case, the cost is reduced by using the minimum component elements.
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Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019960023007U KR200152727Y1 (en) | 1996-07-31 | 1996-07-31 | Multi output circuit of smps |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019960023007U KR200152727Y1 (en) | 1996-07-31 | 1996-07-31 | Multi output circuit of smps |
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| Publication Number | Publication Date |
|---|---|
| KR980009329U KR980009329U (en) | 1998-04-30 |
| KR200152727Y1 true KR200152727Y1 (en) | 1999-07-15 |
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| Application Number | Title | Priority Date | Filing Date |
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| KR2019960023007U KR200152727Y1 (en) | 1996-07-31 | 1996-07-31 | Multi output circuit of smps |
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| KR (1) | KR200152727Y1 (en) |
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1996
- 1996-07-31 KR KR2019960023007U patent/KR200152727Y1/en not_active IP Right Cessation
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| KR980009329U (en) | 1998-04-30 |
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