KR20010096718A - Control circuit for dc motor of electric power steering - Google Patents

Abstract

PURPOSE: A DC motor control circuit is provided to reduce switching loss of power element and prevent performance deterioration and damage of power element caused due to thermal loss. CONSTITUTION: The first path is formed along a power terminal(B+), the first FET(21), a DC motor(M), the fourth FET(24) and a ground terminal(GND), and the second path is formed along the power terminal, the second FET(22), DC motor, the third FET(23) and the ground terminal. First to fourth FET drivers(31-34) drive first to fourth FETs(21-24) in accordance with first and second direction selection signals output from an ECU(40). The first FET driver has an input terminal to which the first direction selection signal output from the ECU is connected, and the second FET driver has an input terminal to which the second direction selection signal output from the ECU is connected. The third FET driver has an input terminal which is connected to an output terminal of the first NAND gate(51) which receives the second direction selection signal and PWM control signal output from the ECU, and outputs PWM control signal when the second direction selection signal is in active state. The fourth FET driver has an input terminal which is connected to an output terminal of the second NAND gate(52) which receives the first direction selection signal and PWM control signal output from the ECU, and outputs PWM control signal when the first direction selection signal is in active state.

Description

DC motor control circuit of electronic power steering system {CONTROL CIRCUIT FOR DC MOTOR OF ELECTRIC POWER STEERING}

The present invention is a DC motor control circuit of the electronic power steering device, more specifically, the control signal of the ECU is reduced to half of the number of power elements in one power signal at the top of the one control signal when driving the DC motor by the H-type bridge An electronic device that drives the device and the other power device at the bottom at the same time, but turns on the top power device and drives only the bottom power device by PWM control to reduce switching loss of the power device and prevent performance degradation and thermal damage of the device. The present invention relates to a DC motor control circuit of a power steering device.

In general, a hydraulic power steering apparatus using a hydraulic actuator as a source of steering assistance force is configured to be coaxially connected through an output shaft connected to a steering wheel and an input shaft torsion bar connected to a handle. Therefore, when steering torque is applied to the handle, relative angle displacement occurs between the input shaft and the output shaft in accordance with the torsion of the torsion bar. At this time, the steering assistance force is obtained by supplying hydraulic pressure to the operating chamber corresponding to the direction of steering torque by a rotary valve formed between the input shaft and the valve body according to the generated relative angular displacement.

On the other hand, the electric power steering system operates the DC motor with the battery electricity instead of the engine power or hydraulic actuator to adjust the rotational direction of the DC motor according to the steering operation to obtain steering power. It has advantages such as fuel saving and safety. In particular, the characteristics of the power steering device can be adjusted according to the driver's personality, so there is a feature that can exclude the uniformity of mass-produced cars.

1 is a circuit diagram illustrating a DC motor control circuit of a conventional electronic power steering apparatus.

As shown here, the first to fourth FETs 21, 22, 23, and 24 are installed in the H shape with respect to the DC motor 10, respectively, and the first to fourth FETs 21, which are output from the ECU 40. First to fourth FET drivers 31, 32, 33, and 34 are installed to receive the control signals for driving the 22, 23, and 24 to drive the first to fourth FETs 21, 22, 23, and 24. do.

That is, when the control signal for driving the first to fourth FETs 21, 22, 23, and 24 output from the ECU 40 is outputted, the first to fourth FET drivers 31, 32, 33, and 34 are respectively made. The first to fourth FETs 21, 22, 23, and 24 are substantially driven.

Accordingly, the DC motor 10 can be bidirectionally controlled by driving the first FET 21 and the fourth FET 24 or the second FET 22 and the third FET 23.

That is, when the first FET 21 and the fourth FET 24 are driven, the current path is supplied to the power supply terminal B +, the first FET 21, the DC motor 10, the fourth FET 24, and the ground terminal GND. When the second FET 22 and the third FET 23 are driven, the current path is the power supply terminal B +, the second FET 22, the DC motor 10, the third FET 33, and the ground terminal GND. It can be configured to adjust the rotation direction of the DC motor 10. In addition, the amount of current flowing through the DC motor 10 is adjusted by the pulse width of the PWM control signal for driving the first to fourth FETs 21, 22, 23, and 24.

As such, the PWM control signal for driving the first to fourth FETs 21, 22, 23, and 24 in the ECU 40 is simultaneously outputted with the control signals for driving the first FET 21 and the fourth FET 24. The control signals for driving the second FET 22 and the third FET 23 are simultaneously output.

However, the first FET 21 and the second FET 22 interposed between the power supply terminal B + and the DC motor 10 are connected to the third FET 23 interposed between the ground terminal GND and the DC motor 10. As compared with the fourth FET 24, the potential for driving is doubled. However, the circuit making the double potential has a loss, and thus, the driving potentials for driving the FETs are different from each other, so that the required output is not properly exhibited and heat loss is consumed.

The present invention was created to solve the above problems, and an object of the present invention is to reduce the control signal of the ECU to half of the number of power elements, and one side of the upper side with one control signal when driving the DC motor by the H-type bridge. Drives the power source and the other power device at the bottom at the same time, but operates only the lower power device by PWM control while the top power device is turned on to reduce switching loss of the power device and prevent performance degradation and burnout of the device due to thermal loss. The present invention relates to a DC motor control circuit of an electronic power steering device.

1 is a circuit diagram illustrating a DC motor control circuit of a conventional electronic power steering apparatus.

2 is a circuit diagram illustrating a DC motor control circuit of the electronic power steering apparatus according to the present invention.

-Explanation of symbols for the main parts of the drawings-

10: DC motor 21, 22, 23, 24: first to fourth FET

31,32,33,34: 1st to 4th FET driver

40: ECU 51,52: first to second gate

The present invention for realizing the above object is to form a first directional path to the power supply stage, the first FET, the DC motor, the fourth FET and the ground terminal around the DC motor, and the power supply stage, the second FET and the DC motor In the DC motor control circuit of the electronic power steering device comprising a first to fourth FET driver to form a second directional path to the third FET and the ground terminal to drive the first to fourth FET according to the control signal output from the ECU. The first direction selection signal output from the ECU is connected to the input terminal of the 1FET driver, the second direction selection signal output from the ECU is connected to the input terminal of the second FET driver, and the second direction output from the ECU is connected to the input terminal of the third FET driver. It is connected to the output terminal of the first gate that receives the selection signal and the PWM control signal and outputs the PWM control signal when the second direction selection signal is active. Ryeokdan is characterized in that the first direction select signal and the first direction select signal receives the PWM control signal outputted from the ECU is associated with the second gate output terminal for outputting a PWM control signal when the active state.

Referring to the operation of the present invention made as described above are as follows.

When the first direction selection signal or the second direction selection signal for setting the direction of the DC motor is activated in the ECU of the electronic power steering device, the first and fourth FETs are simultaneously operated or the second and third FETs are simultaneously operated. Rather, the first and second FETs installed at the top, i.e., connected to the power supply, are always on when operated, and the amount of operation of the DC motor can reduce the thermal loss due to switching by switching the third and fourth FETs by PWM control. It works.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings. In addition, the present embodiment is not intended to limit the scope of the present invention, but is presented by way of example only and the same parts as in the conventional configuration using the same reference numerals and names.

2 is a circuit diagram illustrating a DC motor control circuit of the electronic power steering apparatus according to the present invention.

As shown here, a first directional path is formed by the power supply terminal B +, the first FET 21, the DC motor 10, the fourth FET 24, and the ground terminal GND around the DC motor 10. And a second directional path around the DC motor 10 to the power supply terminal B +, the second FET 22, the DC motor 10, the third FET 23, and the ground terminal GND. The first to fourth FET drivers 31, 32, 33, 34 to drive the first to fourth FETs 21, 22, 23, and 24 by the first direction selection signal and the second direction selection signal output from .

A first direction selection signal output from the ECU 40 is connected to an input terminal of the first FET driver 31, and a second direction selection signal output from the ECU 40 is connected to an input terminal of the second FET driver 32. The first NAND gate receives the second direction selection signal and the PWM control signal output from the ECU 40 and outputs the PWM control signal when the second direction selection signal is active at the input terminal of the third FET driver 33. 51 is connected to the output terminal of the fourth FET driver 24, the first direction selection signal and the PWM control signal output from the ECU 40 receives the PWM control signal when the first direction selection signal is active. It is connected to the output terminal of the second NAND gate 52 for outputting.

Referring to the operation of the embodiment according to the present invention made as described above are as follows.

First, if the first direction selection signal of the ECU 40 is activated as a high potential signal when the first direction is selected, the activated first direction selection signal is directly applied to the input terminal of the second FET driver 32 to provide a second FET ( Turn on 22). In addition, the first NAND gate 51 receiving the first direction selection signal and the PWM control signal for controlling the output of the DC motor 10 outputs an inverted signal with respect to the input PWM control signal, thereby transmitting a third FET driver 33. By controlling the on and off of the third FET 23.

On the other hand, the second direction selection signal is disabled as the low potential signal, so that the first FET 21 is turned off and the second NAND gate 52 also outputs the low potential signal regardless of the variation of the PWM control signal input thereto. Thus, the fourth FET 24 is also turned off.

Accordingly, a first direction path is formed between the power supply terminal B +, the second FET 22, the DC motor 10, the third FET 23, and the ground terminal GND to operate the DC motor 10.

On the other hand, when the second direction selection signal of the ECU 40 is activated as a high potential signal when the second direction is selected, the activated second direction selection signal is immediately applied to the input terminal of the first FET driver 31 to provide the first FET ( Turn on 21). In addition, the second NAND gate 52, which receives the second direction selection signal and the PWM control signal for controlling the output of the DC motor 10, outputs an inverted signal with respect to the input PWM control signal to output the fourth FET driver 34. This controls the on and off of the fourth FET 24.

On the other hand, the first direction selection signal is disabled as the low potential signal, so that the second FET 22 is turned off and the first NAND gate 51 also outputs the low potential signal regardless of the variation of the PWM control signal input thereto. Thus, the first FET 21 is also turned off.

Accordingly, a second directional path is formed between the power supply terminal B +, the first FET 21, the DC motor 10, the fourth FET 24, and the ground terminal GND to operate the DC motor 10.

As described above, the present invention reduces the control signal of the ECU to half of the number of power devices and simultaneously drives one power device on the top and the other power device on the bottom with one control signal when the DC motor is driven by the H-type bridge. The power device is turned on and driven by PWM control of only the lower power device, thereby reducing switching loss of the power device and preventing performance degradation and burnout of the device.

Claims (2)

A first directional path is formed around the DC motor with a power supply stage, a first FET, a DC motor, a fourth FET, and a ground terminal, and a second directional path is provided with the power supply, a second FET, a DC motor, a third FET, and a ground terminal around the DC motor. In the DC motor control circuit of the electronic power steering device formed of a first to fourth FET driver to form and drive the first to fourth FET according to the control signal output from the ECU, A first direction selection signal output from the ECU is connected to an input terminal of the first FET driver, a second direction selection signal output from the ECU is connected to an input terminal of the second FET driver, and an input terminal of the third FET driver is connected to the input terminal of the third FET driver. It is connected to the output terminal of the first gate for receiving the second direction selection signal and the PWM control signal output from the ECU and outputting the PWM control signal when the second direction selection signal is active, the input terminal of the fourth FET driver A first direction selection signal output from the ECU and the PWM control signal are input and are connected to an output terminal of a second gate that outputs the PWM control signal when the first direction selection signal is active. DC motor control circuit of the electronic power steering device. 2. The DC motor control circuit of claim 1, wherein the first and second gates are NAND gates.