KR20010088340A - A method of isolating a reticle from electrostatic discharge - Google Patents

Abstract

PURPOSE: A method of isolating reticle from static electricity discharge is provided to reduce manufacture costs and time by integrating the pattern edging of an IC with the edging of a guard band. CONSTITUTION: An ESD decreasing means is provided by enclosing the integrated circuit patterns(20) etched in a light shielding material(13) arranged on a substrate(10). The reticle or photomask having guard bands(23) or discontinuous parts is disclosed. The width of the guard bands(23) is preferably about 1 to about 50 mm. The guard bands(23) decrease the ESDs by dividing the routes where charges move, thereby separating the important pattern regions from the movement of the charges. The etching of the guard bands(23) may be easily incorporated during the etching of the integrated circuit patterns(20) of a manufacturing protocol.

Description

A METHOD OF ISOLATING A RETICLE FROM ELECTROSTATIC DISCHARGE}

The present invention relates to the reduction of electrostatic discharge in manufacturing using reticles and other photomasks used in photolithography. By reducing the path to electrostatic discharge, the service life of the reticle is greatly extended and defects due to electrostatic discharge are substantially reduced.

The use of lithography technology to transfer patterns from photomasks to semiconductor substrates in the manufacture of semiconductor devices such as integrated circuits has been highly developed and widely used. Reticles, or photomasks, use a variety of light sources, such as visible and ultraviolet light, as well as x-rays and electron beams. The glass substrate of the reticle is typically electrostatically charged during processing. Even at very small amounts of electrostatic charge, dust and particles are attracted to the glass substrate, which significantly degrades the integrated circuit pattern applied on the semiconductor substrate.

Static electricity from the movement of objects or air around the reticle is generated on the reticle. Electrostatic discharge (ESD) is generated when the opposite charges between the objects come into contact with a threshold, and the charge passes between the objects. Depending on the charge density and the sensitivity of the object / Es material, the exchange of charges can cause damage to the object. In the case of the very small mask photolithographic design structures found in reticles, such damage can be severe enough to melt and / or melt or remove integrated circuit patterns formed on the substrate. This causes mask damage, including openings, redeposited materials and cut geometry. Such damage can result in wafer debris, rework, mask regeneration and reconstruction, and also requires significant design and fabrication time for inline inspection and defect analysis.

ESD is a known problem in the semiconductor industry and attempts at the prior art have not succeeded in providing a simple solution to this problem. Ground straps are typically used to ground people and machines that handle the reticle. Although ground straps are quite inexpensive and convenient to use, it is difficult to ensure that each person and every machine is always grounded. Therefore, the reticle is still damaged by ESD.

U.S. Patent No. 4,440,841 by Tabuchi provides a chemically resistant film formed on top of an electrically-conductive film formed on top of a reticle comprising a transparent substrate having a masking layer on top. This is an attempt to reduce ESD. However, this method requires additional steps that undesirably increase time and cost in the manufacture of the reticle.

U. S. Patent No. 4,537, 813 to Kuelel discloses a plasma deposited silicon oxide conformal coating covering a patterned photomask, which coating is electrically resistive and has substantially the same refractive index as the substrate. This method exposes the reticle to a plasma deposition process that can cause thermal damage to the reticle and adds a separate manufacturing step.

U.S. Patent No. 4,927,692 to Dhanakoti et al. Describes the effect of ESD on a multilayer antistatic electrical test mask of a bed-of-nails type tester. ESD has been found to be more evenly distributed through the multilayer mask. However, multilayer designs for reticles using materials disclosed by reference, such as glass clothes comprising epoxy resin and paper, are very unsuitable for photolithography.

US Pat. No. 5,296,893 to Shaw et al. Discloses a reticle box that surrounds the reticle to reduce magnetic contamination and contamination by minimizing the point of friction and sealing the interior of the box from the surrounding environment. Although this reticle box is ideal for storing and delivering reticles, it does not provide a means to reduce ESD while the reticle is being processed.

U.S. Patent No. 5,370,951 to Kubota et al. Proposes using a new adhesive to install pellicles on the reticle as a means to protect the reticle from dust and other contaminants. U. S. Patent No. 5,422, 704 to Sego discloses a pellicle frame that provides a pressure relief system that reduces the chance of particles moving from the outside of the frame to the protected area of the reticle. The pellicle is ideal for reducing specific contamination, but is insufficient for reducing ESD overall. It is more important to reduce the source of the ESD than to process the output of ESD after treatment.

Therefore, there is a need for a simple method for ESD reduction that does not require additional manufacturing steps in the related art and does not increase time and cost.

With the problems and deficiencies of the prior art in mind, it is an object of the present invention to provide a simple method for reducing electrostatic discharge that is easily integrated into a manufacturing plan.

Another object of the present invention is to provide an improved reticle or photomask in which electrostatic discharge is prevented.

Other objects and advantages of the invention will be in part apparent in the following specification, and in part will be apparent from the description.

1 is a cross-sectional view of a method step of the present invention with a substrate having a light blocking layer and a resist layer formed thereon.

FIG. 2 is a cross-sectional view of the substrate of FIG. 1 forming a reticle of the present invention by forming resist patterned into a pattern of an integrated circuit; FIG.

3 is a cross-sectional view of the reticle of the present invention prior to removing the resist layer.

4 is a cross-sectional view of the reticle of the present invention with a guard band.

5 is a plan view of the reticle of the present invention.

<Explanation of symbols for the main parts of the drawings>

10: Substrate

13: light blocking material

15: photoresist layer

20: pattern

23: guard band

25: outer annular region

27: inner annular region

30: pellicle

100: reticle

The above and other objects and advantages of the present invention are accomplished by one aspect of the present invention by those skilled in the art. A first aspect of the invention provides a light transmission substrate and a layer of light blocking material covering the substrate, the light blocking material being patterned and etched to provide an image for an integrated circuit, and the light blocking material surrounding the image. A photolithography mask comprising a discontinuity of a layer.

The substrate contains quartz, soda lime glass, glass, sapphire or calcium fluoride. The light blocking material layer includes chromium, chromium oxide, copper, gold, steel, epoxy, molybdenum silicide or multilayers thereof. Discontinuities in the light blocking material are preferably formed by etching a portion of the light blocking material surrounding the image such that the substrate is exposed. The discontinuity includes a guard band surrounding the image such that electrostatic discharge is interrupted between any light blocking material on the outer edge of the substrate and the light blocking material of the image. Preferably the guard band comprises a substrate material. Preferably, the guard band has a width of about 1 to about 50 mm. A pellicle may also be included that is installed along the inner or outer edge of the image.

A second aspect of the invention relates to a photolithography mask for optically transferring a lithography image corresponding to an integrated circuit from a mask from a mask onto a semiconductor substrate using a light exposure apparatus, having a top surface and an outer edge. An inner annular ring region comprising an insulated substrate, a lithography pattern corresponding to an integrated circuit on the upper surface of the substrate, and a conductive film on the upper surface of the substrate—the inner annular ring region is attached to a mask. Used to install a pellicle—and an outer annular ring region comprising a conductive film on the upper surface of the substrate—the outer annular ring region is spaced outward from the inner annular ring region and outward to the outer edge of the substrate. Extended.

The photolithography mask of the present invention further comprises a pellicle installed on the inner or outer annular ring region. The portion of the substrate between the inner annular ring region and the outer annular ring region is a discontinuity in the conductive film for substantially reducing the electrostatic discharge between the central region and the ring region. Preferably, the distance between the inner annular ring region and the outer annular ring region is about 1 mm to 50 mm.

According to a third aspect of the present invention, there is provided a semiconductor device comprising: a central region of a substrate having a substrate, a layer of light blocking material disposed on the substrate, a plurality of integrated circuit patterns formed by patterning and etching the light blocking material, and a plurality of integrated circuits; A photolithography mask surrounding each of the patterns and including a guard band that represents a discontinuity of the light blocking material and substantially reduces electrostatic discharge.

The substrate comprises a light transmitting material selected from the group consisting of soda lime glass, quartz, glass, sapphire or calcium fluoride. Light blocking materials include chromium, chromium oxide, copper, gold, steel, epoxy, molybdenum silicide or their multilayers. Preferably, the guard band has a width of about 1 mm to about 5 mm.

A fourth aspect of the invention provides a method of providing a light transmission substrate, depositing a light blocking material thereon, patterning and etching the light blocking material in a desired pattern corresponding to an integrated circuit, and the desired And forming a discontinuity in the light blocking material surrounded by the pattern, wherein the discontinuity does not extend to the outer edge of the substrate.

Providing the light transmission substrate includes providing a light transmission substrate comprising soda lime glass, quartz, glass, sapphire or calcium fluoride. Depositing the light blocking material includes depositing a light blocking material comprising chromium, chromium oxide, copper, gold, steel, epoxy, molybdenum silicide or multiples thereof. Preferably, forming the discontinuities in the light blocking material includes forming the discontinuities in the light blocking material surrounding the desired pattern having a width of about 1 mm to about 50 mm. Advantageously, forming the discontinuities in the light blocking material and patterning and etching the light blocking material in a desired pattern corresponding to the integrated circuit can be performed at the same time.

In a fifth aspect of the invention there is provided a method comprising providing a light transmission substrate having a light blocking material layer etched into an integrated circuit pattern disposed thereon, and an annular discontinuity surrounding the integrated circuit pattern in the light blocking material, wherein the discontinuity is Forming an interruption in front of an outer edge of the substrate.

Forming the annular discontinuities surrounding the integrated circuit pattern comprises forming the annular discontinuities surrounding the integrated circuit pattern in a light blocking material having a width of about 1 mm to about 50 mm, preferably at least about 20 mm. It includes.

The novel forms of the invention and the features of the components of the invention are specifically described in the appended claims. The drawings are provided by way of example only and are not drawn to scale. However, the invention itself may be best understood with reference to the detailed description set forth in connection with the accompanying drawings.

Preferred embodiments of the invention are described below with reference to Figs. 1 to 5, in which like features of the invention are given the same reference numerals. These drawings are not necessarily drawn to scale of features of the present invention.

The present invention discloses a simple method of reducing ESD in reticles and / or photomasks used in photolithography. For the sake of understanding, the terms reticle and photomask are used without distinction. A guard band or discontinuity surrounding the integrated circuit pattern etched into the light blocking material disposed over the substrate provides a means for reducing ESD. The guard band simply reduces ESD by interrupting the path of charge transfer and isolates the critical patterned region from charge transfer. Etching the guard band can be easily integrated into the fabrication protocol during the etching of the integrated circuit pattern.

1 shows a substrate 10 having a light blocking material 13 such as chromium and a photoresist layer 15 disposed thereon. Substrate 10 includes any light transmission material, which is particularly advantageous for forming reticles used in lithography for semiconductor fabrication where light can pass directly through the substrate with minimal reflectance and minimal damage. Do. Examples of such light transmitting materials include doped and undoped quartz, glass, soda lime glass, sapphire, or calcium fluoride. The light blocking material 13 is deposited on top of the substrate 10 by means known in the art, and may be formed of materials such as chromium, chromium oxide, copper, steel, epoxy, molybdenum silicide or multilayers thereof. Include. The photoresist 15 is formed and patterned on top of the light blocking material 13 according to known means to complement the integrated circuit pattern. The photoresist 15 is patterned by exposure to the light emitting source indicated by the arrow.

The photoresist 15 is developed to expose the surface of the light blocking material 13 in the pattern 20 as shown in FIG. 2. During the patterning of the photoresist 15, the guard band 23 surrounding the integrated circuit pattern is delineated to facilitate the integration of this ESD reduction step which is recorded in the working deck of the mask recording means. The area of light blocking material 13 not covered with photoresist 15 is etched down to the substrate surface by known means. This includes the etching of the guard band 23.

Therefore, in FIG. 4, once the etching of the guard band and the integrated circuit pattern is complete, the resist is removed to form a patterned reticle with the guard band 23, as shown in FIG. Isolation helps to substantially reduce ESD.

5 is a plan view of a reticle 100 fabricated using the preferred embodiment described above. Light blocking material 13, such as chromium or other conductive films, is patterned and etched to form integrated circuit pattern 20 in the central region of substrate 10. Outer annular region 25 maintains an unpatterned total amount of light blocking material 13. The inner annular region 27 abutting the edge of the integrated circuit pattern 20 in the central region of the substrate 10 provides the required space for the pellicle 30 if desired. The guard band 23 is a discontinuity in the light blocking material 13 between the inner annular region 27 and the outer annular region 25. Preferably, the guard band 23 has a width of about 1 mm to about 50 mm. More preferably, a threshold of at least 20 mm is maintained between the inner and outer annular regions to sufficiently isolate the critical circuit design image from the charge transfer. It is desirable to have the guard band 23 as close as possible to the design area, ie the integrated circuit pattern 20.

While the present invention has been described in particular, it will be apparent that various applications, changes, and modifications are possible by those skilled in the art in connection with the above description. Therefore, it is to be understood that the appended claims cover any such applications, modifications and variations that fall within the spirit and scope of the invention.

As explained above, the object described above can be achieved by the present invention. A simple new feature of the reticle or photomask prevents electrostatic discharge by successfully isolating critical patterned circuit images. By incorporating guard bands representing discontinuities in the light blocking layer of the reticle surrounding the critical patterned area, charge transfer is reduced and the deleterious effects of electrostatic discharge are prevented. The method of making the reticle or photomask of the present invention includes integrating the etching of the integrated circuit pattern with the etching of the guard band, thereby saving manufacturing time and cost.

Claims (24)

In the photolithography mask, Optical transmission substrate, A layer of light blocking material covering the substrate, the light blocking material being patterned and etched to provide an image for an integrated circuit; And a discontinuity in said layer of light blocking material surrounding said image. The photolithography mask of claim 1, wherein the substrate comprises quartz, soda lime glass, glass, sapphire, or calcium fluoride. The photolithography mask of claim 1, wherein the discontinuities in the light blocking material are formed by etching a portion of the light blocking material surrounding the image such that the substrate is exposed. The photolithography mask of claim 1, wherein the discontinuity comprises a guard band surrounding the image such that electrostatic charge is interrupted between the light blocking material on the outer edge of the substrate and the light blocking material of the image. The photolithography mask of claim 4, wherein the guard band comprises the substrate material. The photolithography mask of claim 1, further comprising a pellicle installed along an outer edge of the image. The photolithography mask of claim 1, further comprising a pellicle installed in the guard band. A photolithography mask for optically transferring a lithography image corresponding to an integrated circuit from a mask onto a semiconductor substrate using a light exposure apparatus, An insulating substrate having an upper surface and an outer edge, A central region including a lithography pattern corresponding to the integrated circuit on the upper surface of the substrate; An inner annular ring region comprising a conductive film on the upper surface of the substrate, the inner annular ring region being used to install a pellicle in the mask; A photolithographic mask comprising an outer annular ring region comprising a conductive film on the upper surface of the substrate, the outer annular ring region located away from the inner annular ring region and extending outward toward an outer edge of the substrate . The photolithography mask of claim 8, further comprising a pellicle disposed on the inner annular ring region. The photolithography mask of claim 8, further comprising a pellicle disposed on the outer annular ring region. 10. The device of claim 8, wherein a portion of the substrate between the inner annular ring region and the outer annular ring region is a discontinuity in the conductive film and substantially reduces electrostatic discharge between the central region and the ring region. Lithography Mask. The photolithography mask of claim 8, wherein a distance between the inner annular ring region and the outer annular ring region is between about 1 mm and about 50 mm. In the photolithography mask, Substrate, A light blocking material layer located on the substrate; A central region of the substrate having a plurality of integrated circuit patterns formed by patterning and etching the light blocking material; And a guard band surrounding each of said plurality of integrated circuit patterns, said discontinuity of said light blocking material and substantially reducing electrostatic discharge. The photolithography mask of claim 13, wherein the substrate is a light transmitting material selected from the group consisting of soda lime glass, quartz, glass, sapphire, or calcium fluoride. The photolithography mask of claim 1, wherein the light blocking material layer comprises chromium, chromium oxide, copper, gold, steel, epoxy, molybdenum silicide or multiple layers thereof. The photolithography mask of claim 1, wherein the guard band has a width of about 1 mm to about 50 mm. In the manufacturing method of the reticle for photolithography, Providing an optical transmission substrate, Depositing a light blocking material thereon; Patterning and etching the light blocking material in a desired pattern corresponding to an integrated circuit; Forming a discontinuity in the light blocking material surrounding the desired pattern, wherein the discontinuity does not extend to an outer edge of the substrate. 18. The method of claim 17, wherein providing the light transmission substrate comprises providing a light transmission substrate comprising soda lime glass, quartz, glass, sapphire or calcium fluoride. 18. The photolithography of claim 17, wherein depositing the light blocking material comprises depositing a light blocking material comprising chromium, chromium oxide, copper, gold, steel, epoxy, molybdenum silicide or multiples thereof. Method for producing a reticle for use. 18. The reticle for photolithography as recited in claim 17, wherein forming a discontinuity in the light blocking material comprises forming a discontinuity in the light blocking material surrounding the desired pattern having a width of about 1 mm to about 50 mm. Method of preparation. 18. The method of claim 17, wherein forming a discontinuity in the light blocking material, and patterning and etching the light blocking material into a desired pattern corresponding to an integrated circuit are simultaneously performed. A method of reducing electrostatic discharge on a photolithography reticle, Providing a light transmission substrate with a layer of light blocking material etched in an integrated circuit pattern; Forming an annular discontinuity surrounding the integrated circuit pattern in the light blocking material, the discontinuity being interrupted in front of the outer edge of the substrate. 23. The method of claim 22, wherein forming an annular discontinuity surrounding the integrated circuit pattern comprises forming an annular discontinuity surrounding the integrated circuit pattern in the light blocking material having a width of about 1 mm to about 50 mm. Electrostatic discharge reduction method comprising a. 23. The method of claim 22, wherein forming an annular discontinuity surrounding the integrated circuit pattern comprises forming an annular discontinuity surrounding the integrated circuit pattern in the light blocking material having a width of at least about 20 mm. Electrostatic discharge reduction method.