KR20010041419A - High definition television camera and formatter - Google Patents

Abstract

The present invention relates to a television camera architecture in which a scene is sequentially scanned to provide a finished image for each frame of video output. The camera forms a high definition digital format that can be changed in any industry that accepts the format. The present invention is directed to a flexible formatter that allows a user to specify the required format.

Description

High Definition Television Camera and Formatter {HIGH DEFINITION TELEVISION CAMERA AND FORMATTER}

Electronic video cameras provide a method of converting scenes, objects, movie films, actors, and the like into electronic video signals that can be viewed, recorded, modified, and transmitted in a realistic way on one or multiple receivers. Certain architectures of the present invention provide improved performance for acquiring and manipulating visual information such that the architecture can be used by television stations to form broadcast-quality (delivery quality) images with full motion and full color. The present invention includes a camera architecture that can scan a scene sequentially to provide a finished picture for each frame of video output. Sequential scanning offers several advantages, such as the reduction of motion artifacts associated with scanning processing, and video output that is directly compatible with computer manipulation techniques.

The present invention increases the use of equipment related to the manufacture and distribution of high definition televisions (“HDTVs”). Such equipment includes, but is not limited to, high definition cameras, tape recorders, switching units, special effect generators, and compression engines. The increased use is due to the ability of equipment to receive and distribute electrical signals representing HDTV images in formats used in all industries and to convert these signals to generic formats. For example, in the case of a camera, the camera internal signal may be in a specific format, but the user may need a different format. The present invention includes a programmable formatter capable of converting a video signal into a user-specified format (or formats).

The present invention relates to a television camera and associated equipment for obtaining an image in a high quality manner.

1 is a block diagram of the optical and initial electrical portions of the present invention.

2 is a block diagram illustrating details of a front and electronic device.

FIG. 3 is a block diagram showing the details of the architecture of the back end electronics of the camera and the relationship between the architecture and studio equipment.

4 illustrates the present invention performed using a field-programmable logic array.

5 illustrates an alternative method of carrying out the invention using one or more processors.

Accordingly, it is an object of the present invention to provide an efficient image acquisition system that can be used as an initial input to a facility after broadcast or production.

Another object of the present invention is to provide a formatter that uses application specific software to operate a video signal.

Still another object of the present invention is to convert one HDTV signal into another HDTV signal with a general electronic device set.

Another object of the present invention is to provide a flexible formatter for video signal conversion.

Another object of the present invention is to increase the use of equipment related to the manufacture and distribution of HDTVs.

Another object of the present invention is to provide a camera that sequentially scans a scene.

The present invention provides an optical sensor for generating a digital output; A front-end electronics unit for receiving and processing digital output from the optical sensor and generating a digital video signal; And a high-definition digital television camera comprised of back-end electronics that receive and process digital video signals generated by the front-end electronics and form a format designated by a camera user. The unit includes a flexible formatter capable of converting the digital video signal into a number of different formats.

The flexible formatter may be comprised of one or more field programmable gate array (s). A field programmable gate array can convert digital video signals from sequential format to interlaced format. The flexible formatter can include a storage medium that stores the digital video signal during conversion. The formatter may also include a digital to analog converter for converting the digital video signal into an analog format. The formatter may also include programming terminals for controlling the formatter and receiving control data for determining the format for the digital video signal.

Optionally, the flexible formatter may include a general purpose video processor. The formatter may also include a storage medium that stores the digital video signal during conversion. The formatter may also include a read-only memory (ROM) that stores program code that controls the video processor and controls the conversion of the digital video signal. In addition, the formatter including a video processor may include a digital-analog converter for converting a digital video signal into an analog format.

The optical sensor of the camera may include an optical lens and an optical filter. The optical sensor may also include an optical prism assembly. The optical sensor may be controlled by a control signal provided by the optical decoder.

The front and electronics of the camera may include logic circuitry to correct defective pixels. The front end electronics unit may also include logic circuitry to modify the shading of the video signal. The camera may include a digital accumulator that automatically controls the gain. The camera may also include a programmable random-access memory (PRAM) that compensates for nonlinearity in the optical sensor and modifies the color of the digital output of the sensor.

1 illustrates the optical and initial electrical portions of the present invention. Front and optics and electronics are used in all versions of cameras with this unique architecture. Light from the scene enters the lens 1 designed for high performance video products. The lens has three servo controlled settings: iris, focus and zoom (effective focal length). These three settings can be changed by input commands from the operator or the camera control unit (CCU). Control signals are received on the system control bus 16 and decoded by the optical decoder electronics 10. Then, the three lens settings are controlled by signals from the optical decoder electronics 10 via the line 13. Two sets of filter wheels 2 and 3, quarter waveplate 4, and low pass spatial optical filter 5 are installed after the lens. The filter of the first wheel 2 can be used for color correction, but the filter of the second wheel 3 is a neutral density filter that reduces the light density of the photosensor under bright sunlight conditions. Quarter waveplates and spatial lowpass filters reduce the video artifacts (waveforms) generated under certain conditions by the tessilated structure of the optical sensor. The present invention includes an optical prism assembly 6 used for two purposes: it splits the incident light into three beams exiting the light sensors 7, 8 and 9, providing an accurate spectral response of the light sensor. A dichotic filter on two inner surfaces. The dichroic filter is arranged such that red light from the scene is emitted to the light sensor 7, blue light is emitted to the light sensor 9, and green light is passed through the two filters to the light sensor 8.

The photosensors 7, 8, and 9 are pixel arrays of CMOS devices with a memory-like structure that are addressed by the address line 12 to scan into the device region and can be controlled by the decoding electronics 10. . In addition to scanning control, the control electronics also provide an optical sensor chip having a signal that controls the black level, the gain of the sensor (the sensitivity of the sensor to light), and the integration time of the sensor. When the optically active portion of the CMOS device is scanned, a digitized signal is generated by the CMOS light sensor. The digital value generated at the output of each light sensor is proportional to the light density of each pixel. Thus, three optical sensors provide three digital outputs (typically 10-12 bits each, for a total of 30-36 bits) representing a color tristimulus video signal. The sensor's output is directed to the front-end electronics, which perform the basic signal processing necessary to provide professional-quality video signals. 2 shows details of the front and electronics.

Front and electronics can be used with any version of the camera designed with this unique architecture. The order of the signal paths through the processing electronics may vary slightly depending on the application of the camera (eg, medical imaging, entertainment, movie film, etc.). The three-stimulus signals 15 from the photosensors (shown in FIG. 1, photosensors 7, 8, and 9) first appear in the defect pixel correction logic 201. Modify the value of the pixels The pixels appear defective by a test performed during camera manufacturing or during a test routine after the camera system is in operation Non-volatile memory 202 includes the address of each defective pixel. The defective pixel value is interpolated in logic from the pixel value of either of the pixels in this way, the defective pixel is assumed to be the luminance which is the average along the horizontal line of the nearest pixel. Appear in the correction logic 203.

Shading correction causes the signal outside this block to have zero when the light level inside the camera is zero. The correction eliminates 'offset' or system errors that can corrupt the video signal in the dynamic range. The shading correction unit subtracts a constant, prestored value from each digital input appearing on the unit. The prestored value is read in the modification unit of the system control bus 16.

An automatic gain adjustment (“AGC”) signal generator 204 provides a digital output that is proportional to the illumination of the center of the video picture. The AGC functions as a simple digital accumulator that sums the outputs of one or more sets of red, green, and blue channels based on a frame. Digital AGC data accumulates over time (integral periods) to measure the general illuminance of the scene. The data from the AGC output is used by other parts of the camera, especially the lens part that controls the iris of the lens. In this way, the video output of the camera remains relatively constant with changes in illuminance. In addition, the weight of the AGC output can be programmed to meet other needs. For example, when scanning a scene where the ground illuminance changes faster than the sky illuminance, the bottom of the frame becomes heavier than the top of the frame.

Nonlinearity compensation 205 is programmable into random access memory ("RAM"). The number of bits (usually 10 or 12) is the same for the input and the output. The data in RAM determines the transfer function between the digital inputs and the digital outputs of each of the three colors. The data in the RAM is provided by the system control bus and compensates for the inherent nonlinearity of the light sensor.

In the color modification matrix 206 any color can be changed for all other colors. Like the nonlinear compensation RAM, the color transform matrix is operated on the same number of bits (typically 30 or 36) for both input and output. However, in the color variant RAM, any two colors can affect the third color. In this way, any color (R ', G', B ') in the input can be reproduced in any other color (R ", G", B ").

In order to improve image quality, the present invention enables the introduction of nonlinearities in optical signals. This introduction is established by gamma corrected RAM. Gamma correction RAM 207 is similar in configuration to nonlinear compensation RAM. Gamma correction RAM accommodates data that allows the operator to adjust the input and output test levels, the maximum gain of the gamma curve in the test, and the overall gamma value. The transfer curve that forms the input to output for gamma correction is calculated using an exponential relationship that includes the number of bits (typically 10 or 12), the test level, and the clamp level.

Finally, finite impulse response (“FIR”) filter 208 provides a way to prevent signals out of band from being delivered to the camera output. The finite impulse response filter is based on a multi-accumulation function that prevents artificial artifacts generated by digital processing from being transmitted in the system. The response characteristic of the FIR filter is determined by the coefficients loaded into the multiplex register by the control bus.

Figure 3 shows details of the architecture of the back end electronics of the camera and the relationship of this architecture to studio equipment. Back-end electronics are used flexibly and perform optical features that minimize the risk of aging camera equipment. The input video signal 301 is routed to the format converter 302. The format converter consists of a large programmable logic array and corresponding memory that can convert the camera's internal parallel format into a different format that is more compatible with manufacturing, post-production, and transmission standards. From the format converter, the video signal can be recorded or transmitted over either of two downlinks (wireless or fiber optic cables).

In an electronic news gathering ("ENG") application, the camera is adapted to a digital data recorder 303 capable of recording audio and video information. The use of high density and economical media, such as magnetic or optical tapes, disks, or solid state recording techniques, provides a method of recording and playing back audio and video information obtained by a camera.

An alternative to direct recording of the video signal is to transmit the signal to the control room via a high frequency (“RF”) wireless telemetry down link 314. A pair of short-range wireless transceivers 304 and 308 provide a digital link between the camera and possibly studio equipment and between the studio camera control unit 307 and the camera. Because of the high data rate of the camera-studio transmission, the carrier frequency of the link is generally present in the 2.4 GHZ band (or higher frequency) and the typical operating power source is in the order of 0.25 watts to 1 watt. Wireless links are intended for short-range applications such as sports events, real-time news broadcasts, and studio applications where cables are not targeted. The wireless transceiver also provides uplink data for the studio camera control unit between the studio camera control unit 307 and the camera.

The optical fiber interface between the camera 305 and the control room 309 is intended for cameras of control room communication in a studio where cables can be received. Digital fiber optic connections provide wide bandwidth for video downlinks with high transmission reliability. The optical fiber link 359 also supports the transmission of commands from the studio camera control unit 307 during the uplink.

The local camera control unit 306 is attached to the camera to move on the system control bus 16 and generate a signal to preset the operating mode of the hardware shown in FIG. Similar and redundant units may preferably be located in the studio control room for remote operation of the camera. The camera control unit, like Philips' Inter IC or I ² C-bus, provides signals along an industry-standard serial bus. Data can be transmitted at speeds up to 100 kbit / s in standard mode or up to 400 kbit / s in high speed mode.

The invention also includes a new formatter 302 that can perform at least two methods in the conversion process. In the first method, shown in FIG. 4, one or more field programmable logic devices may be used as logic gates and registers required to convert a signal from one standard format to another. This programmable logic method has the advantages of speed (short transfer time between input signal and output signal) and economy. The disadvantage of this method is that the design requires special design tools. Design tools typically consist of software that configures the device for a specific application. However, the design of changing from one standard format to another needs to be done at once, but can be performed in several signal processors (eg HDTV cameras). The second method, shown in FIG. 5, involves the use of a general purpose video processor. Video processors are currently available from several manufacturers, including Philips. The data can be read from the memory, processed by the general purpose processor, and then read outside of the memory. If the processing speed is not sufficient to perform the conversion within one frame time of the picture, a multiprocessor may be used to widen the processing bandwidth. This method involves the use of software code to control the conversion of television signals from one standard format to another.

4 illustrates a field programmable logic array (“FPLA”) type flexible formatter 302. Digital video signal input is shown at 301 being input to FPLA 401. The array can consist of multiple interconnect gates, which can be programmed through a data input 409 that creates a logic network that changes the digital video format. Some conversions, such as conversion from a sequential signal to an interlaced signal, require a means of temporarily storing the sequential video signal so that the conversion can be performed. This means is provided by the video read / write memory 403. Video memory is coupled to the FPLA via data, address, and control lines 404. For analog output 407, digital-to-analog converter 405 may also be coupled to the output of the FPLA via data and control lines 406. For users in need of a digital signal, a direct digital connection can be made to the output of the FPLA at 408. The FPLA is programmed to convert from one particular format to another by the data provided at the FPLA programming port 409. This input accepts signals to program the interconnection of the gates.

5 illustrates an alternative embodiment of the flexible formatter 302 of the present invention. The formatter shown in FIG. 5 is a processor-type flexible formatter capable of obtaining the same conversion result as the FPLA formatter. However, the formatter uses different components for the conversion. While operating by software code stored in program read-only memory 503, digital video input signal 301 appears to video processor or processors for storage in video memory 403. Data, addresses, and control lines for video memory and program memory are shown as 404 and 504, respectively. When converted from a digital format to another digital format, the output 408 comes directly from the data terminal of the processor. If analog signal 407 is required, the digital representation of the analog signal is converted to analog by digital-to-analog converter 405 controlled by interface 406. The conversion control is performed by storing the conversion algorithm in the program read-only memory terminal 503.

The flexible formatter 302 of the present invention can convert the digital video signal 301 into any of a number of different user specified formats. In general, the digital video signal 301 is in a 1280x720 sequential format, but may also be a 720x480 sequential format. The output signal 408 is a plurality of formats including NTSC, PAL, 720 × 483 sequential format, 720 × 480 sequential format, 640 × 360 sequential format, 360 × 256 sequential format, 1920 × 1080 interlaced format, 720 × 483 interlaced format. It can be formed in different formats. The formatter 302 of the present invention may include multiple output terminals such that multiple signals can be generated simultaneously. For example, the present invention includes a formatter capable of simultaneously forming NTSC, interlaced, and sequential formats to accommodate television broadcast facilities that do not transmit only HDTV signals.

Those skilled in the art will appreciate that various modifications and changes can be made in the manufacture and construction of the invention without departing from the scope or spirit of the invention. Various modifications and variations can be made in the manufacture of front and electronic devices in the use of flexible formatters without departing from the scope and spirit of the invention. For example, correction of signal irregularities is unnecessary in all cases so that certain logic circuits can be eliminated. Accordingly, modifications and variations of the present invention are possible, provided that various modifications and changes are made within the scope and spirit of the appended claims.

Claims (19)

An optical sensor for generating a digital output; A front end electronics unit for receiving and processing the digital output from the optical sensor and generating a digital video signal; And A back end electronics unit for receiving and processing the digital video signal generated by the front end electronics unit and forming a format designated by the camera user, And the back-and-electronics unit comprises a flexible formatter capable of converting the digital video signal into a number of different formats. 2. The high definition digital television camera of claim 1, wherein the flexible formatter comprises a field programmable gate array. 3. The high definition digital television camera of claim 2, wherein the field programmable gate array converts the digital video signal from sequential format to interlaced format. 3. The high definition digital television camera of claim 2, wherein the flexible formatter comprises a storage medium for storing the digital video signal during conversion. The high definition digital television camera according to claim 2, wherein said flexible formatter includes a digital-analog converter for converting said digital video signal into an analog format. 3. The high definition digital of claim 2, wherein the flexible formatter further comprises a programming terminal for receiving data, wherein the control data controls the operation of the formatter and determines the format for the digital video signal. Television camera. 2. The high definition digital television camera of claim 1, wherein the flexible formatter comprises a general purpose video processor. 8. The high definition digital television camera of claim 7, wherein the flexible formatter further comprises a storage medium for storing the video signal during conversion. 9. The high definition digital television camera of claim 8, wherein the flexible formatter further comprises a read only memory device for storing program code for controlling the video processor and controlling the conversion of the video signal. 8. The high definition digital television camera according to claim 7, wherein said flexible formatter further comprises a digital to analog converter for converting said digital video signal into an analog format. The high definition digital television camera of claim 1, wherein the optical sensor further comprises an optical lens. The high definition digital television camera of claim 1, wherein the optical sensor further comprises an optical filter. The high definition digital television camera of claim 1, wherein the optical sensor further comprises an optical prism assembly. The high definition digital television camera according to claim 1, wherein said optical sensor is controlled by a control signal converted into an optical control signal by an optical decoder. The high definition digital television camera of claim 1, wherein the front end electronics unit further comprises defective pixel correction logic. The high definition digital television camera of claim 1, wherein the front end electronics unit further includes shading correction logic. The high definition digital television camera of claim 1, wherein the front end electronics unit further comprises a digital accumulator for controlling automatic gain. 2. The high definition digital television camera of claim 1, wherein the front and electronic device comprises a programmable random access memory that compensates for nonlinearity in the optical sensor. 2. The high definition digital television camera of claim 1, wherein the front and electronic device comprises a programmable random access memory for modifying the color of the digital output.