KR20010017215A - Horizontal and vertical edge detecting circuit and method thereof - Google Patents

Abstract

PURPOSE: A circuit and method for detecting horizontal and vertical edges are provided so that a processing speed can be increased by detecting the horizontal and vertical edges in hardware, namely an electronic circuit type. CONSTITUTION: A signal delay unit(50) receives an image signal from a camera, and delays a scanning line composing the image signal for a predetermined time. A detection unit(100) receives the delayed scanning line from the signal delay unit(50) and the non-delayed scanning line, compares the two scanning lines, and detects at least one horizontal or vertical edge. In the detection unit(100), a horizontal edge discriminating unit(60) receives the delayed scanning line and the non-delayed scanning line, and discriminates a horizontal edge by a difference of upper and lower pixels, an image discriminating unit(70) receives and filters the delayed scanning line, and discriminates division of the regions, and a vertical edge discriminating unit(80) receives the delayed scanning line, and discriminates the vertical edge by a difference of right and left pixels. Accordingly, the horizontal edge is not obtained in software type, but the horizontal and vertical edges are obtained in hardware, namely an electronic circuit type.

Description

Horizontal and vertical edge detecting circuit and method

The present invention relates to a horizontal and vertical edge detection circuit and method thereof, and more particularly to detect not only vertical edges but also horizontal edges from video signals to detect more accurate edge components. One horizontal and vertical edge detection circuit and its method.

In general, a broadcast through a television scans an image and transmits an electric signal according to the image. The electric signal is called a video signal and includes a synchronization signal and a blanking signal sync.

In distinguishing an area of an image from an image signal, a background color and an object are distinguished by a gray level. In other words, the gray level range of the object of interest is set to a threshold value different from the background, and it is determined whether the object area or the background area is compared with the input signal.

1A to 1B are diagrams for explaining an edge.

As shown in Fig. 1A, a video signal in which black (hatched portion) and white are divided in the direction of an arrow, i.e., left and right, is caused by an edge signal from "high" to "low" by an image signal including one synchronization signal. As an image, black (hatched) and white can be distinguished.

However, as shown in FIG. 1B, the video signal divided into black and white in the direction of the arrow, that is, up and down is divided into black and white images up and down by the video signal including one synchronization signal, so it is difficult to detect the edge signal.

2 is a circuit diagram illustrating an edge signal detection circuit according to the prior art.

As shown in the drawing, the edge signal detection circuit according to the prior art is a vertical edge signal detection method, which includes an area selection circuit 10 for inputting an image signal output from the camera 5 and selecting an area based on the gray level; A first noise canceling circuit 12 for removing noise by inputting an output of the selection circuit 10, and an edge detection circuit 14 for detecting an edge region from adjacent left and right pixels by inputting an image signal output from the camera 5; And a second noise canceling circuit 16 that inputs outputs of the first noise canceling circuit 12 and the edge detection circuit 14 to remove noise of adjacent upper and lower pixels.

Edge signal detection circuit according to the prior art configured as described above,

The video signal output from the camera 5 is input to the area selection circuit 10, and compared to compare the background color with the object by detecting a desired pixel. In this case, the gradation degree is information corresponding to the brightness of each pixel, as illustrated in the diagram for describing the gradation degree of FIG. 3, and has a value of 0 (black) to 255 (white). In addition, the middle part indicates that the black and white intermediate color, for example, the gradation degree of red is about 150.

In this way, the signals compared in the area selection circuit 10 are input to the first noise canceling circuit 12 so that the adjacent left and right pixels are regarded as noise, and the isolated parts are removed or restored in consideration of the continuity of the area. do. For example, a pixel that is supposed to exist on a horizontally continuous pixel while being divided into an object region is restored, or a small amount of pixels suddenly appearing on a continuous pixel that becomes white (pixels of "0") is removed to reduce noise. The considered signal is processed.

In addition, the edge detection circuit 14 inputs an image signal output from the camera 5 to obtain a difference in gray level in adjacent pixels in order to detect an edge area from adjacent left and right pixels, and obtains the third gray level difference. If it is larger than the reference value, it is determined as the vertical edge pixel.

Then, the second noise removing circuit 16 inputs the outputs of the first noise removing circuit 12 and the edge detection circuit 14 to remove noise of adjacent pixels. For example, by delaying inputting a horizontal scan line including a synchronization signal and a blanking signal appearing on the screen, the scan lines are compared with each other and judged as edge edges due to noise. The part will be removed or restored.

Accordingly, a vertical portion except for the horizontal portion on the quadrangle of the central portion illustrated in FIG. 3, that is, a vertical edge illustrated vertically in FIG. 4A is detected.

That is, the edge signal detection circuit according to the prior art according to the prior art detects the horizontal edge because a desired horizontal edge is detected only by processing the detected vertical edge using a predetermined software, for example, a window mask. In order to use a separate software or the horizontal edge is detected by such separate software, there is a problem that the processing speed of detecting the horizontal edge is very slow.

Accordingly, an object of the present invention for solving the above problems is to provide a horizontal and vertical edge detection circuit and method for detecting horizontal edge and vertical edge in hardware, that is, electronic circuitry, without obtaining the horizontal edge in software. It is.

1A to 1B are diagrams for explaining an edge.

2 is a circuit diagram illustrating an edge signal detection circuit according to the prior art.

3 is a diagram for explaining a gradation diagram.

4A to 4B are diagrams for describing the vertical edge and the horizontal edge.

5 is a diagram illustrating a horizontal and vertical edge detection circuit according to the present invention.

6 is a flowchart illustrating a horizontal and vertical edge detection method of FIG. 5.

<Explanation of symbols for main parts of drawing>

50 .. Signal delay circuit 60. Horizontal edge identification

70. Video ID 80. Vertical Edge ID

100 .. Detection circuit

In order to achieve the above object, the horizontal and vertical edge detection circuit of the present invention comprises: signal delay means for inputting an image signal output from a camera and delaying a scanning line constituting the image signal for a predetermined time; And detection means for inputting the delayed scanning line output from the signal delay means and the scanning line before the delay, and detecting at least one of a horizontal edge or a vertical edge by comparing whether different portions exist in each of the input scanning lines. Characterized in that it comprises a.

The detection means may include: a horizontal edge identification unit for inputting the delayed scan line and the non-delayed scan line output from the signal delay means and identifying horizontal edges due to differences between adjacent up and down pixels from their difference signals; An image identification unit which inputs and filters the delayed scan line from among the scan lines output from the signal delay unit, and identifies division of an area; And a vertical edge identification unit for inputting the delayed scan line to identify vertical edges by a difference between adjacent left and right pixels, wherein outputs of the horizontal edge identification unit and the image identification unit both satisfy a predetermined threshold condition. A horizontal edge signal is detected, and a vertical edge signal is detected when both the output of the image identification unit and the vertical edge identification unit satisfy a predetermined threshold condition.

In order to achieve the above object, a horizontal and vertical edge detection circuit according to another embodiment of the present invention inputs an image signal output from a camera and delays a scanning line constituting the image signal for a predetermined time. Way; Horizontal edge identification means for inputting a scan line delayed by the signal delay means and a scan line before the delay to identify edges of the upper and lower pixels from the difference signals; And image identification means for inputting and filtering the delayed scan line among the scan lines output from the signal delay means, and identifying division of an area, wherein both the horizontal edge identification means and the output of the image identification means have predetermined threshold values. When the condition is satisfied, the horizontal edge signal is detected.

In order to achieve the above object, the horizontal and vertical edge detection method of the present invention comprises the steps of: inputting an image signal output from the camera; Delaying a scanning line constituting an image signal for a predetermined time; And inputting the delayed scan line and the scan line before the delay and comparing at least one of a horizontal edge or a vertical edge by comparing whether a different portion exists in each of the input scan lines.

The detecting may include: a first step of identifying horizontal edges of adjacent upper and lower pixels by inputting the delayed scanning line and the scanning line before being delayed in the delaying step; A second step of identifying a division of an area by inputting the delayed scan line among the scan lines output from the signal delay means; A third step of identifying a vertical edge due to a difference between adjacent left and right pixels by inputting the delayed scanning line; Determining whether both the horizontal edge and the division result of the area identified in the first step and the second step satisfy a predetermined threshold condition; Detecting a horizontal edge signal when both of the determination results of the first step and the second step satisfy a predetermined threshold condition; Determining whether both the division and the vertical edge of the area identified in the second step and the third step satisfy a predetermined threshold condition; And detecting a vertical edge signal when the determination result of the second step and the third step satisfies a predetermined threshold condition.

Hereinafter, the configuration and operation of the present invention will be described in more detail with reference to the accompanying drawings.

5 is a diagram illustrating a horizontal and vertical edge detection circuit according to the present invention.

As shown, the horizontal and vertical edge detection circuit according to the present invention includes a signal delay circuit 50 as a signal delay means and a detection circuit 100 as a detection means.

The signal delay circuit 50 inputs an image signal output from the camera 5 and inputs and delays any one scanning line among successive scanning lines of the image signal. A converter 52 for converting to a digital signal, a latch portion 54 for latching a signal, and a line delay 56 and 58 for receiving and delaying scanning lines. do.

That is, while the video signal output from the camera 5 passes through the converter 52, the analog signal is converted into a digital signal, and the video signal latched through the latch unit 54 is immediately output or the line delay unit ( The output is delayed at least once through 56 and 58.

The detection circuit 100 inputs each scan line which is delayed and output from the signal delay circuit 50, and compares whether different portions exist in each of the input scan lines, and at least one of the horizontal edge and the vertical edge. In this embodiment, the horizontal edge identification unit 60, the image identification unit 70, and the vertical edge identification unit 80 are included.

The horizontal edge identification unit 60 inputs different scan lines that are delayed and output from the signal delay circuit 50 to identify horizontal edges due to differences of adjacent pixels from their difference signals. The detection unit (| AB |) 61, the comparison unit 62, the noise processing unit 69, and the latch unit 66 are included.

The signal difference detection unit 61 inputs different scan lines which are delayed and output from the latch unit 54 and the line delay unit 58 of the signal delay circuit 50 to detect these difference signals.

In this case, in order to detect a desired pixel, the difference signal must be filtered to a predetermined reference value to differentiate it from noise. Therefore, the comparison unit 62 filters the input signal by inputting the output of the signal difference detection unit 61 and limiting the comparison to a predetermined reference value.

The noise processor 69 processes the noise by inputting the output of the comparator 62. In an exemplary embodiment, the noise processor 69 delays the signals 63a, 63b, 63c, and delays 63a, 63b ( An AND gate 64 for combining the delayed outputs at 63c and an OR gate 65 for inputting the output of the AND gate 64, respectively, and the output signal is latched in the latch portion 66.

The image identification unit 70 inputs and filters the scan lines output from the latch unit 54 and the line delay unit 56 of the signal delay circuit 50, and identifies the division of the region. 71), 72, AND gate 77, noise processor 79, and latch 76.

The comparators 71 and 72 compare the size of the input scanning line with a predetermined reference value set to a maximum value and a minimum value to filter the signal within the maximum value and the minimum value so as to be an appropriate value of the desired signal.

The noise processor 79 processes the noise by inputting the output of the AND gate 77. In an embodiment, the noise processor 79 delays the signals 63a, 63b, 63c, and delays 63a, 63b (which delay the signal). An AND gate 64 for combining the delayed outputs at 63c) and an OR gate 65 for inputting the outputs of the AND gate 64, respectively, and the output signal is latched in the latch portion 76.

The vertical edge identification unit 80 inputs a scan line delayed by the line delay unit 56 of the signal delay circuit 50 to identify a vertical edge due to a difference between adjacent left and right pixels, and the delay unit 81a. 81b, a signal difference detector 82, a comparator 83, and a scan line detector 88 are included.

The delay units 81a and 81b input delayed scan lines from the line delay unit 56 of the signal delay circuit 50 so that at least one unit of information is delayed.

The signal difference detector 82 inputs each of the delayed signals that are at least one or more output from the delay units 81a and 81b to detect these difference signals.

The comparison unit 83 filters the output of the signal difference detection unit 82 by comparing the output with the predetermined reference value.

The scan line detector 88 includes line delay units 87a and 87b, an AND gate 84, and an OR gate 85.

The line delay units 87a and 87b shift the digital signal such that at least one information unit of the digital signal is delayed by, for example, a bit unit while passing through the scan line output from the comparator 83.

The AND gate 84 compares the output of the comparator 83 and the scan lines output from each of the line delay units 87a and 87b to detect whether they all satisfy a predetermined threshold condition, for example, a threshold value or more. The detected signal is output through the OR gate 85. In this case, the signal detected by the difference between the left and right pixels included in the scan line among the continuous scan lines means a vertical edge.

In addition, the horizontal edge identification unit 60, the image identification unit 70, and the vertical edge identification unit 80 may include latch units 66, 76, and 86 for latching a signal at an output terminal thereof.

The AND gate 92 detects a horizontal edge signal when the outputs of the horizontal edge identification unit 60 and the image identification unit 70 satisfy a predetermined threshold condition, for example, when the threshold value is greater than or equal to a threshold value. 94 outputs the vertical edge signal when the outputs of the image identification unit 70 and the vertical edge identification unit 80 satisfy a predetermined threshold condition, for example, when the output exceeds the threshold value.

Hereinafter, a horizontal and vertical edge detection circuit according to the present invention configured as described above will be described with reference to a flowchart showing a horizontal and vertical edge detection method of FIG. 6.

First, an image signal output from the camera 5 is input.

That is, the signal output from the camera 5 is converted by the converter 52 and latched in the unit of horizontal scan line by the latch unit 54.

The line delay units 56 and 58 delay the scanning lines constituting the video signal for a predetermined time.

That is, the scan line output from the latch unit 54 is delayed at least once through the line delay units 56 and 58, and in an embodiment, at least one bit of the digital signal is delayed.

Then, the delayed scan line and the delayed scan line are input, and at least one of the horizontal edge and the vertical edge is detected by comparing whether different portions exist in each of the input scan lines. (104 to 142)

That is, the scanning lines delayed by the line delay units 56 and 58 and the scanning lines before the delay output from the latch unit 54 are input to identify horizontal edges of adjacent upper and lower pixels. (104 to 108)

At this time, the scan lines delayed through the line delay units 56 and 58 of the signal delay circuit 50 and the scan lines before the delay output from the latch unit 54 are input to the signal difference detector 61 so that the difference signals thereof are input. Is detected. (104)

Then, in order to detect a desired pixel, the difference signal is filtered by a predetermined reference value and filtered by comparing the detected difference signal by a predetermined reference value in the comparator 62 to differentiate it from noise.

In this way, it is determined whether the signal before the delay and the delayed at least one signal satisfy the predetermined threshold condition in the noise processor 69.

That is, the filtered signal is delayed by at least one unit of information, for example, a bit, through each delay unit 63a, 63b, 63c through the noise processor 69, and each delay unit ( The outputs of the 63a, 63b, and 63c are combined to be the inputs of the AND gate 64. As a result, an output is generated at the OR gate 65 when the outputs of each of the delay units 63a, 63b, 63c become " high ". At this time, since at least one bit unit is shifted, a horizontal edge, that is, an edge generated horizontally by a signal output through the OR gate 65 is determined by comparing delayed scan lines in the AND gate 64, respectively. The signal can be detected.

Further, among the scan lines output from the signal delay circuit 50, the delayed scan lines are inputted through the line delay units 56 and 58 to identify the division of the region. (110 to 112)

In other words, the delayed scanning lines output from the line delay unit 58 of the signal delay circuit 50 are input to each of the comparison units 71 and 72 and filtered by limiting the maximum and minimum values by the respective reference values. (110)

At this time, when the signals output from the respective comparators 71 and 72 are all "high", the output is generated through the AND gate 77. That is, an output is generated when all the reference values of each of the comparators 71 and 72 are satisfied.

Then, the filtered signal is input to the noise processor 79 to determine whether all of the predetermined threshold conditions are satisfied.

That is, the filtered signal causes the noise processor 79 to delay at least one unit of information, for example, a bit, through each of the delay units 63a, 63b, and 63c. The outputs of the 63a, 63b and 63c are combined and input to the AND gate 64. Accordingly, when the outputs of each of the delay units 63a, 63b, 63c become " high, " an output is generated at the OR gate 65. This means that the pixel region is divided.

As a result, the signal whose range is limited by the maximum value and the minimum value is filtered by the AND gate 64, respectively, to determine a signal indicating that the area of the pixel is divided.

On the other hand, among the scan lines output from the signal delay circuit 50, the scan lines delayed by the line delay unit 56 are input to identify vertical edges due to the difference between adjacent left and right pixels. (120 to 124)

That is, the scan lines delayed by the line delay unit 56 from among the scan lines output from the signal delay circuit 50 are input to the delay units 81a and 81b to delay the signal so that at least one unit of information is delayed. )

The outputs of the respective delay units 81a and 81b are input to the signal difference detector 82 to compare at least one delayed signal with a signal before the delay and detect these difference signals.

In order to detect a desired pixel, the difference signal is filtered to a predetermined reference value to differentiate it from noise. That is, the difference signal output from the signal difference detector 82 is input to the comparator 83 and filtered based on a predetermined reference value.

The filtered signal is not a noise signal but a desired signal. A portion of the filtered signal is input to the line delay units 87a and 87b of the scan line detector 88, and the horizontal scan line is delayed by one line. The line delay units 87a and 87b shift the digital signal such that at least one information unit of the signal is delayed while passing through the scan line output from the comparator 83. The AND gate 84 inputs a combination of the outputs of the comparator 83 and the horizontal scan line signals output from the respective line delay units 87a and 87b, all of which satisfy a predetermined threshold condition. Will be detected.

That is, the respective vertical scan lines output from the line delay portions 87a and 87b are compared with each other at the AND gate 84 so that vertical edge components represented in the vertical phase are determined and detected, and the detected signals are OR gate 85. Output through

Then, it is determined whether both the output of the horizontal edge determined in 108 and the divided output of the region in 112 satisfy a predetermined threshold condition.

That is, the signals output through the latch units 66 and 76 from the horizontal edge identification unit 60 and the image identification unit 70 are input to the AND gate 92 so that both results are “high”. Output is generated.

As a result, when the two results satisfy the predetermined threshold condition while passing through the AND gate 92, a horizontal edge signal is detected.

In FIG. 4A of the prior art, a horizontal line is detected which connects both vertical lines to form a quadrangle as shown in FIG. 4B.

On the other hand, it is determined whether the divided output of the area identified at 112 and the output of the vertical edge at 124 satisfy a predetermined threshold condition.

That is, the signals output through the latch units 76 and 86 from the image identification unit 70 and the vertical edge identification unit 80 are input to the AND gate 94 so that both results are "high". Output is generated.

As a result, when the two results satisfy the predetermined threshold condition while passing through the AND gate 94, the horizontal edge signal is detected.

As described above, according to the present invention, by inputting the video signal output from the camera to delay the scanning line included in the video signal, compare the scanning line before the delay and the scanning line delayed at least one time, respectively, horizontal and vertical edges By processing to detect, horizontal and vertical edge signals are detected.

The drawings and specification are merely exemplary of the invention, which are used for the purpose of illustrating the invention only and are not intended to limit the scope of the invention as defined in the appended claims or claims. Therefore, those skilled in the art will understand that various modifications and equivalent other embodiments are possible from this. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

According to the present invention, the horizontal edge and the vertical edge are detected in hardware, that is, electronic circuitry, unlike in the conventional art, in which the horizontal edge is represented in software, the processing speed for obtaining the horizontal edge is increased. There is an advantage that no separate software is used.

Claims (13)

Signal delay means for inputting an image signal output from the camera and delaying a scanning line constituting the image signal for a predetermined time; And A detection means for inputting the delayed scanning line outputted from the signal delay means and a scanning line before delaying, and detecting at least one of a horizontal edge or a vertical edge by comparing whether different portions exist in each of the input scanning lines; Horizontal and vertical edge detection circuit comprising a. The method of claim 1, wherein the detecting means, A horizontal edge identification unit for inputting the delayed scan line and the non-delayed scan line output from the signal delay means and identifying horizontal edges due to differences of adjacent pixels from their difference signals; An image identification unit which inputs and filters the delayed scan line from among the scan lines output from the signal delay unit, and identifies division of an area; And A vertical edge identification unit for inputting the delayed scan line and identifying vertical edges by a difference between adjacent left and right pixels, The horizontal edge signal is detected when both the horizontal edge identification unit and the image identification unit output satisfy a predetermined threshold condition, and the outputs of the image identification unit and the vertical edge identification unit both satisfy a predetermined threshold condition. The vertical and horizontal edge detection circuit characterized in that for detecting the vertical edge signal. The method of claim 2, wherein the horizontal edge identification unit, A signal difference detector for detecting a difference signal by inputting scan lines which are differently delayed by the signal delay means; A comparator for inputting an output of the signal difference detector and filtering the filter to a predetermined reference value; And And a noise processing unit for processing noise by inputting the output of the comparing unit. The method of claim 2, wherein the image identification unit, A comparator for inputting the delayed scan line from among the scan lines output from the signal delay means and filtering the signal to be within a predetermined maximum value and a predetermined minimum value; And And a noise processing unit for processing noise by inputting the output of the comparing unit. The method of claim 2, wherein the vertical edge identification unit, A delay unit configured to input the delayed scan line to delay at least one unit of information; A signal difference detector which inputs each delayed signal that is at least one output from the delay unit, and compares the input signals to detect the difference signals; And And a comparator for inputting an output of the signal difference detector and filtering the filter to a predetermined reference value. The method of claim 5, wherein the vertical edge identification unit, Input a scan line output from the comparator so that at least one unit of information is delayed, and compares a delayed signal that is at least one or more with a scan line that includes a signal before the delay to satisfy a predetermined threshold condition. Horizontal and vertical edge detection circuit comprising a scanning line detection unit for detecting the edge. The method of claim 1, wherein the signal delay means, And at least one line delay unit configured to input and delay a scan line among the image signals output from the camera. Inputting an image signal output from a camera; Delaying a scanning line constituting an image signal for a predetermined time; And Inputting the delayed scanning line and the scanning line before the delay, and comparing at least one of a different portion in each of the input scanning lines and detecting at least one of a horizontal edge and a vertical edge. Vertical edge detection method. The method of claim 8, wherein the detecting step, A first step of identifying horizontal edges of adjacent upper and lower pixels by inputting the delayed scanning line and the scanning line before being delayed in the delaying step; A second step of identifying a division of an area by inputting the delayed scan line among the scan lines output from the signal delay means; A third step of identifying a vertical edge due to a difference between adjacent left and right pixels by inputting the delayed scanning line; Determining whether both the horizontal edge and the division result of the area identified in the first step and the second step satisfy a predetermined threshold condition; Detecting a horizontal edge signal when both of the determination results of the first step and the second step satisfy a predetermined threshold condition; Determining whether both the division and the vertical edge of the area identified in the second step and the third step satisfy a predetermined threshold condition; And And detecting a vertical edge signal when the determination result of the second step and the third step satisfies a predetermined threshold condition. The method of claim 9, wherein the first step of identifying, Detecting the difference signal by inputting the delayed scanning line and the scanning line before being delayed in the delaying step; Filtering the detected difference signal according to a predetermined reference value; And Causing at least one unit of information to be delayed in the input signal, and determining whether both the signal before the delay and the delayed at least one signal satisfy a predetermined threshold condition. Detection method. The method of claim 9, wherein the identifying of the second step comprises: Inputting the delayed scanning line outputted from the signal delay means and filtering by a predetermined reference value; And Causing the at least one unit of information to be delayed in the filtered signal, and determining whether both the signal before the delay and the delayed at least one signal satisfy a predetermined threshold condition. Edge detection method. The method of claim 9, wherein the third step of identifying comprises: Delaying a signal by inputting the delayed scan line to delay at least one unit of information; Comparing the at least one delayed signal with a signal before the delay and detecting a difference signal thereof; And And inputting the difference signal to filter a predetermined reference value. Signal delay means for inputting an image signal output from the camera and delaying a scanning line constituting the image signal for a predetermined time; Horizontal edge identification means for inputting a scan line delayed by the signal delay means and a scan line before the delay to identify edges of the upper and lower pixels from the difference signals; And And a video identification means for inputting and filtering the delayed scan line among the scan lines output from the signal delay means, and identifying division of an area. And a horizontal edge signal is detected when both the horizontal edge identification means and the output of the image identification means satisfy a predetermined threshold condition.