KR20010017082A - Treatment method of surface of semiconductor substrate - Google Patents
Treatment method of surface of semiconductor substrate Download PDFInfo
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- KR20010017082A KR20010017082A KR1019990032416A KR19990032416A KR20010017082A KR 20010017082 A KR20010017082 A KR 20010017082A KR 1019990032416 A KR1019990032416 A KR 1019990032416A KR 19990032416 A KR19990032416 A KR 19990032416A KR 20010017082 A KR20010017082 A KR 20010017082A
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- boron compound
- substrate
- semiconductor substrate
- surface treatment
- treatment method
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- 239000000758 substrate Substances 0.000 title claims abstract description 44
- 239000004065 semiconductor Substances 0.000 title claims abstract description 32
- 238000000034 method Methods 0.000 title claims abstract description 26
- 150000001639 boron compounds Chemical class 0.000 claims abstract description 25
- 238000004381 surface treatment Methods 0.000 claims abstract description 17
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 11
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 11
- 239000007788 liquid Substances 0.000 claims abstract description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 5
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 5
- 239000010703 silicon Substances 0.000 claims abstract description 5
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims abstract description 4
- 238000004519 manufacturing process Methods 0.000 claims description 7
- WTEOIRVLGSZEPR-UHFFFAOYSA-N boron trifluoride Chemical compound FB(F)F WTEOIRVLGSZEPR-UHFFFAOYSA-N 0.000 claims description 3
- LALRXNPLTWZJIJ-UHFFFAOYSA-N triethylborane Chemical compound CCB(CC)CC LALRXNPLTWZJIJ-UHFFFAOYSA-N 0.000 claims description 3
- ILAHWRKJUDSMFH-UHFFFAOYSA-N boron tribromide Chemical compound BrB(Br)Br ILAHWRKJUDSMFH-UHFFFAOYSA-N 0.000 claims description 2
- -1 tri-i-propylborane Chemical compound 0.000 claims description 2
- CMHHITPYCHHOGT-UHFFFAOYSA-N tributylborane Chemical compound CCCCB(CCCC)CCCC CMHHITPYCHHOGT-UHFFFAOYSA-N 0.000 claims description 2
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 claims description 2
- MXSVLWZRHLXFKH-UHFFFAOYSA-N triphenylborane Chemical compound C1=CC=CC=C1B(C=1C=CC=CC=1)C1=CC=CC=C1 MXSVLWZRHLXFKH-UHFFFAOYSA-N 0.000 claims description 2
- HWWBSHOPAPTOMP-UHFFFAOYSA-N tritert-butylborane Chemical compound CC(C)(C)B(C(C)(C)C)C(C)(C)C HWWBSHOPAPTOMP-UHFFFAOYSA-N 0.000 claims description 2
- 229910015900 BF3 Inorganic materials 0.000 claims 1
- ZMPKTELQGVLZTD-UHFFFAOYSA-N tripropylborane Chemical compound CCCB(CCC)CCC ZMPKTELQGVLZTD-UHFFFAOYSA-N 0.000 claims 1
- 150000004767 nitrides Chemical class 0.000 abstract description 2
- 239000002253 acid Substances 0.000 description 7
- 238000000059 patterning Methods 0.000 description 6
- SECXISVLQFMRJM-UHFFFAOYSA-N N-Methylpyrrolidone Chemical compound CN1CCCC1=O SECXISVLQFMRJM-UHFFFAOYSA-N 0.000 description 4
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- 239000002841 Lewis acid Substances 0.000 description 2
- 150000007517 lewis acids Chemical class 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- UPDFHUBKTDTHLI-UHFFFAOYSA-N C(CC)B(CCC)CCC.C(CC)B(CCC)CCC Chemical compound C(CC)B(CCC)CCC.C(CC)B(CCC)CCC UPDFHUBKTDTHLI-UHFFFAOYSA-N 0.000 description 1
- 239000003929 acidic solution Substances 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000009835 boiling Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
- 230000008016 vaporization Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Abstract
Description
본 발명은 반도체 소자의 제조 공정 중 반도체 기판의 표면 처리 방법에 관한 것으로 더 상세하게는 기체 또는 액체 상태의 붕소화합물을 이용하여 반도체 기판의 표면처리를 해 줌에 따라 레지스트 패턴의 푸팅(footing)현상을 제거해 줄 수 있도록 하는 반도체 기판의 표면처리 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for treating a surface of a semiconductor substrate during a manufacturing process of a semiconductor device, and more particularly, a footing phenomenon of a resist pattern according to surface treatment of a semiconductor substrate using a boron compound in a gas or liquid state. The present invention relates to a surface treatment method of a semiconductor substrate capable of removing the ions.
최근 반도체 기술이 발전하면서 소자의 집적도의 증가에 따라 점점 더 초미세 패턴을 형성시켜야 하는데 이러한 목적을 위하여 포토 애시드 제너레이터(Photo Acid Generator; PAG)를 이용한 케미컬리 앰플리파이드 레지스트(Chemically Amplified Resist; CAR)를 사용하게 되었다.With the recent development of semiconductor technology, it is necessary to form more and more fine patterns as the density of devices increases. For this purpose, chemically amplified resist using a photo acid generator (PAG) is used. Was used.
하지만 CAR을 사용하는 경우에는 생성된 H+가 레지스트 표면에 흡착된 암모니아나 엔엠피(N-methyl pyrrolidinone; NMP)등과 산, 염기 반응을 통해 약산으로 변하여 티탑(T-top) 형태의 프로파일을 만들거나 혹은 기판으로 사용되는 실리콘 나이트라이드(SiN), 티타늄나이트라이드(TiN), 실리콘 옥시나이트라이드( SiON) 등의 표면에 존재하는 -NH2기와 반응하여 약산으로 변함으로 인해 패턴의 푸팅(footing)현상을 야기시키는 문제점을 가지고 있다. 그 중 특히 패턴의 푸팅현상은 에치 프로파일(etch profile)에 그대로 영향을 미칠 뿐 아니라 포토 리소그래피 공정 중 CD(Critical Dimension) 측정에 큰 난점으로 작용하여 공정의 신뢰성 측면에서 큰 문제가 되어왔다. 상기한 푸팅현상이 일어나는 원리를 첨부한 하기 도 1에 나타내었다.However, in the case of using CAR, the generated H + is converted to weak acid through acid and base reaction with ammonia or N-methyl pyrrolidinone (NMP) adsorbed on the resist surface to form a T-top profile. Or patterning of the pattern due to reaction with -NH 2 groups on the surface of silicon nitride (SiN), titanium nitride (TiN), silicon oxynitride (SiON), etc., which are used as a substrate, and then to weak acid. It has a problem that causes the phenomenon. In particular, the patterning phenomenon of the pattern not only affects the etch profile as it is, but also acts as a big difficulty in measuring the CD (Critical Dimension) during the photolithography process. The principle in which the above footing phenomenon occurs is shown in Figure 1 below.
도 1에서 기판이 실리콘나이트라이드(SiN)인 경우 표면에 존재하는 -NH2기에 의해 생성된 H+가 약산으로 변함으로 인해 패턴 푸팅이 생기는 것에 관한 도면이다. 또한 첨부한 하기 도 2 는 실제 패턴의 푸팅현상이 야기된 경우의 단면 SEM(Scanning Electro Microscope) 사진이다.In FIG. 1, when the substrate is silicon nitride (SiN), the pattern footing occurs due to the change of H + generated by the -NH 2 group present on the surface into a weak acid. In addition, FIG. 2 is a cross-sectional SEM (Scanning Electro Microscope) photograph when the footing phenomenon of the actual pattern is caused.
현재까지 이러한 푸팅현상의 제거를 위해서는 하드마스크 공정, 유기 반사방지막의 사용, O2어닐 등의 방식을 이용하고 있으나 이러한 공정들이 추가될 경우 완전한 하나의 공정단계가 추가됨으로써 인하여 시간적, 비용적으로 많은 손실이 있는 실정이다.Until now, the removal of the footing phenomenon has been done by using a hard mask process, the use of an organic anti-reflection film, O 2 annealing, etc. However, if these processes are added, a single complete process step is added, resulting in a lot of time and cost There is a loss.
본 발명은 기존의 CAR을 이용하여 패턴을 형성하는 경우에 발생하는 패턴의 푸팅현상이 제거된 초미세패턴의 형성을 가능케 하여 에치프로파일의 안정화. 신뢰성 있는 CD 콘트롤, 레지스트 잔유물의 감소 및 측벽의 요철 발생의 감소효과를 얻을 수 있도록 하는 신규한 반도체 기판의 표면 처리방법을 제공하는 데에 그 목적이 있다.The present invention stabilizes the etch profile by enabling the formation of an ultra-fine pattern from which the patterning phenomenon occurring when a pattern is formed using an existing CAR is removed. It is an object of the present invention to provide a novel method for treating a surface of a semiconductor substrate, which can achieve reliable CD control, reduction of resist residues, and reduction of unevenness of sidewalls.
하기 도 1 은 실리콘나이트라이드 기판위에 CAR(Chemically Amplified Resist)을 이용하여 패턴을 형성할 경우 푸팅(footing)현상이 발생하는 원리를 도시한 도면이며,FIG. 1 is a view illustrating a principle in which footing occurs when a pattern is formed on a silicon nitride substrate using CAR (Chemically Amplified Resist).
하기 도 2 는 상기한 원리에 의하여 실제 푸팅현상이 일어난 일례를 보여주는 SEM(Scanning Electro Microscope)사진이며,2 is a scanning electron microscope (SEM) photograph showing an example in which an actual footing phenomenon occurs according to the above principle,
하기 도 3 은 본 발명의 반도체 기판의 표면 처리방법에 의하여 실리콘 기판의 표면을 처리하는 푸팅현상이 억제되는 원리를 도시한 도면이다.3 is a view illustrating a principle in which a footing phenomenon of treating a surface of a silicon substrate is suppressed by a surface treatment method of a semiconductor substrate of the present invention.
상기한 목적을 달성하기 위하여 본 발명은 반도체 제조 공정 중 포토리소그래피 공정에 있어서 붕소화합물을 이용하여 반도체 기판을 표면처리 하는 것을 특징으로 하여 구성되어 있다.In order to achieve the above object, the present invention is characterized in that the surface treatment of the semiconductor substrate using a boron compound in the photolithography process of the semiconductor manufacturing process.
본 발명에 따른 반도체 기판의 표면처리 방법에 있어서, 반도체 기판은 실리콘 나이트라이드, 티타늄 나이트라이드 및 실리콘 옥시나이트라이드 기판 중 선택된 하나로 하는 것이 적합하다.In the surface treatment method of the semiconductor substrate according to the present invention, it is suitable that the semiconductor substrate is one selected from silicon nitride, titanium nitride and silicon oxynitride substrate.
본 발명에 따른 반도체 기판의 표면처리 방법에 있어서, 붕소화합물은 기체상태의 붕소화합물을 이용하거나 또는 액체상태의 붕소화합물 배쓰(bath)를 이용하는 것이 적합하다.In the method for treating a surface of a semiconductor substrate according to the present invention, it is preferable that the boron compound uses a gaseous boron compound or a liquid boron compound bath.
본 발명에 따른 반도체 기판의 표면처리 방법에 있어서, 상기 붕소화합물은 트리에틸보란 (triethylboran), 트리-n-프로필보란 (tri-n-propylboran), 트리-i-프로필보란 (tri-i-propylboran), 트리-n-부틸보란 (tri-n-butylboran), 트리-t-부틸보란 (tri-t-butylboran), 트리페닐보란 (triphenylboran), 트리플루오로보란 (trifluoroboran), 트리클로로보란 (trichloroboran), 트리브로모보란 (tribromoboran) 및 분자량 300 이하의 트리알킬보란 (trialkylboran)으로 이루어진 그룹에서 선택된 것을 사용하는 것이 바람직하다.In the method for treating a surface of a semiconductor substrate according to the present invention, the boron compound is triethylboran (triethylboran), tri-n-propylboran (tri-n-propylboran), tri-i-propylboran (tri-i-propylboran ), Tri-n-butylboran, tri-t-butylboran, triphenylboran, trifluoroboran, trifluoroboran, trichloroboran ), Tribromoboran and trialkylboran having a molecular weight of 300 or less are preferably used.
본 발명에 따른 반도체 기판의 표면처리 방법에 있어서, 기체상태의 붕소화합물 사용시의 오븐 온도는 60 ~ 300℃ 로 하는 것이 바람직하다.In the surface treatment method of the semiconductor substrate which concerns on this invention, it is preferable that oven temperature at the time of using a boron compound of a gaseous state shall be 60-300 degreeC.
본 발명에 따른 반도체 기판의 표면 처리 방법에 있어서, 액체 상태의 붕소화합물 사용시의 배쓰(bath) 온도는 20 ~ 200℃ 로 하는 것이 바람직하다.In the surface treatment method of the semiconductor substrate which concerns on this invention, it is preferable that the bath temperature at the time of using a boron compound of a liquid state shall be 20-200 degreeC.
상기한 바와 같은 방법에 의하여 본 발명은 붕소화합물을 이용하여 반도체 기판의 표면을 처리하는 것으로 나이트라이드 성분이 함유된 반도체 기판의 -NH2기에 루이스 산(Lewis acid)으로 작용할 수 있는 붕소화합물을 고온의 기체 상태에서 표면 처리해 줌으로써 기판 표면에 존재하는 -NH2를 PAG에서 생성되는 H+로부터 격리시키는 방법에 의하여 H+의 손실을 방지하여 이로부터 야기되는 패턴의 푸팅현상을 없앨 수 있도록 하는 것이다.According to the method described above, the present invention treats the surface of a semiconductor substrate using a boron compound, and the boron compound which can act as Lewis acid on -NH 2 group of the nitride-containing semiconductor substrate is subjected to high temperature. By surface treatment in the gaseous state, -NH 2 present on the substrate surface is isolated from H + generated in PAG to prevent the loss of H + , thereby eliminating the patterning resultant.
이하 본 발명의 적절한 실시예를 나타낸 첨부한 도면을 참조하여 본 발명의 구성을 좀 더 자세히 설명하고자 한다.Hereinafter, with reference to the accompanying drawings showing a preferred embodiment of the present invention will be described in more detail the configuration of the present invention.
하기 도 1 은 실리콘나이트라이드 기판위에 CAR을 이용하여 패턴을 형성할 경우 푸팅현상이 발생하는 원리를 도시한 도면이다.1 is a view illustrating a principle in which a footing phenomenon occurs when a pattern is formed using a CAR on a silicon nitride substrate.
또한 하기 도 2 는 도 1 에서 도시한 원리에 의하여 실제 푸팅현상이 일어난 일례를 보여주는 SEM 사진이다.In addition, FIG. 2 is an SEM photograph showing an example in which an actual footing phenomenon occurs according to the principle shown in FIG. 1.
하기 도 3 은 본 발명의 반도체 기판의 표면처리 방법에 의하여 실리콘나이트라이드 기판의 표면을 처리한 경우 푸팅현상이 제거되는 원리를 도시한 도면이다.3 is a view illustrating a principle in which the footing phenomenon is removed when the surface of the silicon nitride substrate is treated by the surface treatment method of the semiconductor substrate of the present invention.
실제로 패턴의 푸팅 현상은 하기 도 1 에 나타난 바와 같이 PAG (Photo Acid Generator)로부터 생성된 H+가 기판 표면의 -NH2기와 만나 약산으로 변함으로 인하여 순수한 H+가 손실되는 데에 따른 것이다.In fact, the patterning phenomena of the pattern is due to the loss of pure H + due to H + generated from the PAG (Photo Acid Generator) meets the -NH 2 group on the substrate surface as a weak acid, as shown in Figure 1 below.
상기한 바와 같은 원리에 의하여 실리콘나이트라이드 기판의 표면에 CAR를 이용하여 패터닝할 경우 푸팅 현상이 발생한 일례를 하기 도 2 에서 보여주고 있다.2 shows an example in which a footing phenomenon occurs when the CAR is patterned on the surface of the silicon nitride substrate by the principle as described above.
본 발명에서는 이러한 반도체 기판의 표면에 발생하는 푸팅현상의 제거를 위하여 하기 도 3 에 나타낸 바와 같이 기판 표면의 -NH2기와 결합을 매우 잘 하고 강산성 수용액 속에서도 그 결합이 깨어지지 않는 루이스 산(Lewis acid)으로서 끓는 점이 낮은 붕소 화합물을 기체화시켜 표면처리해 줌으로써 효과적으로 붕소-질소 결합을 만들 수 있으며 따라서 생성된 수소이온을 -NH2기로 부터 보호해 줄 수 있도록 하는 것이다. 물론 액체 상태의 붕소 화합물 배쓰를 이용하여도 같은 결과를 얻을 수 있다. 따라서 하기 도 3 과 같이 붕소-질소 결합이 형성되어 프리(free)한 상태의 -NH2기가 없는 기판위에 PAG 생성을 통하여 패턴을 구현하는 CAR 를 이용하여 패터닝할 경우 패턴의 푸팅현상이 완전히 제거된 깨끗한 패턴을 얻을 수 있게 된다.In the present invention, in order to remove the footing phenomenon occurring on the surface of the semiconductor substrate, as shown in FIG. 3, a very good bond with -NH 2 groups on the surface of the substrate, and the bond does not break even in a strong acidic solution (Lewis acid) By vaporizing the low-boiling boron compound and surface treatment, it is possible to effectively form a boron-nitrogen bond, thus protecting the generated hydrogen ions from -NH 2 groups. Of course, the same result can be obtained by using a liquid boron compound bath. Therefore, as shown in FIG. 3, when the boron-nitrogen bond is formed and patterned using a CAR that implements a pattern by generating PAG on a free -NH 2 group-free substrate, the patterning phenomenon of the pattern is completely removed. You will get a clean pattern.
한편 본 발명은 상술한 실시예에 의하여 한정되는 것은 아니며 후술되는 청구범위에 기재된 본 발명의 기술적 사상과 범주내에서 당업자에 의해 여러가지 변형이 가능함은 물론이다.Meanwhile, the present invention is not limited to the above-described embodiments, and various modifications may be made by those skilled in the art within the spirit and scope of the present invention described in the following claims.
상기한 바와 같이 본 발명에 따른 반도체 기판의 표면처리 방법을 초미세패턴의 제조공정에 이용할 경우 붕소-질소 결합이 형성되어 레지스트의 푸팅현상이 완전히 제거된 깨끗한 패턴을 얻을 수 있다.As described above, when the surface treatment method of the semiconductor substrate according to the present invention is used in the manufacturing process of the ultrafine pattern, a boron-nitrogen bond is formed to obtain a clean pattern in which the footing phenomenon of the resist is completely removed.
또한 푸팅현상이 제거된 초미세패턴의 형성을 가능케 하여 에치프로파일의 안정화, 신뢰성 있는 CD 콘트롤, 레지스트 잔유물의 감소 및 측벽의 요철 발생의 감소효과를 얻을 수 있어 포토리소그래피 공정의 안정화로 수율 향상의 효과를 얻을 수 있다.In addition, it is possible to form an ultra-fine pattern from which the footing phenomenon is eliminated, thereby stabilizing the etch profile, providing reliable CD control, reducing the residue of the resist, and reducing the occurrence of irregularities on the sidewalls. Can be obtained.
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