JPH05206082A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPH05206082A
JPH05206082A JP3848692A JP3848692A JPH05206082A JP H05206082 A JPH05206082 A JP H05206082A JP 3848692 A JP3848692 A JP 3848692A JP 3848692 A JP3848692 A JP 3848692A JP H05206082 A JPH05206082 A JP H05206082A
Authority
JP
Japan
Prior art keywords
film
gas
oxide film
mask
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3848692A
Other languages
Japanese (ja)
Other versions
JP3082396B2 (en
Inventor
Hidemitsu Aoki
秀充 青木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP04038486A priority Critical patent/JP3082396B2/en
Publication of JPH05206082A publication Critical patent/JPH05206082A/en
Application granted granted Critical
Publication of JP3082396B2 publication Critical patent/JP3082396B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To suppress after corrosion and side etching by adding NH3 gas to chloride gas or bromide gas for dry etching for the fine process of wiring material film. CONSTITUTION:A base oxide film 2 is formed on an Si substrate and a wiring film 3 is formed on the base oxide film 2. A mask oxide film 4 is formed on the wiring film 3 so as to be coated with photoresist 5 and patterning is performed. Namely, the mask oxide film 4 on the wiring film 3 is patterned by dry etching and the mask material is formed for the wiring process. After processing the mask oxide film 4, the resist 5 left on the film 4 is removed by 02 gas plasma. Then, dry etching is performed by using the mask oxide film 4 as a mask and adding NH3 gas to bromide gas by 3-40%. Thus, after corrosion and side etching are suppressed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子デバイス等の半導
体製造プロセスに用いられる半導体装置の製造方法に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device used in a semiconductor manufacturing process such as an electronic device.

【0002】[0002]

【従来の技術】最近のLSI技術においては、微細化で
ドライエッチングが進む一方、微細な配線では、電流密
度の増大が不可避となり、エレクトロマイグレーション
問題が顕在化してきた。配線の信頼性を向上するために
AlにSiやCuの添加、バリアメタルの利用がなされ
たが、これらの処理に伴う多くの問題がエッチング前後
で発生した。
2. Description of the Related Art In recent LSI technology, while dry etching has progressed due to miniaturization, an increase in current density has become unavoidable with fine wiring, and an electromigration problem has become apparent. Although Si and Cu were added to Al and a barrier metal was used to improve the reliability of the wiring, many problems associated with these treatments occurred before and after etching.

【0003】すなわち、残渣のレジスト、またはCuに
よるアフターコロージョンの発生である。このコロージ
ョン抑制のためには、エッチング直後、エッチングチャ
ンバーとは別のチャンバーで加熱しながら酸素ガスにC
4ガスや、CH3OHガス等を添加しながらレジストを
剥離する方法が考えられてきた。
That is, it is the occurrence of after-corrosion due to the residual resist or Cu. In order to suppress this corrosion, immediately after etching, while heating in a chamber different from the etching chamber, oxygen gas
A method of stripping the resist while adding F 4 gas or CH 3 OH gas has been considered.

【0004】また、微細化が進む中でサイドエッチング
の抑制に対する要求精度が高まり、0.25μm幅の配
線に対しては、0.03μm以下のサイドエッチング抑
制が要求されている。
Further, as miniaturization progresses, the precision required for suppressing side etching is increasing, and for a wiring having a width of 0.25 μm, suppressing side etching of 0.03 μm or less is required.

【0005】一方、スタックドキャパシターを使用する
ことにより、1μm程度の段差が生じ、この厳しい段差
部分に微細な配線を形成しなければならなくなってき
た。この段差部におけるドライエッチングでは、配線材
料の残渣を出さないように、かなりのオーバーエッチン
グが施されることになるが、通常のフォトレジストマス
クでは、ドライエッチング耐性がないため、1.5μm
以上のレジストをマスクとして使用しなければならな
い。
On the other hand, the use of the stacked capacitor causes a step difference of about 1 μm, and it becomes necessary to form fine wiring in the severe step difference part. In the dry etching in this step portion, a considerable amount of over-etching is performed so as not to leave a residue of the wiring material. However, since a normal photoresist mask has no dry etching resistance, it is 1.5 μm.
The above resist must be used as a mask.

【0006】このように、レジストの膜厚を厚くするこ
とは、リソグラフィー時に、段差の上部と下部で焦点を
同時に合わせ込むことが難しい上、微細パターンの露光
が困難となる。従って、微細パターンを段差部でパター
ニングするためには、フォトレジストマスクを薄膜化
し、この下にドライエッチング耐性の高い酸化膜等のハ
ードマスクを形成する必要性が高まっている。
As described above, increasing the thickness of the resist makes it difficult to focus the upper and lower portions of the step at the same time during lithography, and also makes it difficult to expose a fine pattern. Therefore, in order to pattern a fine pattern at the step portion, it is increasingly necessary to thin the photoresist mask and to form a hard mask such as an oxide film having high dry etching resistance under the photoresist mask.

【0007】[0007]

【発明が解決しようとする課題】エッチング後、レジス
ト残渣またはCu残渣によるアフターコロージョンの発
生を抑制するためには、エッチング直後、エッチングチ
ャンバーとは別のチャンバーで加熱しながら酸素ガスに
CF4や、CH3OHガス等を添加しながらレジストを剥
離する方法が考えられてきたが、充分な対策にならず、
数日後コロージョンを発生する場合がある。
In order to suppress the occurrence of after-corrosion due to resist residues or Cu residues after etching, immediately after etching, CF 4 is added to oxygen gas while heating in a chamber different from the etching chamber, A method of stripping the resist while adding CH 3 OH gas has been considered, but it is not a sufficient measure,
Corrosion may occur after a few days.

【0008】また、従来のフォトレジストマスクでは、
エッチング時にレジストのカーボンポリマーにより配線
材料の側壁を保護し、サイドエッチングを抑制すること
ができたが、酸化膜等のハードマスクを用いた場合、側
壁を保護する膜が形成されないため、サイドエッチング
が生じやすいといった問題が生じる。
Further, in the conventional photoresist mask,
The side wall of the wiring material could be protected by the carbon polymer of the resist during etching and the side etching could be suppressed.However, when a hard mask such as an oxide film is used, a side wall protecting film is not formed. It causes problems such as easy occurrence.

【0009】本発明は、このような従来の問題点を解決
し、アフターコロージョンを抑制し、且つサイドエッチ
ングを抑制するエッチング方法を提供することを目的と
する。
An object of the present invention is to provide an etching method that solves the above-mentioned conventional problems, suppresses after-corrosion, and suppresses side etching.

【0010】[0010]

【課題を解決するための手段】上記目的を達成するた
め、本発明による半導体装置の製造方法においては、配
線材料膜をドライエッチングによって微細加工する半導
体装置の製造方法であって、ドライエッチングは、塩素
系ガスまたは、ブロム系ガスにNH3ガスを添加して行
うものである。
In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device in which a wiring material film is finely processed by dry etching. This is performed by adding NH 3 gas to chlorine-based gas or bromine-based gas.

【0011】[0011]

【作用】塩素系ガスまたは、ブロム系ガスにNH3ガス
を添加してドライエッチングする方法は、NH3のNの
成分が、該処理後、配線膜の表面が窒化され、大気の水
分と遮断できるため、アフターコロージョンの抑制に対
して効果があり、歩留りの向上につながる。この作用
は、配線加工用のマスク材料がフォトレジストマスクで
も、酸化膜マスクでも効果がある。
[Function] In a method of dry etching by adding NH 3 gas to chlorine-based gas or bromine-based gas, the N component of NH 3 is shielded from moisture in the atmosphere by nitriding the surface of the wiring film after the treatment. Therefore, it is effective in suppressing after-corrosion and leads to improvement in yield. This effect is effective whether the mask material for wiring processing is a photoresist mask or an oxide film mask.

【0012】また、NH3のHの成分が塩素または、ブ
ロムのラジカルの発生量を抑制するため、ラジカルによ
る等方性エッチングが抑制され、サイドエッチングを抑
制する。
Further, since the H component of NH 3 suppresses the generation amount of chlorine or bromine radicals, isotropic etching due to radicals is suppressed and side etching is suppressed.

【0013】[0013]

【実施例】以下に本発明の実施例を図によって説明す
る。図1(a)に示すSi基板1上に、下地酸化膜2を
形成し、この酸化膜2上に配線膜3(アルミニウムまた
は、アルミニウム合金,Cu)をスパッタ法またはCV
D(Chemical Vapor Depositi
on)にて厚さ0.5μmを形成する。更に、この配線
膜3の上に、CVD法によりマスク酸化膜4を形成し、
このマスク酸化膜4上に通常のフォトレジスト5を塗布
し、通常のフォトレジスト工程にて、レジスト5のよう
にパターニングを行う。
Embodiments of the present invention will be described below with reference to the drawings. A base oxide film 2 is formed on a Si substrate 1 shown in FIG. 1A, and a wiring film 3 (aluminum or aluminum alloy, Cu) is formed on the oxide film 2 by a sputtering method or a CV method.
D (Chemical Vapor Deposition)
on) to form a thickness of 0.5 μm. Further, a mask oxide film 4 is formed on the wiring film 3 by the CVD method,
A normal photoresist 5 is applied on the mask oxide film 4, and is patterned like the resist 5 in a normal photoresist process.

【0014】図1(b)に示すように、配線膜3上のマ
スク酸化膜4は、CF4とCHF3ガスによるドライエッ
チングでパターニングを行い、配線膜加工時のマスク材
料とする。マスク酸化膜4加工後、この膜4上に残って
いるレジスト5は、O2ガスプラズマにて除去する。
As shown in FIG. 1B, the mask oxide film 4 on the wiring film 3 is patterned by dry etching with CF 4 and CHF 3 gas to be used as a mask material for processing the wiring film. After processing the mask oxide film 4, the resist 5 remaining on the film 4 is removed by O 2 gas plasma.

【0015】図1(c)に示すように、マスク酸化膜4
をマスクに、塩素系ガス(Cl2,BCl3等)または、
ブロム系ガス(HBr,BBr3等)にNH3ガスを3%
〜40%程度添加し、ドライエッチングを行う。このマ
スク酸化膜4及び配線膜3のドライエッチング工程に
は、ECR(Electron CyclotronR
esonance)または、RIE(Reactive
Ion Etching)装置を用いる。
As shown in FIG. 1C, the mask oxide film 4 is formed.
With a mask, chlorine gas (Cl 2 , BCl 3, etc.) or
3% NH 3 gas in bromine gas (HBr, BBr 3 etc.)
About 40% is added, and dry etching is performed. In the dry etching process of the mask oxide film 4 and the wiring film 3, ECR (Electron CyclotronR) is used.
esonance) or RIE (Reactive)
Ion Etching) device is used.

【0016】また、上記のマスク酸化膜4のパターニン
グには、EB(ElectronBeam)による露光
工程を用いてもよい。また、マスク酸化膜4の形成に
は、塗布型の酸化膜SOG(Spin On Glas
s)または、CVD窒化膜を用いてもよい。
The patterning of the mask oxide film 4 may be performed by an exposure process using EB (Electron Beam). The mask oxide film 4 is formed by applying a coating type oxide film SOG (Spin On Glass).
s) or a CVD nitride film may be used.

【0017】[0017]

【発明の効果】以上のように本発明は、下地段差の厳し
い配線膜の微細加工に際し、塩素系ガスまたは、ブロム
系ガスにNH3ガスを添加してドライエッチングするた
め、該処理後、配線膜の表面が窒化され、大気の水分と
遮断することができ、アフターコロージョンの抑制に対
して効果があり、歩留りを向上できる。また、塩素また
はブロムのラジカルの発生量を抑制することは、等方性
でエッチングを抑制し、サイドエッチングを抑制する効
果があるため、半導体装置の歩留り及び信頼性を向上で
きる。
As described above, according to the present invention, in the fine processing of a wiring film having a severe step difference, NH 3 gas is added to chlorine-based gas or bromine-based gas for dry etching. The surface of the film is nitrided and can block moisture from the atmosphere, which is effective in suppressing after-corrosion and improves the yield. Further, suppressing the generation amount of chlorine or bromine radicals has the effect of suppressing isotropic etching and side etching, so that the yield and reliability of the semiconductor device can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)〜(c)は、本発明の実施例を工程順に
示す半導体チップの断面図である。
1A to 1C are cross-sectional views of a semiconductor chip showing an embodiment of the present invention in process order.

【符号の説明】[Explanation of symbols]

1 シリコン基板 2 下地酸化膜 3 配線膜 4 マスク酸化膜 5 フォトレジスト膜 1 Silicon substrate 2 Underlayer oxide film 3 Wiring film 4 Mask oxide film 5 Photoresist film

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/3205 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI technical display location H01L 21/3205

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 配線材料膜をドライエッチングによって
微細加工する半導体装置の製造方法であって、 ドライエッチングは、塩素系ガスまたは、ブロム系ガス
にNH3ガスを添加して行うものであることを特徴とす
る半導体装置の製造方法。
1. A method of manufacturing a semiconductor device in which a wiring material film is finely processed by dry etching, wherein the dry etching is performed by adding NH 3 gas to chlorine-based gas or bromine-based gas. A method of manufacturing a semiconductor device, which is characterized.
JP04038486A 1992-01-29 1992-01-29 Method for manufacturing semiconductor device Expired - Lifetime JP3082396B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04038486A JP3082396B2 (en) 1992-01-29 1992-01-29 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04038486A JP3082396B2 (en) 1992-01-29 1992-01-29 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPH05206082A true JPH05206082A (en) 1993-08-13
JP3082396B2 JP3082396B2 (en) 2000-08-28

Family

ID=12526593

Family Applications (1)

Application Number Title Priority Date Filing Date
JP04038486A Expired - Lifetime JP3082396B2 (en) 1992-01-29 1992-01-29 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JP3082396B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0785572A2 (en) 1996-01-22 1997-07-23 Matsushita Electric Industrial Co., Ltd. Dry etching method for aluminium alloy and etching gas therefor
US6573027B1 (en) 1999-02-05 2003-06-03 Nec Corporation Manufacturing method of semiconductor device
US7317497B2 (en) 2002-10-31 2008-01-08 Seiko Epson Corporation Electro-optical device and electronic apparatus
US9496295B2 (en) 2014-01-10 2016-11-15 Samsung Display Co., Ltd. Liquid crystal display and manufacturing method thereof
US9581848B2 (en) 2014-01-17 2017-02-28 Samsung Display Co., Ltd. Liquid crystal display

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0785572A2 (en) 1996-01-22 1997-07-23 Matsushita Electric Industrial Co., Ltd. Dry etching method for aluminium alloy and etching gas therefor
US6573027B1 (en) 1999-02-05 2003-06-03 Nec Corporation Manufacturing method of semiconductor device
US7317497B2 (en) 2002-10-31 2008-01-08 Seiko Epson Corporation Electro-optical device and electronic apparatus
US9496295B2 (en) 2014-01-10 2016-11-15 Samsung Display Co., Ltd. Liquid crystal display and manufacturing method thereof
US9581848B2 (en) 2014-01-17 2017-02-28 Samsung Display Co., Ltd. Liquid crystal display

Also Published As

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JP3082396B2 (en) 2000-08-28

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