KR20010011851A - Method of manufacturing thin film transistor-liquid crystal display device - Google Patents
Method of manufacturing thin film transistor-liquid crystal display device Download PDFInfo
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- KR20010011851A KR20010011851A KR1019990031414A KR19990031414A KR20010011851A KR 20010011851 A KR20010011851 A KR 20010011851A KR 1019990031414 A KR1019990031414 A KR 1019990031414A KR 19990031414 A KR19990031414 A KR 19990031414A KR 20010011851 A KR20010011851 A KR 20010011851A
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- Prior art keywords
- film
- surface treatment
- liquid crystal
- crystal display
- display device
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 13
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 239000010409 thin film Substances 0.000 title claims description 11
- 238000004381 surface treatment Methods 0.000 claims abstract description 18
- 238000000034 method Methods 0.000 claims abstract description 3
- 239000010408 film Substances 0.000 claims description 61
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract 3
- 229910052782 aluminium Inorganic materials 0.000 abstract 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 4
- 238000002161 passivation Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 229910004205 SiNX Inorganic materials 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Nonlinear Science (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
Abstract
Description
본 발명은 박막 트랜지스터-액정 표시 소자의 제조방법에 관한 것으로, 특히 데이터 라인의 오픈현상을 방지하고 저항특성을 향상시킬 수 있는 박막 트랜지스터 -액정 표시소자의 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor-liquid crystal display device, and more particularly, to a method of manufacturing a thin film transistor-liquid crystal display device which can prevent an open phenomenon of a data line and improve resistance characteristics.
액티브 매트릭스형 액정 표시소자(Active Matrix type Liquid Crystal Display Device; AM-LCD)는 고속 응답성을 지니고, 높은 화소 개수를 갖는데 적당할 뿐만 아니라, 디스플레이 화면의 고화질화, 대형화, 컬러화면화 등을 실현하는데 적합하다. 이러한 액정 표시 소자의 스위칭 소자로서, 급준한 온/오프 특성을 지니는 박막 트랜지스터(Thin Film Transistor; TFT)가 주로 사용된다.The active matrix type liquid crystal display device (AM-LCD) has high-speed response and is not only suitable for having a high number of pixels, but also for realizing high-definition, large-sized, and color screen display. Suitable. As a switching element of such a liquid crystal display device, a thin film transistor (TFT) having steep on / off characteristics is mainly used.
일반적으로 상기한 TFT-LCD의 데이터 라인은 Mo막/Al막의 이중구조로 형성하거나 MoW막/Al막 /MoW막의 삼중구조로 형성한다.In general, the data line of the TFT-LCD is formed by a dual structure of Mo film / Al film or a triple structure of MoW film / Al film / MoW film.
그러나, 상기한 구조의 데이터 라인에서는 Al막의 힐락(hillock)으로 인한 오픈현상이 야기될 뿐만 아니라 불균일한 Al막에 의해 상부층의 크랙(crack)이 야기되어 저항특성이 저하되는 문제가 있다.However, in the data line having the above-described structure, not only the open phenomenon due to the hillock of the Al film is caused, but also the crack of the upper layer is caused by the nonuniform Al film, thereby deteriorating the resistance characteristic.
따라서, 본 발명은 상기한 종래의 문제점을 해결하기 위한 것으로서, 데이터 라인의 오픈현상을 방지함과 더불어 저항 특성을 향상시킬 수 있는 TFT-LCD의 제조방법을 제공함에 그 목적이 있다.Accordingly, an object of the present invention is to provide a method for manufacturing a TFT-LCD which can improve the resistance characteristics while preventing the open phenomenon of a data line.
도 1 및 도 2는 본 발명의 실시예에 따른 박막 트랜지스터 액정 표시소자의 의 제조방법을 설명하기 위한 단면도.1 and 2 are cross-sectional views illustrating a method of manufacturing a thin film transistor liquid crystal display device according to an exemplary embodiment of the present invention.
(도면의 주요 부분에 대한 부호의 설명)(Explanation of symbols for the main parts of the drawing)
10 : 절연기판 11 : 게이트10: insulated substrate 11: gate
12 : 게이트 절연막 13 : 채널층12 gate insulating film 13 channel layer
14 : 오믹층 15 : 소오스/드레인14: ohmic layer 15: source / drain
16 : 패시배이션막 17 : 화소전극16 passivation film 17 pixel electrode
15A, 15D : 제 1 및 제 2 MoW막15A, 15D: First and Second MoW Films
15B : Al막 15C : 산화막15B: Al film 15C: oxide film
상기한 본 발명의 목적을 달성하기 위하여, 본 발명에 따른 박막 트랜지스터 액정 표시소자는 게이트, 게이트 절연막, 채널층, 오믹층, 데이터 라인 및 화소전극을 포함하고, 데이터 라인은 제 1 MoW막, Al막, 산화막 및 제 2 MoW막을 순차적으로 적층하여 형성한다.In order to achieve the above object of the present invention, the thin film transistor liquid crystal display device according to the present invention includes a gate, a gate insulating film, a channel layer, an ohmic layer, a data line and a pixel electrode, the data line is a first MoW film, Al A film, an oxide film, and a second MoW film are formed by stacking sequentially.
본 실시예에서, 산화막은 Al막을 습식표면처리 또는 건식표면처리로 표면처리하여 형성한다. 또한, 건식표면처리는 N2O, O2등의 개스를 이용한 RF 플라즈마 방전으로 진행한다.In this embodiment, the oxide film is formed by surface treatment of the Al film by wet surface treatment or dry surface treatment. In addition, the dry surface treatment proceeds with RF plasma discharge using gases such as N 2 O, O 2, and the like.
이하, 첨부된 도면을 참조하여 본 발명의 실시예를 설명한다.Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention.
도 1는 본 발명의 실시예에 따른 박막 트랜지스터 액정 표시소자의 제조방법을 설명하기 위한 단면도이다.1 is a cross-sectional view illustrating a method of manufacturing a thin film transistor liquid crystal display device according to an exemplary embodiment of the present invention.
도 1을 참조하면, 유리와 같은 투명한 절연기판(10) 상에 MoW막으로 게이트(11)를 형성하고, SiONx막(12a)과 SiNx막(12b)의 적층막으로 게이트 절연막 (12)을 형성한다. 그런 다음, 게이트(11) 상의 게이트 절연막(12) 상부에 수소화된 비정질 실리콘막 (a-Si : H)과 같은 반도체층으로 채널층(13)을 형성하고, 채널층 (13) 상부에 채널층(13)의 상면을 노출시키는 오믹층(14)을 형성한다. 여기서, 오믹층(14)은 도핑된 수소화된 비정질 실리콘막(n＋a-Si : H)으로 형성한다..Referring to FIG. 1, a gate 11 is formed of a MoW film on a transparent insulating substrate 10 such as glass, and a gate insulating film 12 is formed of a laminated film of a SiONx film 12a and a SiNx film 12b. do. Thereafter, the channel layer 13 is formed of a semiconductor layer such as a hydrogenated amorphous silicon film (a-Si: H) on the gate insulating layer 12 on the gate 11, and the channel layer is formed on the channel layer 13. An ohmic layer 14 exposing the top surface of (13) is formed. Here, the ohmic layer 14 is formed of a doped hydrogenated amorphous silicon film (n + a-Si: H).
그리고 나서, 기판 전면에 소오스/드레인 및 데이터 라인용 물질막을 증착하고 패터닝하여, 오믹층(14) 및 게이트 절연막(12) 상부에 게이트(11)의 양측과 오버랩하며 서로 이격된 소오스/드레인(15)을 형성함과 동시에 데이터 라인(미도시)을 형성한다. 바람직하게, 상기 물질막은 도 2에 도시된 바와 같이, 제 1 MoW막 (15A), Al막(15B), 산화막(15C) 및 제 2 MoW막(15D)을 순차적으로 적층하여 형성한다. 여기서, 산화막(15C)은 Al막(15B)의 표면처리에 의해 형성되는데, Al막(15B)의 표면처리는 습식표면처리로 진행하거나 N2O, O2등의 개스를 이용한 RF 플라즈마 방전에 의한 건식표면처리로 진행한다.Then, the source / drain and data line material films are deposited and patterned on the entire surface of the substrate, so that the source / drain 15 overlapping both sides of the gate 11 and spaced apart from each other on the ohmic layer 14 and the gate insulating layer 12. ) And a data line (not shown). Preferably, the material film is formed by sequentially stacking a first MoW film 15A, an Al film 15B, an oxide film 15C, and a second MoW film 15D. Here, the oxide film 15C is formed by surface treatment of the Al film 15B. The surface treatment of the Al film 15B is performed by wet surface treatment or by RF plasma discharge using gas such as N 2 O or O 2 . Proceed to dry surface treatment.
즉, 이러한 산화막(15C)에 의해 Al막(15B)의 노출이 방지되고 표면이 균일해져서, Al막(15B)의 힐락현상이 방지될 뿐만 아니라 상부층인 MoW막(15D)의 형성시 크랙현상등이 방지되어, 데이터 라인의 오픈현상이 방지되고 저항특성이 향상된다.In other words, the oxide film 15C prevents the Al film 15B from being exposed and the surface is uniform, thereby preventing the Al film 15B from being healed and cracking the upper layer of the MoW film 15D. This prevents the open phenomenon of the data line and improves the resistance characteristic.
그리고 나서, 도 1에 도시된 바와 같이, 기판 전면에 SiNx막으로 이루어진 패시배이션막(16)을 형성하고, 소오스의 일부가 노출되도록 패시배이션막(16)을 식각하여 콘택홀(미도시)을 형성한다. 그런 다음, 콘택홀 및 패시배이션막(16) 상부에 ITO막을 증착하고 패터닝하여 화소전극(17)을 형성한다.Then, as shown in FIG. 1, a passivation film 16 made of a SiNx film is formed on the entire surface of the substrate, and the passivation film 16 is etched to expose a portion of the source so as to expose a contact hole (not shown). ). Then, an ITO film is deposited and patterned on the contact hole and passivation film 16 to form the pixel electrode 17.
상기한 본 발명에 의하면, 데이터 라인을 제 1 MoW막/Al막/산화막/제 2 MoW막의 적층구조로 형성하여, 산화막에 의해 Al막의 노출이 방지됨으로써, Al막의 힐락현상이 방지될 뿐만 아니라 상부층인 제 2 MoW막의 형성시 크랙현상등이 방지된다. 이에 따라, 데이터 라인의 오픈현상이 방지되고 저항특성이 향상된다.According to the present invention described above, the data line is formed in a stacked structure of the first MoW film / Al film / oxide film / second MoW film, and the Al film is prevented from being exposed by the oxide film, thereby preventing the Al film from being healed and the upper layer. In the formation of the second MoW film, cracks and the like are prevented. Accordingly, the open phenomenon of the data line is prevented and the resistance characteristic is improved.
또한, 본 발명은 상기 실시예에 한정되지 않고, 본 발명의 기술적 요지를 벗어나지 않는 범위내에서 다양하게 변형시켜 실시할 수 있다.In addition, this invention is not limited to the said Example, It can variously deform and implement within the range which does not deviate from the technical summary of this invention.
Claims (5)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019990031414A KR20010011851A (en) | 1999-07-30 | 1999-07-30 | Method of manufacturing thin film transistor-liquid crystal display device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019990031414A KR20010011851A (en) | 1999-07-30 | 1999-07-30 | Method of manufacturing thin film transistor-liquid crystal display device |
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| Publication Number | Publication Date |
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| KR20010011851A true KR20010011851A (en) | 2001-02-15 |
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| Application Number | Title | Priority Date | Filing Date |
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| KR1019990031414A KR20010011851A (en) | 1999-07-30 | 1999-07-30 | Method of manufacturing thin film transistor-liquid crystal display device |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03148635A (en) * | 1989-11-06 | 1991-06-25 | Casio Comput Co Ltd | Tft panel and its manufacture |
| JPH05265043A (en) * | 1992-03-19 | 1993-10-15 | Hitachi Ltd | Thin-film transistor for driving liquid crystal display |
| JPH0667210A (en) * | 1992-08-20 | 1994-03-11 | Semiconductor Energy Lab Co Ltd | Active matrix type liquid crystal display device and its manufacture |
| KR19990031518A (en) * | 1997-10-13 | 1999-05-06 | 윤종용 | Liquid Crystal Display Using Wiring Using Molybdenum-Tungsten Alloy and Manufacturing Method Thereof |
-
1999
- 1999-07-30 KR KR1019990031414A patent/KR20010011851A/en not_active Application Discontinuation
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03148635A (en) * | 1989-11-06 | 1991-06-25 | Casio Comput Co Ltd | Tft panel and its manufacture |
| JPH05265043A (en) * | 1992-03-19 | 1993-10-15 | Hitachi Ltd | Thin-film transistor for driving liquid crystal display |
| JPH0667210A (en) * | 1992-08-20 | 1994-03-11 | Semiconductor Energy Lab Co Ltd | Active matrix type liquid crystal display device and its manufacture |
| KR19990031518A (en) * | 1997-10-13 | 1999-05-06 | 윤종용 | Liquid Crystal Display Using Wiring Using Molybdenum-Tungsten Alloy and Manufacturing Method Thereof |
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