KR20010005138A - Method of elimina ting void in multi-layer printed circuit board for wieress terminal - Google Patents

Method of elimina ting void in multi-layer printed circuit board for wieress terminal Download PDF

Info

Publication number
KR20010005138A
KR20010005138A KR1019990025936A KR19990025936A KR20010005138A KR 20010005138 A KR20010005138 A KR 20010005138A KR 1019990025936 A KR1019990025936 A KR 1019990025936A KR 19990025936 A KR19990025936 A KR 19990025936A KR 20010005138 A KR20010005138 A KR 20010005138A
Authority
KR
South Korea
Prior art keywords
circuit
layer
ccl
circuit board
printed circuit
Prior art date
Application number
KR1019990025936A
Other languages
Korean (ko)
Other versions
KR100311814B1 (en
Inventor
정재헌
Original Assignee
이형도
삼성전기 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이형도, 삼성전기 주식회사 filed Critical 이형도
Priority to KR1019990025936A priority Critical patent/KR100311814B1/en
Publication of KR20010005138A publication Critical patent/KR20010005138A/en
Application granted granted Critical
Publication of KR100311814B1 publication Critical patent/KR100311814B1/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10098—Components for radio transmission, e.g. radio frequency identification [RFID] tag, printed or non-printed antennas

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE: A method for removing a voice of a multi-layer printed circuit board(PCB) for a wireless terminal is provided to previously prevent a void of an antenna circuit of the multi-layer PCB when the multi-layer PCB is manufactured, so as to improve substrate reliability. CONSTITUTION: Internal-layer circuits(12) having circuit patterns are formed. Resin coated copper foils(RCCs)(30) attached with resins(32) are accumulated on more than one copper clad lamination(CCL)(10) interposed with prepregs(20). The accumulated RCCs(30) are heated and pressurized to make multi layers. A via hole is formed to perform interlayer connection between the heated/pressurized CCL(10) and the RCCs(30). The via hole is plated to form a plated layer through which electricity passes, to carry out the interlayer connection. External-layer circuits(34) having circuit patterns are formed on the RCCs(30). An antenna circuit(50) is formed, not to form the internal-layer circuits(12) on one end of the CCL(10). A gas leakage circuit(40) is formed on one end of the antenna circuit(50) to prevent a void.

Description

무선 단말기용 다층 인쇄회로기판의 보이드 제거방법{Method of elimina ting void in multi-layer printed circuit board for wieress terminal}Method of eliminating voids in multi-layer printed circuit boards for wireless terminals {Method of elimina ting void in multi-layer printed circuit board for wieress terminal}

본 발명은 휴대폰등의 무선 단말기에 사용되는 다층 인쇄회로기판(multi-layer printed circuit board)에 관한 것으로 보다 상세히는, 기판의 안테나회로부분에서 동박적층판(CCL)의 비내칭회로에 의한 단차에 의하여 기판 적층시 발생되는 가압력의 차이에 의한 보이드(void)의 발생을 미연에 방지할 수 있도록 한 무선 단말기용 다층 인쇄회로기판의 보이드 제거방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-layer printed circuit board for use in a wireless terminal such as a mobile phone. More particularly, the present invention relates to a multilayer printed circuit board (CCL) in an antenna circuit portion of a substrate. The present invention relates to a void removing method of a multilayer printed circuit board for a wireless terminal, which prevents generation of voids due to a difference in pressing force generated during substrate stacking.

일반적으로 알려진 다층 인쇄회로기판에 있어서는, 도 1에서 도시한 바와 같이, 양면에 동박이 코팅된 동박적층판(copper clad lamination, 이하 'CCL'이라함)(110)의 양면에 통상의 사진식각공정(photoetching)을 통하여 내층회로(112)를 구성하고, 이와 같은 다수의 CCL(110)을 보통 프리플레그(prepreg)인 절연성 접착제(120)로서 적층시킨후, 상기 CCL(110)상에 일측면에 절연성 접착성분이 레진(resin)(132)이 부착된 동박(resin coated copper foil; 이하 'RCC' 이라고 함)(130)을 적치시키어 이를 가열, 가압하여 다층의 인쇄회로기판(100)을 마련하며, 다음 층간의 전기적인 도통을 위하여 기판의 소정의 위치에 비어홀(vie hole)을 가공하여 도금하며, 이후 상기 RCC(130)를 통상의 사진식각공정으로 외층회로 (134)를 구성한다.In a generally known multilayer printed circuit board, as shown in FIG. 1, a conventional photolithography process is performed on both sides of a copper clad lamination (CCL) 110 coated with copper foil on both sides. photoetching to form an inner layer circuit 112, and a plurality of such CCLs 110 are laminated as an insulating adhesive 120, which is usually prepreg, and then insulated on one side on the CCL 110. An adhesive component is deposited on a resin coated copper foil (hereinafter referred to as 'RCC') 130 having a resin 132 attached thereto, and heated and pressed to prepare a multilayer printed circuit board 100. For electrical conduction between layers, a via hole is plated at a predetermined position of the substrate and plated. Then, the RCC 130 is constituted by an ordinary photolithography process to form an outer layer circuit 134.

특히, 이와 같은 다층 인쇄회로기판(100)은 전기신호회로 및 접지회로등을 내층회로에 구성하고, 부품이 실장되는 패드등을 외층회로에 구성하여 결국, 기판의 고밀도화가 용이하고 이는 기판을 사용하는 각종 기기의 소형화에 기여할 수 있어 소형화 추세에 있는 휴대폰등과 같은 무선 단말기에 폭넓게 사용되고 있는 것이다.In particular, such a multilayer printed circuit board 100 constitutes an electrical signal circuit and a ground circuit in an inner layer circuit, and a pad in which components are mounted is formed in an outer layer circuit, so that a high density of the substrate is easy, and this uses a substrate. It can contribute to the miniaturization of various devices, and is widely used in wireless terminals such as mobile phones, which are becoming smaller.

또한, 무선 단말기용 다층 인쇄회로기판에 있어서는, 주파수의 송,수신을 수행하는 안테나용 회로를 구성하는데, 대개 상기 안테나회로부분은 안테나 방사특성 즉, 주파수 영향을 피하기 위하여 주회로부분과 독립적으로 구성된다.In addition, in a multilayer printed circuit board for a wireless terminal, an antenna circuit for transmitting and receiving frequencies is constituted. In general, the antenna circuit portion is configured independently of the main circuit portion to avoid antenna radiation characteristics, that is, frequency influence. do.

따라서, 안테나 회로가 독립적으로 구성되는 종래의 무선 단말기용 다층기판(200)에 있어서는, 도 2에서 도시한 바와 같이, 내층회로(212)가 형성된 다수의 CCL(210)이 적층되고, 그 위에 외층회로(122)로 구성되는 RCC(230)가 적층되어 가열, 가압되는데, 이때 일부분의 CCL(210)에 내층회로(212)를 형성시키지 않고 단지 RCC(230)만으로 독립적으로 안테나회로부분(240)을 구성하는 것이다.Therefore, in the conventional multi-layer board 200 for wireless terminals in which the antenna circuits are configured independently, as shown in FIG. 2, a plurality of CCLs 210 having inner layers 212 are stacked, and outer layers thereon. The RCC 230 composed of the circuit 122 is stacked and heated and pressurized. At this time, without forming the inner layer circuit 212 on a part of the CCL 210, the antenna circuit portion 240 is independently formed by only the RCC 230. To construct.

그러나, 상기와 같은 종래의 무선 단말기용 다층 인쇄회로기판에 있어서는, 도 2에서 도시한 바와 같이, 안테나 방사특성을 위하여 안테나회로부분(240)을 CCL(210)의 비내칭회로에 의한 단차로서 구성하지만, 이와 같은 단차는 기판(200)의 적층 가압시 RCC(230)의 레진(232)부분이 가압력의 차이로 인하여 불균일하게 되면서 표면에 기포와 같은 보이드(void)를 손쉽게 발생시키는 문제가 있는 것이다.However, in the conventional multilayer printed circuit board for a wireless terminal as described above, as shown in FIG. 2, the antenna circuit portion 240 is configured as a step by the non-localization circuit of the CCL 210 for antenna radiation characteristics. However, this step is a problem in that the resin 232 portion of the RCC 230 becomes non-uniform due to the difference in the pressing force when the substrate 200 is pressurized by stacking, and easily generates voids such as bubbles on the surface. .

또한, 이와 같은 보이드를 방지하기 위하여 단차를 없애어 내층회로(212)를 구성하면, 안테나회로(240)가 주회로부분의 영향으로 주파수간섭이 발생하여 안테나의 주파수 방사특성을 저하시키는 다른 문제가 야기되는 것이다.In addition, if the inner layer circuit 212 is formed by eliminating the step to prevent such voids, the antenna circuit 240 has another problem that the frequency interference occurs due to the influence of the main circuit portion to reduce the frequency radiation characteristics of the antenna. It is caused.

본 발명은 상기와 같은 종래의 문제점을 개선시키기 위하여 안출된 것으로서 그 목적은, 무선 단말기용 다층 인쇄회로기판의 제조시 안테나회로부분에서 손쉽게 발생하는 보이드를 방지시키어 기판 신뢰성을 향상시키는 무선 단말기용 다층 인쇄회로기판의 보이드 제거방법을 제공하는 데에 있다.The present invention has been made in order to improve the conventional problems as described above, the object of the multi-layer wireless terminal for improving the board reliability by preventing voids occurring easily in the antenna circuit portion during the manufacture of the multilayer printed circuit board for wireless terminal The present invention provides a method of removing voids from a printed circuit board.

도 1은 일반적인 다층 인쇄회로기판을 도시한 개략 단면도1 is a schematic cross-sectional view showing a typical multilayer printed circuit board

도 2는 종래의 무선 단말기용 다층 인쇄회로기판의 안테나 회로부분을 도시한 개략 단면도2 is a schematic cross-sectional view showing an antenna circuit portion of a conventional multilayer printed circuit board for a wireless terminal.

도 3은 본 발명에 따른 무선 단말기용 다층 인쇄회로기판을 도시한 개략 단면도3 is a schematic cross-sectional view showing a multilayer printed circuit board for a wireless terminal according to the present invention.

도 4는 본 발명인 다층 인쇄회로기판의 안테나 회로부분에서의 가스누출수단을 도시한 요부 단면도Fig. 4 is a sectional view showing the main parts of the gas leaking means in the antenna circuit portion of the multilayer printed circuit board of the present invention.

* 도면의 주요 부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings

1.... 다층 회로기판 10.... 동박적층판(CCL)1 .... Multilayer Circuit Board 10 .... Copper Clad Laminate (CCL)

12.... 내층회로 20.... 프리플레그(Prepreg)12..Inner layer circuits 20 .... Prepreg

30.... 동박판(RCC) 32.... 레진30 ... copper foil (RCC) 32 ... resin

34.... 외부회로 40.... 가스누출수단34 .. External circuit 40 .... Gas leaking means

50.... 안테나회로 60.... 패턴50 ... antenna pattern 60 ... pattern

상기와 같은 목적을 달성하기 위한 기술적인 수단으로서 본 발명은, 회로패턴을 갖는 내층회로가 형성되고 프리플레그를 개재한 하나 이상의 CCL상에 레진이 부착된 RCC를 적층하고 이를 가열 가압하여 다층으로 이루는 단계와,As a technical means for achieving the above object, the present invention, by forming an inner layer circuit having a circuit pattern and laminated a resin attached RCC on at least one CCL via a pre-flag and heat-pressing it to form a multilayer Steps,

상기 다층으로 가열, 가압 적층된 CCL과 RCC의 층간 접속을 위하여 비어홀을 형성하는 단계와,Forming a via hole for interlayer connection of CCL and RCC heated and pressurized with the multilayer;

상기 비어홀내를 도금하여 전기적으로 도통하는 도금층을 형성시키어 층간을 접속하는 단계와,Forming an electrically conductive plating layer by plating the via hole to connect the layers;

상기 RCC에 회로패탄을 갖는 외층회로를 형성시키는 단계로서 구성되는 기판 제조방법에 있어서,In the substrate manufacturing method comprising the step of forming an outer layer circuit having a circuit shell in the RCC,

상기 CCL에 내칭회로가 형성되지 않도록 하여 단차로서 안테나회로를 형성하는 단계와,Forming an antenna circuit as a step by preventing an internal circuit from being formed in the CCL;

상기 안테나회로의 일측으로 보이드의 발생을 방지토록 가스누출수단을 형성시키는 단계를 포함하는 구성으로 된 무선 단말기용 다층 인쇄회로기판의 보이드 제거방법을 마련함에 의한다.By providing a void removal method of a multi-layer printed circuit board for a wireless terminal comprising the step of forming a gas leakage means to prevent the generation of voids on one side of the antenna circuit.

이하, 첨부된 도면에 의거하여 본 발명의 실시예를 상세하게 설명하면 다음과 같다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

도 3은 본 발명에 따른 무선 단말기용 다층 인쇄회로기판을 도시한 개략 단면도이고, 도 4는 본 발명인 다층 인쇄회로기판의 안테나 회로부분에서의 가스누출수단을 도시한 요부 단면도Figure 3 is a schematic cross-sectional view showing a multi-layer printed circuit board for a wireless terminal according to the present invention, Figure 4 is a cross-sectional view showing the main part of the gas leakage means in the antenna circuit portion of the multilayer printed circuit board of the present invention

먼저, 기판의 고밀도화가 용이한 다층 인쇄회로기판(1)은 크게 CCL(10)과 일측면에 레진(32)이 부착된 RCC(30)로 이루어 지는데, 상기 CCL(10)은 에폭시 수지로 된 기판 양면에 동박이 접착된 동박적층판이다.First, the multilayer printed circuit board 1, which is easily densified, has a large CCL 10 and an RCC 30 having resin 32 attached to one side thereof. The CCL 10 is made of epoxy resin. It is a copper foil laminated board in which copper foil was adhere | attached on both surfaces of a board | substrate.

따라서, 상기 CCL(10)의 동박부분을 통상의 사진식각공정으로 회로패턴을 갖는 내층회로(12)를 형성시키는데, 상기 사진식각공정은 동박위에 포토레지스트를 도포하는 필름적층단계와 상기 포토레지스트의 일부 영역을 볼로킹한 상태에서 광을 조사하여 경화하고, 상기 포토레지스트에 현상액을 작용하여 미경화된 포토레지스트를 제거하는 현상단계 및, 첨가제를 작용하여 포토레지스트가 제거된 영역의 동박을 에칭하는 박리단계로 이루어 진다.Accordingly, the copper foil portion of the CCL 10 is formed by an ordinary photolithography process to form an inner layer circuit 12 having a circuit pattern. The photolithography process includes a film lamination step of applying a photoresist on the copper foil and the photoresist. The development step of removing the uncured photoresist by applying a developer to the photoresist and curing the light in the state in which the partial region is ball-locked, and etching the copper foil of the region where the photoresist has been removed by applying an additive It consists of a peeling step.

한편, CCL(10)의 내층회로(12)는 대개 다층기판(1)의 접지회로 또는 신호처리회로로 구성되며, 내층회로(12)가 구성된 CCL(10)은 사전에 결정된 층으로 적층되는 데, 이때 상기 CCL(10) 사이에는 절연성 접착제인 프리플레그(PREPREG)(20)가 도포된후, 가열 가압하여 적층된다.On the other hand, the inner circuit 12 of the CCL (10) is usually composed of a ground circuit or a signal processing circuit of the multi-layer substrate (1), the CCL (10) consisting of the inner circuit 12 is laminated in a predetermined layer At this time, between the CCL (10) is applied a pre-preg (PREPREG) 20, which is an insulating adhesive, and then laminated by heating and pressing.

더하여, 상기 다수의 CCL(10)이 적층되면 그위에 일면에 레진(32)이 부착된 RCC(30)가 적층 적합되어 다층의 기판(1)을 이루게 되며, 상기 RCC(20)의 동박부분은 상술한 바와 같은 통상의 사진식각공정을 통하여 외층회로(34)를 형성시키며, 상기 외층회로(34)는 주로 반도체 칩등과 같은 표면 실장형 부품이 접속되는 패드등으로 구성된다.In addition, when the plurality of CCLs 10 are stacked, an RCC 30 having a resin 32 attached thereto is stacked on one surface thereof to form a multilayer substrate 1, and the copper foil portion of the RCC 20 is The outer layer circuit 34 is formed through the usual photolithography process as described above, and the outer layer circuit 34 is mainly composed of pads to which surface-mount components such as semiconductor chips and the like are connected.

이때, 상기 적층된 CCL(10)의 일측으로 독립적인 안테나회로(50)를 구성하기 위하여 상기 CCL(10)의 일측으로 내층회로(12)가 형성되지 않는 부분으로서 단차를 형성시키고, 이와 같은 단차에 의하여 안테나회로부분(50)은 주회로부분과 분리도어 독립적으로 형성되는데, 상기 내층회로가 형성되지 않은 안테나회로(50)부분은 결국 RCC(30)의 외층회로(34)와 동시에 RCC(30)의 동박부분으로서 형성되며, 이와 같은 독립적으로 구성된 안테나회로(50)는 안테나의 주파수 방사특성을 향상시키기 위해서 이다.At this time, in order to form an independent antenna circuit 50 on one side of the stacked CCL 10, a step is formed as a portion where the inner layer circuit 12 is not formed on one side of the CCL 10, and such a step The antenna circuit portion 50 is formed independently of the main circuit portion and a separate door. The portion of the antenna circuit 50 in which the inner layer circuit is not formed eventually becomes the RCC 30 at the same time as the outer layer circuit 34 of the RCC 30. It is formed as a copper foil portion of), such an independently configured antenna circuit 50 is to improve the frequency radiation characteristics of the antenna.

한편, 적층이 완료되고 내층 및 외층회로(12)(34)가 형성된 다층 기판(1)에는 비어홀(미도시)를 형성시키는데, 상기 비어홀은 층간의 전기적인 접속을 가능토록 형성후 동도금 수행하여 층간을 전기적으로 접속시킨다.Meanwhile, a via hole (not shown) is formed in the multilayer substrate 1 on which the lamination is completed and the inner and outer circuit circuits 12 and 34 are formed. The via hole is formed by copper plating after forming an electrical connection between the layers. Is electrically connected.

이에 더하여, 상기 안테나회로(50)의 단차에 의하여 다층 기판(1)의 가압 가열작업시 상기 단차는 가압력의 차이를 발생시키고, 이는 결국 외층으로 적층되는 RCC(30)서 레진(32)이 균일하게 가압되지 않고 불균일한 가압현상을 발생시키어 결국 보이드(void) 즉, 가스 포켓(gas porket) 현상으로 기판 표면에 기포가 발생하게된다.In addition, in the pressurized heating operation of the multilayer substrate 1 due to the step of the antenna circuit 50, the step causes a difference in the pressing force, which causes the resin 32 to be uniform in the RCC 30 which is eventually laminated to the outer layer. It is not pressurized, it causes non-uniform pressurization, and eventually bubbles are generated on the surface of the substrate due to voids, that is, gas porkets.

따라서, 이와 같은 보이드를 방지시켜야 하는데, 도 3 및 도 4의 요부도에서 도시한 바와 같이, 상기 안테나회로(50)의 일측으로 기판(1)의 더미부분(1a)에 형성된 패턴(60)에 단차(d)를 형성시키어 가스누출수단(40)를 형성시키면, 가압작업시 불균일한 레진에 의한 가스포켓이 상기 누출수단(40)를 통하여 외부로 배출되고, 결국 보이드의 발생이 방지하는 것이다.Therefore, such voids should be prevented. As shown in the main parts of FIGS. 3 and 4, the pattern 60 formed in the dummy part 1a of the substrate 1 toward one side of the antenna circuit 50 is formed. When the step (d) is formed to form the gas leaking means (40), the gas pocket by the non-uniform resin is discharged to the outside through the leaking means (40) during the pressurizing operation, thereby preventing the generation of voids.

이때, 상기 패턴(60)은 기판 더미부분(1a)이므로 기판 제조시 절단 제거되고, 결국 패턴(60)에 의한 안테나회로(50)의 주파수 간섭현상은 발생되지 않도록 된다.In this case, since the pattern 60 is a dummy part 1a of the substrate, the substrate 60 is cut and removed during manufacturing of the substrate, and thus, the frequency interference phenomenon of the antenna circuit 50 by the pattern 60 is not generated.

이에 따라서, 무선 단말기의 다층 기판(1)에 독립적으로 구성되는 안테나회로(50)에 의한 보이드발생이 미연에 방지될 수 있으며, 이는 기판 신뢰성을 향상시키는 것이다.Accordingly, the generation of voids by the antenna circuit 50 independently configured in the multilayer board 1 of the wireless terminal can be prevented in advance, which improves the board reliability.

이와 같이 본 발명인 무선 단말기용 다층 인쇄회로기판의 보이드 제거방법에 의하면, 무선 단말기용 다층 인쇄회로기판의 제조시 안테나회로부분에서 손쉽게 발생하는 보이드를 미연에 방지하도록 하며, 따라서 기판 신뢰성을 향상시키는 우수한 효과가 있다.Thus, according to the void removal method of the multi-layer printed circuit board of the present invention, it is possible to prevent the voids easily generated in the antenna circuit portion in the manufacture of the multi-layer printed circuit board for the wireless terminal, thereby improving the board reliability It works.

본 발명은 특정한 실시예에 관련하여 도시하고 설명하였지만, 이하의 특허청구의 범위에 의해 마련되는 본 발명의 정신이나 분야를 벗어나지 않는 한도내에서 본 발명이 다양하게 개조 및 변화될수 있다는 것을 당업계에서 통상의 지식을 가진자는 용이하게 알수 있음을 밝혀두고자 한다.While the invention has been shown and described with respect to specific embodiments thereof, it will be appreciated that various changes and modifications can be made in the art without departing from the spirit or scope of the invention as set forth in the following claims. Those of ordinary skill will want to know easily.

Claims (2)

회로패턴을 갖는 내층회로(12)가 형성되고 프리플레그(20)를 개재한 하나 이상의 CCL(10)상에 레진(32)이 부착된 RCC(30)를 적층하고 이를 가열 가압하여 다층으로 이루는 단계와,Forming an inner layer circuit 12 having a circuit pattern and stacking an RCC 30 having a resin 32 attached on at least one CCL 10 via the preflag 20 and heating and pressing the same to form a multilayer. Wow, 상기 다층으로 가열, 가압 적층된 CCL(10)과 RCC(30)의 층간 접속을 위하여 비어홀을 형성하는 단계와,Forming a via hole for interlayer connection of the CCL 10 and the RCC 30 that are heated and pressurized with the multilayer; 상기 비어홀내를 도금하여 전기적으로 도통하는 도금층을 형성시키어 층간을 접속하는 단계와,Forming an electrically conductive plating layer by plating the via hole to connect the layers; 상기 RCC(30)에 회로패탄을 갖는 외층회로(34)를 형성시키는 단계로서 구성되는 기판 제조방법에 있어서,In the method of manufacturing a substrate configured as the step of forming the outer circuit 34 having a circuit shell in the RCC 30, 상기 CCL(10)의 일측으로 내층회로가 형성되지 않도록 하여 단차로서 안테나회로(50)를 형성하는 단계와,Forming an antenna circuit 50 as a step so that an inner layer circuit is not formed on one side of the CCL 10; 상기 안테나회로(50)의 일측으로 보이드의 발생을 방지토록 가스누출수단 (40)을 형성시키는 단계를 추가로 포함하는 것을 특징으로 하는 무선 단말기용 다층 인쇄회로기판의 보이드 제거방법The method of removing voids of a multi-layer printed circuit board for a wireless terminal, characterized in that it further comprises the step of forming a gas leakage means 40 to prevent the generation of voids on one side of the antenna circuit (50). 제 1항에 있어서, 상기 가스누출수단(40)은, 안테나회로(50) 일측으로 기판 더미(1a) 부분에 형성된 패턴(60)상에 단차(d)로서 형성되는 것을 특징으로 하는 무선 단말기용 다층 인쇄회로기판의 보이드 제거방법The method of claim 1, wherein the gas leakage means 40 is formed as a step (d) on the pattern (60) formed in the substrate dummy (1a) to one side of the antenna circuit (50). How to remove voids of a multilayer printed circuit board
KR1019990025936A 1999-06-30 1999-06-30 Method of elimina ting void in multi-layer printed circuit board for wieress terminal KR100311814B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019990025936A KR100311814B1 (en) 1999-06-30 1999-06-30 Method of elimina ting void in multi-layer printed circuit board for wieress terminal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019990025936A KR100311814B1 (en) 1999-06-30 1999-06-30 Method of elimina ting void in multi-layer printed circuit board for wieress terminal

Publications (2)

Publication Number Publication Date
KR20010005138A true KR20010005138A (en) 2001-01-15
KR100311814B1 KR100311814B1 (en) 2001-11-03

Family

ID=19597975

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019990025936A KR100311814B1 (en) 1999-06-30 1999-06-30 Method of elimina ting void in multi-layer printed circuit board for wieress terminal

Country Status (1)

Country Link
KR (1) KR100311814B1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100798632B1 (en) 2006-12-30 2008-01-28 주식회사 모젬 Window for display device and wireless terminal unit comprising the same
KR102426923B1 (en) 2021-03-26 2022-07-29 주식회사 디에이피 Printed circuit board

Also Published As

Publication number Publication date
KR100311814B1 (en) 2001-11-03

Similar Documents

Publication Publication Date Title
EP1298972B1 (en) Multilayer wiring circuit board
KR100761706B1 (en) Fabrication method for printed circuit board
US8687380B2 (en) Wiring board and method for manufacturing the same
US20120017435A1 (en) Method of manufacturing PCB having electronic components embedded therein
US10674608B2 (en) Printed circuit board and manufacturing method thereof
KR20120137175A (en) The printed circuit board and the method for manufacturing the same
KR20140098675A (en) Wiring substrate and method for manufacturing the same
KR101018281B1 (en) Method for fabricating printed circuit board contaning embedded passive components
KR100920824B1 (en) Manufacturing method of printed circuit board and electromagnetic bandgap structure
KR100311814B1 (en) Method of elimina ting void in multi-layer printed circuit board for wieress terminal
JP2011222962A (en) Print circuit board and method of manufacturing the same
KR20030011433A (en) Manufacturing method for hidden laser via hole of multi-layered printed circuit board
KR20060042723A (en) Method for manufacturing rigid-flexible printed circuit board
KR100704917B1 (en) Printed circuit board and the manufacturing method thereof
US20220232697A1 (en) Circuit board with at least one embedded electronic component and method for manufacturing the same
KR200415210Y1 (en) Rigid-flexible Printed Circuit Board
KR100789521B1 (en) Fabricating method of multi layer printed circuit board
KR102186150B1 (en) Printed circuit board using the insulating film and method for manufacturing the same
JPH1174641A (en) Multilayer wiring board
KR20030011434A (en) Manufacturing method for hidden laser via hole of multi-layered printed circuit board
JP2003309357A (en) Method of manufacturing printed wiring board and printed wiring board
JP2024117490A (en) Waveguide substrate and method for manufacturing the same
KR101977421B1 (en) Method of manufacturing printed circuit boards having vias with wrap plating
JP2006032830A (en) Method for manufacturing partial build-up wiring circuit board
JP3665036B2 (en) Printed wiring board manufacturing method and printed wiring board

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20130624

Year of fee payment: 13

FPAY Annual fee payment

Payment date: 20140701

Year of fee payment: 14

LAPS Lapse due to unpaid annual fee