KR20000066130A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

PURPOSE: A method for manufacturing a semiconductor device is provided to greatly improve a short channel characteristic by forming a source/drain region on a substrate, to simplify a manufacturing process without a separate ion injection process, and to prevent impurities for controlling a threshold voltage from being thermally affected when an annealing process for activating impurities for the source/drain is performed. CONSTITUTION: A semiconductor layer is selectively formed on a semiconductor substrate(31). Impurities for a source and a drain are injected to the semiconductor layer. An insulating sidewall is formed on both side surfaces of the semiconductor layer. An ion injection for controlling a threshold voltage is performed regarding the substrate between semiconductor layers having the insulating sidewall. A gate electrode(39) is formed on the semiconductor substrate injected with the ions for controlling the threshold voltage by intervening a gate insulating layer. An insulating sidewall is formed on both side surfaces of the gate electrode.

Description

Semiconductor device and its manufacturing method {SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME}

The present invention relates to a semiconductor device, and more particularly to a method for manufacturing a semiconductor device suitable for improving the reliability and short channel characteristics of the device.

In general, in view of the trend of requiring high integration to increase the package mounting density of the device, high integration of the transistor leads to a decrease in the channel length of the transistor.

That is, the short channel device becomes narrower between the source and the drain. The short channel device generates a phenomenon in which current flows to a region other than the channel region (for example, a substrate) during operation, and thus the threshold voltage Difficulty adjusting

In actual high density devices, the short channel is a big problem, and various methods have been proposed to reduce the short channel characteristics.

Hereinafter, a semiconductor device manufacturing method according to the prior art will be described with reference to the accompanying drawings.

1A to 1D are cross-sectional views illustrating a method of manufacturing a conventional semiconductor device.

As shown in FIG. 1A, the well region 12 of the first conductivity type is formed in the semiconductor substrate 11 of the first conductivity type, and a field oxide film 13 is selectively selectively formed using a local oxidation process or the like. Form.

After implanting channel ions into the well region 12, the gate insulating film 14 is formed.

As shown in FIG. 1B, after the polysilicon layer is formed on the gate insulating layer 14, the gate electrode 15 is formed using a photolithography process.

Thereafter, the LDD region 16 is formed in the well region 12 through the low conductivity impurity ion implantation of the second conductivity type using the gate electrode 15 as a mask.

As shown in FIG. 1C, an insulating film is deposited on the entire surface of the substrate 11 including the gate electrode 15, and then etched back to form insulating side walls 17 on both sides of the gate electrode 15.

As shown in FIG. 1D, after the second conductivity type high concentration impurity ion implantation using the insulating side wall 17 and the gate electrode 15 as a mask is performed, the source impurity region 18 and the drain impurity region ( 18a) completes the conventional semiconductor device manufacturing process.

However, the conventional semiconductor device manufacturing method as described above has the following problems.

First, there are difficulties and limitations in controlling the threshold voltage due to the short channel effect in order to satisfy the high integration.

Second, LDD ion implantation or halo ion implantation is required to improve short channel characteristics.

Third, since the ion implantation for source and drain formation must be performed after implanting the ion for threshold voltage adjustment, thermally affecting the impurity for threshold voltage adjustment during activation annealing of the source and drain impurities.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems of the prior art, and an object thereof is to provide a method of manufacturing a semiconductor device suitable for improving the reliability of a device by improving short channel characteristics.

1A to 1D are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the related art.

2 is a structural cross-sectional view of a semiconductor device according to the present invention.

3A to 3F are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with the present invention.

Explanation of symbols for main parts of the drawings

31 semiconductor substrate 32 field oxide film

33: thermal oxide film 34: silicon nitride film

35 source and drain semiconductor layer 36 insulating film

37 first insulating side wall 38 gate insulating film

39 gate electrode 40 cap gate insulating film

41: second insulation side wall

The semiconductor device of the present invention for achieving the above object is a semiconductor substrate, a source semiconductor layer and drain semiconductor layers selectively formed on the substrate, a first insulating side wall formed on both sides of each semiconductor layer, the source A gate electrode formed on a substrate between the semiconductor layer and the drain semiconductor layer via a gate insulating film, and a second insulating side wall formed on both sides of the gate electrode, wherein the method of manufacturing a semiconductor device of the present invention is selective on a semiconductor substrate. Forming a semiconductor layer, injecting impurities for source / drain into the semiconductor layer, forming insulating side walls on both sides of the semiconductor layer, and a substrate between the semiconductor layers on which the insulating side walls are formed. A process of performing the ion implantation for adjusting the threshold voltage, and a semiconductor substrate implanted with the ion for adjusting the threshold voltage It characterized in the step of forming a gate electrode by interposing a gate insulating film, yirueojim including the step of forming an insulating side wall on both sides of the gate electrode.

Hereinafter, a semiconductor device and a method of manufacturing the same will be described with reference to the accompanying drawings.

2 is a structural cross-sectional view of a semiconductor device according to the present invention.

As shown in FIG. 2, the semiconductor substrate 31, the source and drain semiconductor layers 35 selectively formed on the semiconductor substrate 31, and the first and second sides formed on both sides of the source and drain semiconductor layers 35. A gate electrode 39 formed on the substrate 31 between the first insulating side wall 37 and the source and drain semiconductor layers 35 having the first insulating side wall 37 via a gate insulating film 38; And second insulating side walls 41 formed on both side surfaces of the gate electrode 39.

Here, the source and drain semiconductor layer 35 is an epitaxial layer formed by using the substrate 31 as a seed layer.

Referring to the semiconductor device manufacturing method of the present invention configured as described above is as follows.

3A to 3F are cross-sectional views illustrating a method of manufacturing a semiconductor device of the present invention.

As shown in FIG. 3A, a field oxide film 32 is selectively formed on the semiconductor substrate 31 of the first conductivity type.

After the thermal oxide film 33 is grown on the semiconductor substrate 31 in the active region, the silicon nitride film 34 is deposited on the thermal oxide film 33, and then the silicon nitride film ( 34) and the thermal oxide film 33 are sequentially etched.

As shown in FIG. 3B, a source / drain semiconductor layer 35 is formed on the exposed semiconductor substrate 31.

Since the source / drain semiconductor layer is an epitaxial layer grown using the substrate 31 as a seed, hereinafter, referred to as an epitaxial layer 35.

Thereafter, an insulating film 36 is formed on the surface of the epitaxial layer 35 to insulate the surface of the epitaxial layer 35.

As shown in FIG. 3C, impurity ions are implanted into the epitaxial layer 35 and the silicon nitride film 34 by implanting impurity ions of the second conductivity type to form a source / drain without using a mask. .

Thereafter, as shown in FIG. 3D, after removing the silicon nitride film 34, ion implantation for adjusting the threshold voltage is performed, and an insulating film is deposited on the entire surface including the substrate 31.

The insulating layer is etched back to form first insulating side walls 37 on both sides of the epitaxial layer 35.

Subsequently, as shown in FIG. 3E, a gate insulating film 38 is formed on the substrate 31 between the first insulating side walls 37.

As shown in FIG. 3F, the gate electrode material and the cap insulating film are deposited, and then patterned to form a gate electrode 39 having the cap gate insulating film 40 thereon.

Thereafter, when the second insulating side walls 41 are formed on both sides of the cap gate insulating layer 40 and the gate electrode 39, the semiconductor device manufacturing process of the present invention is completed.

As described above, the semiconductor device and its manufacturing method of the present invention have the following effects.

First, since the source and drain regions are formed on the substrate in the fabrication of highly integrated transistors, the short channel characteristics can be significantly improved.

Second, since the ion implantation process for improving the short channel characteristics is not required separately, the process can be further simplified.

Third, since the threshold voltage adjustment ion implantation is performed after the source and drain impurity regions are formed, the threshold voltage control impurities are not affected during annealing to form the source / drain impurity regions.

Fourth, since the epitaxial layer is grown before implanting the source / drain impurity ions or the threshold voltage control ions, the high temperature process for epitaxial growth does not cause diffusion of other impurities.

Fifth, since insulating side walls are formed on both sides of the gate electrode, photo margins as large as the area of the insulating side walls can be secured, and the fine limits of the photo process can be overcome when forming the word lines.

Claims (6)

A semiconductor substrate of a first conductivity type; Source and drain semiconductor layers selectively formed on the substrate; First insulating side walls formed on both side surfaces of each of the semiconductor layers; A gate electrode formed on the substrate between the source semiconductor layer and the drain semiconductor layer via a gate insulating film; And a second insulating side wall formed on both sides of the gate electrode. The semiconductor device of claim 1, wherein the source and drain semiconductor layers are epitaxial layers grown from the substrate. The semiconductor device of claim 1, further comprising an insulating layer on the source and drain semiconductor layers. Selectively forming a semiconductor layer on the semiconductor substrate; Implanting source / drain impurities into the semiconductor layer; Forming insulating side walls on both sides of the semiconductor layer; Performing ion implantation of a threshold voltage on a substrate between the semiconductor layers on which the insulating side walls are formed; Forming a gate electrode on the semiconductor substrate into which the threshold voltage adjustment ions are implanted through a gate insulating film; And forming an insulating side wall on both sides of the gate electrode. The method of claim 4, wherein the semiconductor layer is formed by growing an epitaxial layer using the substrate as a seed. The process of claim 4, wherein the forming of the semiconductor layer comprises: Stacking a thermal oxide film and a silicon nitride film on the substrate, and then selectively removing the substrate to expose the substrate; Epitaxially growing the exposed substrate as a seed; And forming an insulating film on the surface of the epitaxial layer.