KR20000050044A - Digital Signal Processing Apparatus for Automatic Control - Google Patents

Abstract

PURPOSE: A digital signal processor for automatic control is provided to convert an analog signal inputted from an external input/output unit into a reference analog signal having proper level and frequency scope, and to perceive a BUS type of a host computer automatically, and to convert the perceived type into the reference BUS type. The digital signal processor is provided automatically to control a processor for digital signal process(DSP), a memory block, and a system BUS of the host computer. CONSTITUTION: A digital signal processor for an automatic control includes a processor for a digital signal process(DSP) counting an output signal for processing and controlling an input signal automatically, a memory block, and an internal system BUS which each internal device transmits/receives a signal including data and addresses, comprises an analog processor(160) and a BUS processor(120). The analog processor(160) converts an analog signal inputted from an external input unit into a standard analog signal, and then into digital/analog, converts an output processed in a digital signal by the DSP into digital/analog, and then into an analog signal having a specific character, to output to an external output unit. The BUS controller(120) recognizes a BUS type of host computer automatically, and converts the BUS type into a BUS type of the DSP, to interface the TSP and a host computer.

Description

Digital Signal Processing Apparatus for Automatic Control

The present invention relates to a digital signal processing apparatus for real time automatic control, and more particularly, to a digital signal processing board having a digital signal processing processor (DSP) embedded therein and interfaced with a bus on a slot of a host computer. .

Background Art Conventionally, a control board including a digital signal processing processor is widely used as a control system for real time controlling an output device including an actuator such as a motor based on information input from various sensors. The digital signal processing device for automatic control is widely adopted because it can be adapted to various application fields by changing the software, and the system can be easily changed or monitored by the interface with the host computer. It is becoming. In addition, in recent years, with the development of processor technology for digital signal processing, the processing capacity is maximized, and the access speed is increased with the development of memory technology, so that the application fields that can be controlled in real time by these general-purpose control devices are increasing.

However, existing control boards are designed differently depending on the application field or the bus type of the host computer. That is, according to the characteristics of the analog signal input and output, additional hardware must be separately provided or the overall design change must be made. Also, the automatic control device for digital signal processing used according to the bus type of the host computer must be separately configured. There was a problem that excessive time wasted.

An object of the present invention is to provide a digital signal processing apparatus for automatic control that can be commonly used regardless of the characteristics of an analog signal input and output.

It is also an object of the present invention to provide a digital signal processing apparatus for automatic control that can be interfaced regardless of the bus type of the host computer.

1 is a block diagram of an automatic control apparatus for digital signal processing according to the present invention.

FIG. 2 is a block diagram showing the structure of the bus control unit 120 in FIG.

3 is a block diagram showing the structure of the control unit 140 in FIG.

FIG. 4 is a block diagram showing the structure of the memory block unit 150 in FIG.

FIG. 5 is a block diagram showing the structure of the analog processor 160 in FIG.

FIG. 6 is a block diagram showing the structure of the analog signal converter 580 in FIG.

7 is a flowchart illustrating processing of the analog processing unit 160 in one embodiment of the present invention.

FIG. 8 illustrates an embodiment of the host bus converter 220 of FIG.

9 is a flow chart showing the processing flow of the embodiment of FIG.

<Explanation of symbols for the main parts of the drawings>

100; Host Computer 110: Host Bus

120: bus controller 130; Digital Signal Processor (DSP)

140: control unit 150: memory block

160: analog processing unit 170; Internal system bus

An automatic control digital signal processing apparatus of the present invention for achieving the above object comprises an analog signal conversion unit for converting the analog signal input and output from the external input and output device into a standard analog signal having a level and frequency range of an appropriate level;

And a host bus converter for automatically recognizing the bus type of the host computer and converting the bus type into a standard bus.

The present invention also provides a digital signal processing processor (DSP) for processing an input signal to calculate an output signal for automatic control; A memory block unit for storing programs and data; And an internal system bus in which each device therein sends and receives a signal comprising data and address, the device comprising:

Converts analog signal input from external input device into standard analog signal, analog / digital conversion, digital / analog conversion of digital signal processing by digital signal processing processor, and then converts into analog signal with certain characteristics An analog processor for outputting to an external output device;

A bus controller 120 for automatically recognizing the bus type of the host computer and converting the bus type into a bus type of the digital signal processing processor to interface the host computer with the digital signal processing processor;

Characterized in that it comprises a.

In another embodiment, the present invention is to process the control signals from the digital signal processing processor, memory block unit, analog processing unit, bus control unit to the digital signal processing processor, memory block unit, analog processing unit, bus control unit And a control unit for outputting a control signal.

In another embodiment of the present invention the bus control unit,

A host bus converter for automatically recognizing the type of the host bus and converting the host bus into a common bus structure;

A data bus converter for extracting a data bus from the converted common bus and converting the data bus to a data bus type of the digital signal processor;

An address bus converter for extracting an address bus from the converted common bus and converting the address bus to an address bus type of the digital signal processing processor;

A control bus converter for extracting a control bus from the converted common bus and converting the control bus into a control bus type of the digital signal processing processor;

Characterized in that it comprises a.

In another preferred embodiment of the present invention, the analog processing unit,

Extracts feature parameters from an analog signal from an external input device and uses it to convert the analog signal into a standard analog signal with a range of levels and a range of frequencies, while outputting a standard analog signal that is a signal-processed output. An analog signal conversion unit for converting an output analog signal having a characteristic required by the controller into an output analog signal;

An analog / digital converter for converting the analog signal output from the analog signal converter into a digital signal;

A digital / analog converter for converting the digital signal output by the digital signal processor into the standard analog signal;

Characterized in that it comprises a.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily understand and reproduce the present invention.

1 is a block diagram of an automatic control apparatus for digital signal processing according to the present invention. As shown, the automatic control device for digital signal processing according to the present invention is a bus controller for interfacing with a host computer 100 having a host bus 110 in the form of ISA or PCI, for example, and transmitting necessary data. 120; A memory block unit 150 for storing a program for controlling the overall operation and necessary data; An analog processor 160 for receiving an externally input analog signal, converting the digitally processed signal into an analog signal and outputting the analog signal to an external device; A control unit 140 for generating a control signal for controlling the bus control unit 120, the memory block unit 150, the analog processing unit 160, and the like; Controls all of the above devices, transmits the processed data to the host computer 100 by the bus controller 120, and receives the data processed by the host computer 100 through the bus controller 120. A signal processing processor (DSP) 130; And an internal system bus 170 for connecting the devices on a single bus.

FIG. 2 is a block diagram showing the structure of the bus control unit 120 in FIG.

As shown in FIG. 2, the bus controller 120 automatically recognizes a type of a host bus such as an ISA bus and a PCI bus, and converts the bus bus into a common bus structure having signals in the form of an ISA bus or a PCI bus, for example. A host bus converter 220 for interfacing with the interface; A common host bus 230 converted by the host bus converter 220; A data bus converter 240 for converting a data bus of the common host bus into a predetermined data bus defined in the digital signal processor (DSP) 130; An address bus converting section 250 for converting an address bus among the common host buses into a predetermined address bus defined in the digital signal processing processor (DSP) 130; And a control bus converter 260 for converting the control bus among the common host buses into a predetermined control bus defined in the digital signal processing processor (DSP) 130. Such bus conversion is generally facilitated by those skilled in the art since the bus structure is disclosed in the databook, and the address bus and the data bus or control bus have a common common structure. In the following description, the host computer bus is one of the most common ISA or PCI buses.

The host bus converter 220 of the bus controller 120 recognizes a bus type of the host computer and converts the bus type into one of an ISA bus or a PCI bus, and then a predetermined data bus of the digital signal processor 130. In addition, the address bus converter 250 maps to an address bus suitable for the digital signal processing processor (DSP) 130. Meanwhile, various control signals generated by the host computer 100 are converted into a control bus suitable for the digital signal processing processor 130 by the control bus converter 260.

FIG. 8 illustrates an embodiment of the host bus converter 220 of FIG. 2, and FIG. 9 is a flowchart illustrating a process flow of the embodiment of FIG.

Referring to the drawings, the host converter 220 includes: a RESET detector 221 for receiving the RESET signal RST on the ISA bus and the RESET signal RST # on the PCI bus and detecting these signals; The RESET detector 221 may be configured as a bus selector 222 for determining a RESET signal and setting the ISA bus and the PCI bus.

At this time, the REST detector 221 first detects the RESET signal RST of the ISA bus and the RESET signal RST # of the PCI bus (step 910). The detection method is that the RESET signal of the ISA bus and the RESET signal of the PCI bus are located at different positions on the host computer, and the RESET signal of the ISA bus is activated when 'High', and the RESET signal on the PCI bus is 'Low'. In this case, by being activated, these different activation states are detected to recognize the ISA bus and the PCI bus. This method is generally possible by identifying and combining signal line positions and typical signal levels in each bus databook according to the type of each host bus.

According to the RESET signal detected by the RESET detector 221 (step 920), the system bus of the host computer maps to the system bus of the microprocessor for digital signal processing (step 930 and Step 940).

First, in the case where it is mapped to the ISA bus in step 920, since the data bus of the ISA bus is 16 bits and the address bus is composed of 20 bits, in step 930, the 16-bit host data bus is divided into 32 bits. It is mapped to the data bus of the microprocessor for digital signal processing, and the 20-bit host address bus is mapped to the address bus of the 32-bit digital signal processing microprocessor.

In addition, in the case of mapping to the PCI bus in step 930, since the data bus of the PCI bus is 64 bits and the address bus is composed of 32 bits, by step 940, the 64-bit host data bus is divided into 32 bits. It is mapped to the data bus of the microprocessor for digital signal processing, and the 32-bit host address bus is mapped to the address bus of the 32-bit digital signal processing microprocessor.

In this way, the automatic control device for digital signal processing according to the present invention is the digital signal processing processor which is a digital signal processing microprocessor which is used after automatically recognizing the bus type regardless of the bus type of the host computer 100. (DSP) 130 is converted to a suitable system bus.

3 is a block diagram showing the structure of the control unit 140 in FIG. The control unit 140 generates the overall control signal of the automatic control apparatus for digital signal processing according to the present invention according to the control signal mapped by the control bus converter 260 to the control signal of the host computer 100. The control unit 140 includes: a digital signal processing processor (DSP) control signal generator 320 for generating all control signals used in the digital signal processing processor (DSP) 130; A memory block control signal generator 330 for generating all control signals used in the memory block 150; A bus controller control signal generator 340 for generating all control signals used by the bus controller 120; It is configured to include an analog processor control signal generator 350 for generating all the control signals used in the analog processor 160. The configuration of the control unit is an example, and those skilled in the art can easily be implemented in various forms. For example, each of the control signal generators may be integrated and implemented in one FPGA or may be configured as a separate decoder adjacent to a block requiring each signal. These bus conversions themselves are well known in the art and typically consist of decoding input signal lines.

FIG. 4 is a block diagram showing the structure of the memory block unit 150 in FIG. As shown in FIG. 4, the memory block 150 includes: a program memory unit 430 for operating an overall operating state and including a program for operating an operating state with a host computer; A data memory unit 440 for storing data generated during operation, data processed by a host computer, and data input from the analog processor; A backup data memory unit 450 for backing up and storing all data at the present time in case of an emergency such as a power failure; It is preferably configured to include a memory block control unit 420 for generating a control signal for decoding the program memory unit 430, the data memory unit 440 and the backup data memory unit 450. The system program of the program memory unit 430 controls the operation of the user program created and transmitted by the host computer 100, and monitors an abnormal state of the system so as to appropriately cope with the generated abnormal state. Built in. In addition, a high-speed data memory unit 440 for storing data generated during system operation and data for mutual transmission with the host computer 100 is provided. In addition, the backup data memory unit 450 is provided to back up all control and data values of the current system in case of an emergency such as a power failure so as not to affect the operation state of the system even if an abnormal state occurs. do. In addition, the memory block controller 420 generates a control signal for controlling these memory units.

FIG. 5 is a block diagram showing the structure of the analog processor 160 in FIG. As shown, the analog processor 160 includes, in a preferred embodiment, an analog signal converter 580 for converting an analog signal required by an external input / output device into a standard analog signal having an appropriate level; An amplifier 540 for amplifying the analog signal input from the external input / output device through the analog signal converter 580 to a level of an appropriate level; An analog / digital converter 530 which receives the analog signal amplified by the amplifier 540 and converts the analog signal into a corresponding digital signal; A digital / analog converter 550 for converting the digital signal processed by the digital signal processor (DSP) 130 into an analog signal suitable for an external input / output device; A filter unit 560 for flattening the analog signal converted by the digital / analog converter 550 with respect to time and outputting the same to an external input / output device; A clock generator 570 for generating a clock for determining a cutoff frequency of the filter unit 560, a sampling frequency of the analog / digital converter 530, and a conversion period of the digital / analog converter 550; ; And an analog controller 520 which is interfaced with the internal system bus 510 and generates a control signal of the analog / digital converter 530 and the digital / analog converter 550.

As shown, the analog processor 160 digitally processes the analog signal input and output irrespective of the type of the analog signal required by the external input / output device. That is, in the case of an input analog signal, the analog signal is converted into an analog signal of a suitable standard form by the analog signal converter 580 and the analog / digital converter through the amplifier 540 which is an analog buffer. After the digital signal is converted by the digital signal processor 530, the digital signal processor 130 may process the digital signal. Also, the digital-to-analog converter 550 converts the digitally processed data into a standard type analog signal, and then the filter unit 560 smoothes the signal with respect to time. The signal converter 580 outputs an analog signal suitable for the output device. Preferably, the analog signal inputted according to the above structure is converted into a standard analog signal, or the standard analog signal after digital processing is converted into an analog signal suitable for the output device is programmed by the user and the host computer 100 In order to determine the type of signal for this, a command is given to the automatic control device for digital signal processing.

FIG. 6 is a block diagram showing the structure of the analog signal converter 580 in FIG. As shown in the figure, the analog signal converter 580 determines an input analog signal type input from the input / output device and extracts a feature parameter for converting the feature parameter into an analog signal having an appropriate level. )Wow; A standard input analog signal generator 630 for converting the analog signal determined by the input analog signal discriminator 620 into a standard analog signal of a constant and appropriate level; A standard output analog signal generator 650 for adding a feature parameter for converting a digitally processed signal into a standard analog signal converted by the digital / analog converter 550 into an analog signal suitable for an output device; An output analog signal discrimination unit 640 for finally converting the analog signal generated by the standard output analog signal generation unit 650 into an analog signal suitable for an output device and outputting the analog signal; And an analog signal conversion control unit 610 for generating a clock for the frequency band used in all the above devices and generating all control signals.

7 is a flowchart illustrating processing of the analog processing unit 160 in one embodiment of the present invention.

As shown, the automatic control device for digital signal processing according to the present invention, first, in step 710, when an analog signal is input from the input / output device, it is determined whether the input signal is a standard analog signal. Thereafter, if the input signal is a standard analog signal, digital signal processing as in step 720 is performed. If the input signal is not a standard analog signal, a feature parameter is extracted from the input analog signal, and then a standard analog signal corresponding to the feature parameter of the extracted analog signal is generated to process digital signals.

Further, in order to output the digitally processed data to the input / output device by step 730, first, it is determined whether the analog signal required by the input / output device is a standard analog signal, and if the input / output device requires a standard analog signal, the process is performed. The analog signal can be output as it is. If the signal required by the input / output device is not a standard analog signal, a feature parameter of the analog signal required by the corresponding input / output device may be extracted, and an analog signal corresponding thereto may be generated and then output.

Here, the feature parameters of the input analog signal are divided into frequency bands, bandwidth and phase changes, and amplitude changes of the analog signals that characterize the input analog signal. A signal having a magnitude is referred to as a standard analog signal.

In the present invention, the bus controller 120 or the controller 140 may be simply implemented by using programmable logic such as a single FPGA.

In the automatic control device for digital signal processing according to the present invention as described above, the automatic control device according to the bus type of the host computer is not designed separately because it can be applied to all the plurality of buses without depending on the bus type of the host computer. By not doing so, the cost and the design period can be reduced. In the automatic control digital signal processing apparatus, since the shape of the slot of the PCB can be changed very easily, the common use of these circuit parts is a great advantage in terms of design in actual production.

In addition, by converting the analog signal used in the input and output device to a standard analog signal defined in the automatic control device for digital signal processing according to the present invention is digitally processed, no additional hardware device is required depending on the type of analog signal. This can reduce the cost and design period. In other words, it is possible to maintain compatibility with all the input and output devices, thereby reducing the cost and design period by not designing additional hardware as the input / output device changes.

Claims (5)

A digital signal processing processor (DSP) for processing an input signal and calculating an output signal for automatic control; A memory block unit for storing programs and data; And an internal system bus in which each device therein sends and receives a signal comprising data and address, the device comprising: Converts analog signal input from external input device into standard analog signal, analog / digital conversion, digital / analog conversion of digital signal processing by digital signal processing processor, and then converts into analog signal with certain characteristics An analog processor for outputting to an external output device; A bus controller 120 for automatically recognizing the bus type of the host computer and converting the bus type into a bus type of the digital signal processing processor to interface the host computer with the digital signal processing processor; Digital signal processing device for automatic control comprising a. The method according to claim 1, wherein the digital signal processing device, A controller for processing control signals from the digital signal processor, a memory block unit, an analog processor, and a bus controller to output control signals to the digital signal processor, a memory block unit, an analog processor, and a bus controller; Digital signal processing device for automatic control comprising a. The method according to claim 1 or 2, wherein the bus control unit, A host bus converter for automatically recognizing the type of the host bus and converting the host bus into a common bus structure; A data bus converter for extracting a data bus from the converted common bus and converting the data bus to a data bus type of the digital signal processor; An address bus converter for extracting an address bus from the converted common bus and converting the address bus to an address bus type of the digital signal processing processor; A control bus converter for extracting a control bus from the converted common bus and converting the control bus into a control bus type of the digital signal processing processor; Digital signal processing device for automatic control comprising a. The method according to claim 1 or 2, wherein the analog processing unit, Extracts feature parameters from an analog signal from an external input device and uses them to convert the analog signal to a standard analog signal with a range of levels and a range of frequencies, while writing out a standard analog signal, a signal-processed output. An analog signal conversion unit for converting an output analog signal having a characteristic required by the device; An analog / digital converter for converting the analog signal output from the analog signal converter into a digital signal; A digital / analog converter for converting a digital signal output by the digital signal processor into a standard analog signal; Digital signal processing device for automatic control comprising a. The digital signal processing apparatus for automatic control according to claim 1 or 2, wherein the type of the host bus is limited to one of an ISA bus and a PCI bus.