KR20000042435A - Method for addressing memory of micro controller - Google Patents

Abstract

PURPOSE: A method for addressing a memory of a micro controller is provided to prevent a capacity deterioration caused by frequent updating processes of a page address, by dividing the page address for accessing page units into time when the address is read and time when the address is written, and to easily access all pages as expanding a special internal memory region. CONSTITUTION: A micro controller has a first/a second memory region and a third memory region. The first/the second memory regions have same upper memory address ranges. The third memory region has a lower memory address range. A method for addressing a memory of the micro controller for expanding the third memory region to page units, comprises the steps of: generating a control signal enabled accordingly whether a command of the micro controller is a direct or an indirect addressing mode command; and deciding whether the micro controller accesses the page units for the third memory region or accesses a predetermined page only, according to the control signal.

Description

Memory addressing method of microcontroller

The present invention relates to a memory addressing method of a microcontroller, and more particularly, to a memory addressing method of a microcontroller that can efficiently expand an internal memory area.

An 8 / 16-bit Micro-Controller Unit (MCU) is widely used for system-wide control. Such an 8 / 16-bit microcontroller has an address area of 8/16 bits at initial design, so that the available memory area is about 64/256 Kbytes. Therefore, an efficient memory expansion method is required for an application that requires a large amount of memory.

Figure 1 shows an internal memory map of a conventional Intel 80C52.

In FIG. 1, the internal memory area is divided into an A area and a B area occupying a common upper memory area, and a C area which is a lower memory area.

The A memory area is a special function register (SFR) area, which has an address address of 80h to ffh, can be accessed only by the direct addressing mode, and has a size of 128 bytes. In addition, the B memory area is a user area and has the same address address and size as the A area, but can be accessed only in the indirect addressing mode. In addition, the C memory area is a general user memory area and has an address address of 00h to 7fh and a size of 128 bytes. In this case, the memory area of 00h to 1fh, which is the lowest memory area, may also be allocated to the register area 10 of 32 bytes, and the memory area 20 of 20h to 2fh may be accessed in units of bits. At this time, the direct and indirect addressing modes as the addressing mode are determined by the instruction. In other words, the direct addressing mode refers to a method of directly using an operand of the instruction as an address for accessing data. Indirect addressing mode, on the other hand, refers to a manner in which an operand of an instruction becomes an address of an address for accessing data. At this time, the C memory area is available in both direct and indirect addressing modes. Thus, access is possible either as general memory or as a register, which is distinguished by instructions. If it is irrelevant in the field that can be sufficiently made with only the memory region shown in FIG. 1, but if more memory regions are needed, it is used in the form of extending the C memory region as shown in FIG.

2 illustrates a form in which a C memory area is extended to a plurality of pages.

In FIG. 2, the C memory area is extended to a plurality of pages and accessed in units of pages. A register 30 is used to store the page address to access the extended memory area. In other words, the page address stored in this register 30 corresponds one-to-one with each page of the C memory area. That is, when the page address is '0', page 0 of the C memory area is mapped as '1', and page 1 is mapped. Using this method, you can effectively expand the internal memory area. However, this method disables the register area in the C memory area on every page.

The present invention has been made to solve the above problems, and an object thereof is to provide a memory addressing method of a microcontroller capable of accessing all pages while efficiently expanding a specific internal memory area.

1 and 2 are diagrams for explaining a memory addressing method of a conventional microcontroller.

3 is a diagram illustrating a memory addressing method of a microcontroller according to an exemplary embodiment of the present invention.

4 is a diagram for describing a memory addressing method of a microcontroller according to another exemplary embodiment of the present invention.

* Description of the main parts of the drawing

30, 40, 50, 60: register

42, 44, 52, 62: buffer

A memory addressing method of a microcontroller according to the present invention for achieving the above object comprises the steps of generating a control signal enabled according to whether the instruction of the microcontroller is a direct or indirect addressing mode instruction, and according to the control signal. And determining whether to access a page unit or only a predetermined page of the internal memory area.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

3 is a diagram for describing a memory addressing method of a microcontroller according to an exemplary embodiment of the present invention.

In FIG. 3, in order to efficiently expand the memory of the microcontroller, the Reg control signal generated according to the decoding result of the instruction is used. This Reg signal is enabled as '1' when the instruction is in direct addressing mode, and disabled as '0' when the instruction is in indirect addressing mode. Then, it is determined whether or not the output value of the register 40 for storing the page address is valid according to the Reg signal. In other words, when the Reg signal is enabled as '1', the buffers 42 and 44 are in a high impedance state and the output value of the register 40 is ignored. Therefore, only 0 pages of the C memory area can be accessed. On the contrary, when the Reg signal is disabled as '0', the buffers 42 and 44 pass the output value of the register 40 as it is. Thus, all pages of the C memory area can be accessed by the stored page address of the register 40. In this way, the register area of the C memory area can be viewed on every page. However, this method is degraded due to the frequent update of page addresses in block data transfer between pages. That is, in the case of block data transfer that is continuously transferred from one page to another page of the C memory area, the stored value of the register 40 must be updated once at read time, and again at the time of rewriting. This frequent page address update increases block data transfer time. In order to improve this, as shown in FIG. 4, this problem can be solved by separately storing the page addresses at the time of writing and writing.

4 is a diagram for describing a memory addressing method of a microcontroller according to another exemplary embodiment of the present invention.

In Fig. 4, two registers 50 and 60 are provided for separately storing page addresses at the time of read and at the time of writing for each page of the C memory area. At this time, the Reg signal is used as a control signal of the buffers 52 and 54 for determining whether to cut off the output values of the two registers 50 and 60. By using this method, it is possible to prevent performance degradation due to frequent page address updates during block data transfer.

Although the technical spirit of the present invention has been described in detail according to the above-described preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The memory addressing method of the microcontroller according to the present invention as described above allows for easy access to all pages while efficiently extending a specific internal memory area. In particular, by separately accessing the page address for page-by-page access at read and write time, performance degradation due to frequent update of the page address can be prevented.

Claims (2)

In the microcontroller having the first and second memory areas having the same upper memory address range, and the third memory area of the lower memory address range, the microcontroller memory addressing method for extending the third memory area in units of pages. , Generating a control signal enabled according to whether the instruction of the microcontroller is a direct or indirect addressing mode instruction; And And determining whether to access page-by-page or only a predetermined page of the third memory area according to the control signal. The method of claim 1, When accessing the page in the unit of the third memory area in a unit of page, the memory addressing method of the microcontroller, characterized in that the access to the page address at the time of read and write separately.