KR20000027490A - Tft lcd - Google Patents

Tft lcd Download PDF

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Publication number
KR20000027490A
KR20000027490A KR1019980045435A KR19980045435A KR20000027490A KR 20000027490 A KR20000027490 A KR 20000027490A KR 1019980045435 A KR1019980045435 A KR 1019980045435A KR 19980045435 A KR19980045435 A KR 19980045435A KR 20000027490 A KR20000027490 A KR 20000027490A
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South Korea
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gate
capacitors
thin film
film transistor
tfts
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KR1019980045435A
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Korean (ko)
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이경하
조상권
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김영환
현대전자산업 주식회사
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Priority to KR1019980045435A priority Critical patent/KR20000027490A/en
Publication of KR20000027490A publication Critical patent/KR20000027490A/en

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136213—Storage capacitors associated with the pixel electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G09G3/3655—Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)

Abstract

PURPOSE: A TFT LCD is provided to improve a display characteristic by installing an auxiliary capacitor for a pulse stabilization to an input terminal to prevent a color change occurred in an input unit. CONSTITUTION: Gate lines(10-1,10-2,10-3) and data lines(20-1,20-2) are arranged as a matrix shape. TFTs(T11,T12,T21,T22,T31,T32) are connected to cross points of gate lines(10-1,10-2,10-3) and data lines(20-1,20-2). Gates of TFTs(T11,T12,T21,T22,T31,T32) are connected to gate lines(10-1,10-2,10-3). Drains of TFTs(T11,T12,T21,T22,T31,T32) are connected to data lines(20-1,20-2). Sources of TFTs(T11,T12,T21,T22,T31,T32) are connected to first capacitors(CLC11,CLC12,CLC21,CLC22,CLC31,CLC32) and second capacitors(Cs11,Cs12,Cs21,Cs22,Cs31,Cs32). Third capacitors(C1,C2,C3) for a pulse stabilization are formed to gate input terminals of TFTs(T11,T21,T31) connected to a first data line. One side electrodes of third capacitors(C1,C2,C3) are connected to gate lines(10-1,10-2,10-3). The other side electrodes of third capacitors(C1,C2,C3) are connected to a ground line(GND).

Description

박막 트랜지스터 액정표시소자Thin film transistor liquid crystal display device

본 발명은 액정 표시 소자에 관한 것으로, 특히 구동펄스의 가변 변위폭을 안정화시킬 수 있는 박막 트랜지스터 액정표시소자에 관한 것이다.The present invention relates to a liquid crystal display device, and more particularly, to a thin film transistor liquid crystal display device capable of stabilizing a variable displacement width of a driving pulse.

도 1은 일반적인 박막 트랜지스터-액정 표시(Thin Film Transistor-Liquid Crystal Display; 박막 트랜지스터 액정표시소자)의 등가회로도이다. 도 1에 도시된 바와 같이, 박막 트랜지스터 액정표시소자는 매트릭스 형태로 배열된 게이트 라인(10-1, 10-2) 및 데이터 라인(20-1, 20-2)과, 게이트 라인(10-1, 10-2)과 데이터 라인(20-1, 20-2)의 교차부분에 각각 연결된 TFT(T11, T12)를 포함한다. TFT(T11, T12)는 그의 게이트가 게이트 라인(10-1, 10-2)에 연결되고, 그의 드레인이 데이터 라인(20-1, 20-2)에 연결되고, 그의 소오스에는 상하판 전극 사이의 액정의 존재로 인해 형성된 제 1 캐패시터(CLC11, CLC12) 및 보조 캐패시터인 제 2 캐패시터(CS11, CS12)가 연결된다.1 is an equivalent circuit diagram of a typical thin film transistor-liquid crystal display (thin film transistor liquid crystal display device). As shown in FIG. 1, the thin film transistor liquid crystal display includes gate lines 10-1 and 10-2 and data lines 20-1 and 20-2 and gate lines 10-1 arranged in a matrix. 10-2) and TFTs T 11 and T 12 connected to intersections of the data lines 20-1 and 20-2, respectively. The TFTs T 11 and T 12 have their gates connected to the gate lines 10-1 and 10-2, their drains are connected to the data lines 20-1 and 20-2, and their sources are provided with upper and lower plates. The first capacitors C LC11 and C LC12 formed due to the presence of the liquid crystal between the electrodes and the second capacitors C S11 and C S12 , which are auxiliary capacitors, are connected.

상기한 박막 트랜지스터 액정표시소자는 게이트 라인(10-1, 10-2)에 구동 드라이버(미도시)에서 발생된 게이트 구동펄스(GP)가 인가되면, TFT(T11, T12)가 턴온되고 데이터 라인(20-1, 20-2)에 인가되는 화상에 관한 정보를 가지는 데이터 신호가 이 시간 동안에 TFT(T11, T12)를 통과하여 액정에 인가된다.In the thin film transistor liquid crystal display, when the gate driving pulse GP generated by the driving driver (not shown) is applied to the gate lines 10-1 and 10-2, the TFTs T 11 and T 12 are turned on. A data signal having information about the image applied to the data lines 20-1 and 20-2 is applied to the liquid crystal through the TFTs T 11 and T 12 during this time.

그러나, 상기한 바와 같은 종래의 박막 트랜지스터 액정표시소자를 구동하는데 있어서, 급작스런 게이트 구동펄스의 순간적인 전위폭으로 정확한 계조 표시가 어려운 문제가 있었다. 이에 따라, 구동 드라이버로부터 인가되는 게이트 구동펄스를 받는 첫 번째 TFT(T11)는 펄스의 변위폭이 크기 때문에 LCD의 신호 입력부에서 색상 변화가 야기된다. 이를 해결하기 위하여, 구동 드라이버 부분에 임의의 추가회로를 장착하는 방법이 제시되었으나, 상기한 바와 같은 문제를 완전히 해결하기가 어려웠다.However, in driving the conventional thin film transistor liquid crystal display device as described above, there is a problem that accurate gradation display is difficult due to the instantaneous potential width of the sudden gate driving pulse. Accordingly, the first TFT T 11 receiving the gate driving pulse applied from the driving driver causes a change in color at the signal input part of the LCD because the displacement width of the pulse is large. In order to solve this problem, a method of mounting an arbitrary additional circuit in the driving driver portion has been proposed, but it has been difficult to completely solve the above problems.

따라서, 본 발명은 상기한 종래의 문제점을 해결하기 위한 것으로서, 구동펄스의 가변 변이폭을 안정화시킴으로써 입력부의 색상변화를 방지할 수 있는 박막 트랜지스터 액정표시소자를 제공함에 그 목적이 있다.Accordingly, an object of the present invention is to provide a thin film transistor liquid crystal display device capable of preventing color change of an input unit by stabilizing a variable variation width of a driving pulse.

도 1은 종래의 박막 트랜지스터 액정표시소자의 등가회로도.1 is an equivalent circuit diagram of a conventional thin film transistor liquid crystal display device.

도 2는 본 발명의 실시예에 따른 박막 트랜지스터 액정표시소자의 등가회로도.2 is an equivalent circuit diagram of a thin film transistor liquid crystal display device according to an embodiment of the present invention.

〔도면의 주요 부분에 대한 부호의 설명〕[Description of Code for Major Parts of Drawing]

10-1, 10-2, 10-3 : 게이트 라인10-1, 10-2, 10-3: gate line

20-1, 20-2 : 데이터 라인20-1, 20-2: data line

T11, T12, T21, T22, T31, T32: TFTT 11 , T 12 , T 21 , T 22 , T 31 , T 32 : TFT

CLC11, CLC12, CLC21, CLC22, CLC31, CLC32: 제 1 캐패시터C LC11 , C LC12 , C LC21 , C LC22 , C LC31 , C LC32 : First Capacitor

CS11, CS12, CS21, CS22, CS31, CS32: 제 2 캐패시터C S11 , C S12 , C S21 , C S22 , C S31 , C S32 : Second Capacitor

C1, C2, C3: 제 3 캐패시터C 1 , C 2 , C 3 : third capacitor

상기 목적을 달성하기 위한 본 발명에 따른 박막 트랜지스터 액정표시소자는 매트릭스 형태로 배열된 게이트 및 데이터 라인과, 게이트 및 데이터 라인의 교차부분에 배열되고, 그의 게이트가 게이트 라인에 각각 연결되고, 그의 드레인이 데이터 라인에 각각 연결됨과 동시에 그의 소오스에 제 1 및 제 2 캐패시터가 연결된 박막 트랜지스터와, 데이터 라인 중 첫 번째 데이터 라인에 연결된 박막 트랜지스터의 게이트 입력단에 게이트 구동펄스를 안정화시키기 위한 펄스 안정화용 제 3 캐패시터를 포함한다.A thin film transistor liquid crystal display device according to the present invention for achieving the above object is arranged at the intersection of the gate and the data line, the gate and the data line arranged in a matrix form, the gate thereof is connected to the gate line, respectively, the drain thereof A third thin film transistor connected to the data line and simultaneously connected to the first and second capacitors thereof, and a third pulse stabilization pulse for stabilizing a gate driving pulse at a gate input terminal of the thin film transistor connected to the first data line of the data line. It includes a capacitor.

본 실시예에서, 제 3 캐패시터의 일측 전극은 게이트 라인과 연결되고, 다른측 전극은 접지되고, 제 3 캐패시터는 박막 트랜지스터와 연결된 제 1 및 제 2 캐패시터의 정전용량의 1 내지 1/100 배 정도의 정전용량을 갖는 것을 특징으로 한다.In this embodiment, one electrode of the third capacitor is connected to the gate line, the other electrode is grounded, and the third capacitor is about 1 to 1/100 times the capacitance of the first and second capacitors connected to the thin film transistor. It characterized by having a capacitance of.

이하, 첨부된 도면을 참조하여 본 발명의 실시예를 설명한다.Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention.

도 2는 본 발명의 실시예에 따른 박막 트랜지스터 액정표시소자의 등가회로도로서, 도 1에서와 동일한 구성요소에 대해서는 동일한 도면부호를 부여한다.FIG. 2 is an equivalent circuit diagram of a thin film transistor liquid crystal display device according to an exemplary embodiment of the present invention, and the same components as in FIG. 1 are denoted by the same reference numerals.

도 2에 도시된 바와 같이, 매트릭스 형태로 배열된 게이트 라인(10-1, 10-2, 10-3) 및 데이터 라인(20-1, 20-2)과, 게이트 라인(10-1, 10-2, 10-3)과 데이터 라인(20-1, 20-2)의 교차부분에 각각 연결된 TFT(T11, T12, T21, T22, T31, T32)를 포함한다. TFT(T11, T12, T21, T22, T31, T32)는 그의 게이트가 게이트 라인(10-1, 10-2, 10-3)에 각각 연결되고, 그의 드레인이 데이터 라인(20-1, 20-2)에 각각 연결되고, 그의 소오스에는 상하판 전극 사이의 액정의 존재로 인해 형성된 제 1 캐패시터(CLC11, CLC12, CLC21, CLC22, CLC31, CLC32) 및 보조 캐패시터인 제 2 캐패시터(CS11, CS12, CS21, CS22, CS31, CS32)가 연결된다.As shown in FIG. 2, the gate lines 10-1, 10-2, 10-3 and data lines 20-1, 20-2 arranged in a matrix form, and the gate lines 10-1, 10 are shown. TFTs (T 11 , T 12 , T 21 , T 22 , T 31 , and T 32 ) connected to intersections of the -2 and 10-3 and the data lines 20-1 and 20-2, respectively. The TFTs T 11 , T 12 , T 21 , T 22 , T 31 , and T 32 have their gates connected to the gate lines 10-1, 10-2, and 10-3, respectively, and their drains have data lines ( 20-1 and 20-2, respectively, having a first capacitor C LC11 , C LC12 , C LC21 , C LC22 , C LC31 , C LC32 formed in the source thereof due to the presence of liquid crystal between the upper and lower electrodes; Second capacitors C S11 , C S12 , C S21 , C S22 , C S31 and C S32 , which are auxiliary capacitors, are connected.

또한, 본 발명에서는 박막 트랜지스터 액정표시소자의 첫 번째 데이터 라인에 연결된 TFT(T11, T21, T31)의 게이트 입력단에는 게이트 구동펄스를 안정화시키기 위한 펄스 안정화용 제 3 캐패시터(C1, C2, C3)를 구비한다. 제 3 캐패시터(C1, C2, C3)의 일측 전극은 게이트 라인(10-1, 10-2, 10-3)과 연결되고, 다른 측 전극은 접지라인(GND)과 연결되어 접지된다. 여기서, 제 3 캐패시터(C1, C2, C3)는 각각의 TFT(T11, T12, T21, T22, T31, T32)와 연결된 캐패시터의 정전용량의 1 내지 1/100배 정도의 정전용량을 갖도록 하고, 제 3 캐패시터(C1, C2, C3)의 유전체는 SiOx, SiNx, SiONx, 및 TEOS로 이루어진 그룹에서 선택되는 하나의 물질을 이용한다.Further, in the present invention, the third capacitor (C 1 , C) for pulse stabilization for stabilizing the gate driving pulse at the gate input terminal of the TFT (T 11 , T 21 , T 31 ) connected to the first data line of the thin film transistor liquid crystal display device. 2 , C 3 ). One electrode of the third capacitors C 1 , C 2 , and C 3 is connected to the gate lines 10-1, 10-2, and 10-3, and the other side electrode is connected to the ground line GND and grounded. . Here, the third capacitors C 1 , C 2 , and C 3 are 1 to 1/100 of the capacitance of the capacitor connected to each of the TFTs T 11 , T 12 , T 21 , T 22 , T 31 , and T 32 . To have a capacitance of about twice, the dielectric of the third capacitor (C 1 , C 2 , C 3 ) uses one material selected from the group consisting of SiOx, SiNx, SiONx, and TEOS.

즉, 박막 트랜지스터 액정표시소자의 입력단에 제 3 캐패시터(C1, C2, C3)를 구비함으로써, 예컨대 도 2에 도시된 바와 같이, 순간적인 전위폭에 의해 게이트 구동펄스의 끝이 왜곡되어 입력되더락도, 제 3 캐패시터에 의해 게이트 구동펄스가 안정화되어 게이트 라인(10-1, 10-2, 10-3)으로 입력된다.That is, by providing the third capacitors C 1 , C 2 , and C 3 at the input terminal of the thin film transistor liquid crystal display device, for example, as shown in FIG. 2, the end of the gate driving pulse is distorted by the instantaneous potential width. Even when inputted, the gate driving pulse is stabilized by the third capacitor and input to the gate lines 10-1, 10-2, and 10-3.

상기한 본 발명에 의하면, 박막 트랜지스터 액정표시소자의 입력단에 펄스 안정화용 보조 캐패시터를 구비함에 따라, 순간적인 전위폭으로 왜곡 및 점프된 게이트 구동펄스가 안정화되므로, 박막 트랜지스터 액정표시소자의 입력부에서 발생되는 색상변화가 방지됨으로써, 결국 박막 트랜지스터 액정표시소자의 표시특성이 향상된다.According to the present invention described above, as the auxiliary capacitor for stabilizing the pulse is provided at the input terminal of the thin film transistor liquid crystal display device, the gate driving pulse that has been distorted and jumped in the instantaneous potential width is stabilized, so that it occurs at the input part of the thin film transistor liquid crystal display device. By preventing the color change, the display characteristics of the thin film transistor liquid crystal display device are improved.

또한, 본 발명은 상기 실시예에 한정되지 않고, 본 발명의 기술적 요지를 벗어나지 않는 범위내에서 다양하게 변형시켜 실시할 수 있다.In addition, this invention is not limited to the said Example, It can variously deform and implement within the range which does not deviate from the technical summary of this invention.

Claims (4)

매트릭스 형태로 배열된 게이트 및 데이터 라인과,Gate and data lines arranged in a matrix, 상기 게이트 및 데이터 라인의 교차부분에 배열되고, 그의 게이트가 상기 게이트 라인에 각각 연결되고, 그의 드레인이 상기 데이터 라인에 각각 연결됨과 동시에 그의 소오스에 제 1 및 제 2 캐패시터가 연결된 박막 트랜지스터, 및A thin film transistor arranged at an intersection of the gate and the data line, the gate of which is connected to the gate line, the drain of which is respectively connected to the data line, and the first and second capacitors connected to the source thereof, and 상기 데이터 라인 중 첫 번째 데이터 라인에 연결된 박막 트랜지스터의 상기 게이트 입력단에 게이트 구동펄스를 안정화시키기 위한 펄스 안정화용 제 3 캐패시터를 포함하는 것을 특징으로 하는 박막 트랜지스터 액정표시소자.And a third capacitor for stabilizing a gate driving pulse at the gate input terminal of the thin film transistor connected to a first data line of the data lines. 제 1 항에 있어서, 상기 제 3 캐패시터의 일측 전극은 상기 게이트 라인과 연결되고, 다른측 전극은 접지된 것을 특징으로 하는 박막 트랜지스터 액정표시소자.The thin film transistor liquid crystal display of claim 1, wherein one electrode of the third capacitor is connected to the gate line, and the other electrode is grounded. 제 1 항 또는 제 2 항에 있어서, 상기 제 3 캐패시터는 상기 박막 트랜지스터의 제 1 및 제 2 캐패시터의 정전용량의 1 내지 1/100 배 정도의 정전용량을 갖는 것을 특징으로 하는 박막 트랜지스터 액정표시소자.The thin film transistor liquid crystal display device of claim 1, wherein the third capacitor has a capacitance of about 1 to 1/100 times the capacitance of the first and second capacitors of the thin film transistor. . 제 3 항에 있어서, 상기 제 3 캐패시터의 유전체는 SiOx, SiNx, SiONx, 및 TEOS로 이루어진 그룹에서 선택되는 하나의 물질로 이루어진 것을 특징으로 하는 박막 트랜지스터 액정표시소자.4. The liquid crystal display device of claim 3, wherein the dielectric of the third capacitor is made of one material selected from the group consisting of SiOx, SiNx, SiONx, and TEOS.
KR1019980045435A 1998-10-28 1998-10-28 Tft lcd KR20000027490A (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05281517A (en) * 1992-01-31 1993-10-29 Canon Inc Active matrix liquid crystal light valve
KR19980085694A (en) * 1997-05-30 1998-12-05 윤종용 Method and device for removing initial noise screen of LCD power supply
KR20000015314A (en) * 1998-08-28 2000-03-15 윤종용 Tft gate on voltage output circuit and driving apparatus of a lcd having the circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05281517A (en) * 1992-01-31 1993-10-29 Canon Inc Active matrix liquid crystal light valve
KR19980085694A (en) * 1997-05-30 1998-12-05 윤종용 Method and device for removing initial noise screen of LCD power supply
KR20000015314A (en) * 1998-08-28 2000-03-15 윤종용 Tft gate on voltage output circuit and driving apparatus of a lcd having the circuit

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