KR20000020798U - Wafer position determining pin for a wafer holder - Google Patents
Wafer position determining pin for a wafer holder Download PDFInfo
- Publication number
- KR20000020798U KR20000020798U KR2019990008196U KR19990008196U KR20000020798U KR 20000020798 U KR20000020798 U KR 20000020798U KR 2019990008196 U KR2019990008196 U KR 2019990008196U KR 19990008196 U KR19990008196 U KR 19990008196U KR 20000020798 U KR20000020798 U KR 20000020798U
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- wafer
- positioning pin
- holder
- wafer holder
- stopper
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- 230000000694 effects Effects 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 3
- 230000003595 spectral effect Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
본 고안은 웨이퍼 홀더용 웨이퍼 위치결정핀에 관한 것으로, 웨이퍼(12)의 주면단부와 맞닿는 원통부(42)와 상기 원통부(42)위에 일체로 형성된 스토퍼(44)로 구성되어, 재현성이 없는 웨이퍼 공급장치로부터 웨이퍼(12)가 공급된다 하더라도 종래의 웨이퍼 위치결정핀(30)에 비해 자연스럽게 웨이퍼(12)가 스토퍼(44)의 경사를 따라 미끄러져 흘러내려서 웨이퍼 홀더(20)에 정확하게 위치되므로, 장비의 가동시간을 절약할 수 있는 효과를 가진다.The present invention relates to a wafer positioning pin for a wafer holder, comprising a cylindrical portion 42 abutting the main surface end of the wafer 12 and a stopper 44 integrally formed on the cylindrical portion 42, and having no reproducibility. Although the wafer 12 is supplied from the wafer supply device, the wafer 12 naturally slides along the inclination of the stopper 44 to be accurately positioned in the wafer holder 20, compared to the conventional wafer positioning pin 30. This has the effect of saving the uptime of the equipment.
Description
본 고안은 웨이퍼 홀더의 웨이퍼 위치결정핀에 관한 것으로, 보다 상세하게는 웨이퍼를 웨이퍼 홀더에 정확하게 위치할 수 있는 웨이퍼 홀더의 웨이퍼 위치결정핀에 관한 것이다.The present invention relates to a wafer positioning pin of a wafer holder, and more particularly to a wafer positioning pin of a wafer holder that can accurately position the wafer in the wafer holder.
잘 알려진 바와 같이, 반도체 소자를 제조하기 위한 공정중에서, 적층식으로 회로를 형성시켜 나가는 각각의 적층 스텝을 레이어(layer)라 하며, 이러한 레이어별로 필요한 패턴(pattern)을 형성하기 위한 마스크(mask)또는 레티클(reticle)의 패턴을 웨이퍼위에 전사하는 공정을 포토리소그래피(photolithography) 공정이라 하고, 이러한 포토 공정을 수회 내지 수십회 반복함으로서 반도체 소자의 회로가 완성된다.As is well known, in the process for manufacturing a semiconductor device, each stacking step for forming a circuit in a stacked manner is called a layer, and a mask for forming a pattern required for each layer is referred to as a layer. Alternatively, the process of transferring the pattern of the reticle onto the wafer is called a photolithography process, and the circuit of the semiconductor device is completed by repeating the photo process several times to several tens of times.
이러한 노광공정에 사용되는 장비로서의 스테퍼(stepper)가 도 1에 개략적으로 도시되어 있다. 초고압의 할로겐 램프를 광원(도시하지 않음)으로부터의 광이 스펙트럼 분광기(2)에 의해 조도의 세기가 큰 파장을 선택적으로 투과하여 이 빛을 반사경(4), 렌즈 집광기를 거쳐 패턴 마스크로서의 레티클(reticle)(6)을 통과한다. 선택적으로 투과된 빛은 리덕션 렌즈(reduction lens)(8)를 통과하면서 5:1로 패턴이 축소되어, X-Y 스테이지부(10)상의 웨이퍼(12)에 조사되어 노광이 실행된다. X-Y 스테이지부(10)는 1회의 노광 즉, 1 샷마다 웨이퍼를 X축 및 Y축 방향으로 고속으로 이동시키는 동작을 반복하여 웨이퍼(12)를 정확한 위치로 이동시키는 것으로, 상면에 위치되는 웨이퍼(12)는 웨이퍼 홀더(20)에 흡착고정된다.A stepper as equipment used in such an exposure process is schematically shown in FIG. The light from a light source (not shown) of the ultra-high pressure halogen lamp is selectively transmitted by the spectral spectrometer 2 to a wavelength having a large intensity of illuminance, and the light is passed through a reflector 4 and a lens condenser to form a reticle as a pattern mask ( reticle) (6). The selectively transmitted light passes through a reduction lens 8 and the pattern is reduced to 5: 1, irradiated onto the wafer 12 on the X-Y stage portion 10, and exposure is performed. The XY stage unit 10 moves the wafer 12 to the correct position by repeating the operation of moving the wafer at high speed in the X-axis and Y-axis directions every single exposure, that is, each shot (the wafer positioned on the upper surface) ( 12 is fixed to the wafer holder 20 by suction.
웨이퍼(12)는 도 2에 도시된 바와 같이, 웨이퍼 공급장치(도시하지 않음)에 의해 웨이퍼 홀더(20)에 공급되면, 노치 햄머(notch hammer)(22)가 웨이퍼(12)의 노치부(24)를 웨이퍼 홀더(20)의 외주면상에 일정간격으로 고정나사(26)에 의해 고정된 한쌍의 웨이퍼 위치결정핀(30)의 위치로 밀어주므로서, 정확하게 위치된다.When the wafer 12 is supplied to the wafer holder 20 by a wafer supply device (not shown), as shown in FIG. 2, a notch hammer 22 is formed in the notch portion of the wafer 12. It is precisely positioned by pushing 24 to the position of the pair of wafer positioning pins 30 fixed by the set screws 26 at fixed intervals on the outer circumferential surface of the wafer holder 20.
그런데, 웨이퍼 공급장치로부터 불량하게 웨이퍼(12)가 공급되면, 도 3에 도시된 바와 같이, 웨이퍼 위치결정핀(30)위로 올라가게 되어 웨이퍼(12)에 악영향을 미치게되며, 결국 장비에도 장애를 일으키게 되는 문제가 있다.However, when the wafer 12 is poorly supplied from the wafer supply device, as shown in FIG. 3, the wafer 12 is lifted onto the wafer positioning pin 30, which adversely affects the wafer 12, and eventually causes a failure in the equipment. There is a problem that arises.
따라서, 본 고안은 이에 따라 안출된 것으로, 그 목적은 웨이퍼의 주변단부와 맞닿는 웨이퍼 위치결정핀의 측면형상을 경사지게 형성함으로서 위치결정핀에 웨이퍼가 올라타는 현상을 방지하고, 웨이퍼를 웨이퍼 홀더에 정확하게 위치시킬 수 있는 웨이퍼 홀더용 웨이퍼 위치결정핀을 제공하는 것이다.Therefore, the present invention has been devised accordingly, and its purpose is to form the side surface of the wafer positioning pin in contact with the peripheral end of the wafer to be inclined, thereby preventing the wafer from rising on the positioning pin, and accurately placing the wafer on the wafer holder. To provide a wafer positioning pin for a wafer holder that can be positioned.
이러한 목적을 달성하기 위한 수단으로서, 본 고안의 웨이퍼 홀더용 웨이퍼 위치결정핀은 웨이퍼의 주면단부와 맞닿는 원통부와 상기 원통부위에 일체로 형성된 스토퍼로 구성되어, 웨이퍼가 상기 스토퍼에 놓이더라도 그 경사면을 따라 흘러내려가서 웨이퍼 홀더에 정확하게 위치되는 것을 특징으로 한다.As a means for achieving the above object, the wafer positioning pin for wafer holder of the present invention is composed of a cylindrical portion in contact with the main surface end of the wafer and a stopper integrally formed on the cylindrical portion, so that the inclined surface of the wafer holder is placed on the stopper. It flows down along and is characterized in that it is correctly positioned in the wafer holder.
이와 같은 본 고안의 위치결정핀에 따르면, 웨이퍼가 위치결정핀상에 놓이는 것이 방지되므로, 웨이퍼를 웨이퍼 홀더에 정확하게 위치시킬 수 있는 효과를 가진다.According to the positioning pin of the present invention, since the wafer is prevented from being placed on the positioning pin, the wafer can be accurately positioned in the wafer holder.
도 1은 반도체 노광장치를 설명하기 위한 개략도이고,1 is a schematic view for explaining a semiconductor exposure apparatus;
도 2는 도 1의 웨이퍼 홀더에서 웨이퍼의 위치를 결정하는 종래의 방법을 설명하기 위한 평면도이고,FIG. 2 is a plan view illustrating a conventional method of determining a position of a wafer in the wafer holder of FIG. 1;
도 3은 도 2의 단면을 나타내는 것으로, 웨이퍼가 위치결정핀에 올라탄 상태를 나타내는 일부 개략상태도이고,3 is a cross-sectional view of FIG. 2, which is a schematic view showing a state where a wafer is placed on a positioning pin;
도 4는 본 고안의 바람직한 일 실시예에 따른 웨이퍼 홀더용 웨이퍼 위치결정핀을 나타내는 일부 개략상태도이다.4 is a partial schematic view showing a wafer positioning pin for a wafer holder according to an embodiment of the present invention.
＜도면의 주요부분에 대한 부호의 설명＞<Description of the code | symbol about the principal part of drawing>
2 : 스펙트럼 분광기 4 : 반사경2: spectral spectrometer 4: reflector
6 : 레티클 8 : 리덕션 렌즈6: reticle 8: reduction lens
10 : X-Y 스테이지부 12 : 웨이퍼10: X-Y stage portion 12: wafer
20 : 웨이퍼 홀더 22 : 노치 햄머20: wafer holder 22: notch hammer
24 : 노치부 26 : 고정나사24: notch 26: fixing screw
30 : 위치결정핀 40 : 본 고안 위치결정핀30: positioning pin 40: the present invention positioning pin
42 : 원통부 44 : 스토퍼42: cylinder 44: stopper
이하, 첨부된 도면을 참조로 하여 본 고안의 일실시예에 따른 웨이퍼 홀더용 위치결정핀을 상세히 설명한다.Hereinafter, a positioning pin for a wafer holder according to an embodiment of the present invention with reference to the accompanying drawings will be described in detail.
도 4는 본 고안의 일실시예에 따른 웨이퍼 홀더용 위치결정핀을 도시하는 것으로, 종래와 동일한 구성에는 동일한 참조번호를 사용하였다. 도 4에 도시된 바와 같이, 본 고안의 웨이퍼 홀더용 위치결정핀(40)는 웨이퍼(12)의 주면단부와 맞닿는 원통부(42)와 상기 원통부(42)위에 일체로 형성된 스토퍼(44)로 구성된다. 이때 원통부(42)는 웨이퍼(12)의 두께보다 더 높은 것이 바람직하고, 스토퍼(44)의 경사는 웨이퍼(12)가 자연스럽게 미끄러질 수 있는 정도면 충분하다.Figure 4 illustrates a wafer holder positioning pin according to an embodiment of the present invention, the same reference numerals are used for the same configuration as the prior art. As shown in FIG. 4, the positioning pin 40 for the wafer holder according to the present invention has a cylindrical portion 42 which abuts against the main surface end of the wafer 12 and a stopper 44 integrally formed on the cylindrical portion 42. It consists of. At this time, the cylindrical portion 42 is preferably higher than the thickness of the wafer 12, the inclination of the stopper 44 is enough that the wafer 12 can naturally slide.
이러한 본 고안은 웨이퍼(12)가 웨이퍼 공급장치(도시하지 않음)에 의해 웨이퍼 홀더(20)에 불량하게 공급되어, 노치 햄머(notch hammer)(22)가 웨이퍼(12)의 노치부(24)를 본 고안의 위치결정핀(40)의 위치를 향하여 밀으므로서, 웨이퍼(12)가 본 고안의 웨이퍼 위치결정핀(40)의 스토퍼(44)위로 올라가게 된다 하더라도, 스토퍼(44)의 경사에 의해 그 경사면을 따라 흘러내려가서 웨이퍼 홀더(20)에 정확하게 위치된다.This invention devises that the wafer 12 is poorly supplied to the wafer holder 20 by a wafer supply device (not shown), so that the notch hammer 22 notches 24 of the wafer 12. Is pushed toward the position of the positioning pin 40 of the present invention, even if the wafer 12 is raised above the stopper 44 of the wafer positioning pin 40 of the present invention, the inclination of the stopper 44 It flows down along the inclined surface and is accurately positioned in the wafer holder 20.
이와 같은 본 고안의 웨이퍼 홀더용 웨이퍼 위치결정핀은 그 형상이 원통부와 그 상부에 일체로 형성된 원추형으로 구성되어 있지만, 본 고안이 이에 한정되는 것은 아니며, 예를 들어 도시하지는 않았지만, 구형으로 형성되어 웨이퍼가 곡면을 따라 흘러내려서 웨이퍼 홀더에 정확하게 위치될 수 있는 형상이면 충분한 것이므로, 여러모양으로 변형가능함은 물론이다.The wafer positioning pin for wafer holder of the present invention is formed in a cylindrical shape and a cone formed integrally thereon, but the present invention is not limited thereto, but is not shown, for example, but formed in a spherical shape. It is sufficient that the shape that the wafer flows along the curved surface and can be accurately positioned in the wafer holder, so that it can be deformed in various shapes.
상술한 바와 같이 본 고안의 웨이퍼 홀더용 웨이퍼 위치결정핀은 재현성이 없는 웨이퍼 공급장치로부터 웨이퍼가 공급된다 하더라도 종래의 웨이퍼 위치결정핀에 비해 자연스럽게 웨이퍼가 미끄러져 흘러내려서 웨이퍼 홀더에 정확하게 위치되므로, 장비의 가동시간을 절약할 수 있는 효과를 가진다.As described above, the wafer positioning pin for the wafer holder of the present invention, even if the wafer is supplied from a non-reproducible wafer supply device, because the wafer naturally slips and flows down accurately compared to the conventional wafer positioning pin, the equipment is accurately positioned in the wafer holder. It has the effect of saving uptime.
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019990008196U KR20000020798U (en) | 1999-05-14 | 1999-05-14 | Wafer position determining pin for a wafer holder |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019990008196U KR20000020798U (en) | 1999-05-14 | 1999-05-14 | Wafer position determining pin for a wafer holder |
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| KR20000020798U true KR20000020798U (en) | 2000-12-15 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20190041155A (en) | 2017-10-12 | 2019-04-22 | 세메스 주식회사 | substrate alignment apparatus, substrate treating apparatus and substrate treating method |
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1999
- 1999-05-14 KR KR2019990008196U patent/KR20000020798U/en not_active Application Discontinuation
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20190041155A (en) | 2017-10-12 | 2019-04-22 | 세메스 주식회사 | substrate alignment apparatus, substrate treating apparatus and substrate treating method |
| US10930538B2 (en) | 2017-10-12 | 2021-02-23 | Semes Co., Ltd. | Substrate alignment apparatus, substrate processing apparatus, and substrate processing method |
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