KR20000016819A - Data transmission - Google Patents

Abstract

PURPOSE: A system is provided for the transmission of data representing a video image and for transmission over an analogue transmission link. CONSTITUTION: A transmitter having means to encode an input signal to form coded data, each element of said coded data having one of at least two discrete signal magnitude levels, the encoding means including in the coded data a periodic training sequence of data; and a receiver to receive the coded data and, on the basis of the received training sequence, to adapt a threshold or thresholds to allow the discrete levels to be distinguishable from each other are comprised. The receiver is continually allowed to adapt the threshold(s) in dependence on the dynamic conditions of the transmission link between the transmitter and receiver. The training sequence comprises at least two elements, the receiver including means to monitor the effect of at least one of the elements of the training sequence on another of said elements of the training sequence and adapt the threshold(s) accordingly. The receiver generates a look-up-table to store the adapted thresholds.

Description

Data transmission system

The present invention relates to data transmission, and more particularly to data transmission in which a multi-level representation of a digital signal is transmitted.

Digital data is represented by signals quantized in time and amplitude. This digital data approaches the actual value of the analog signal. If the analog signal is digitized, the range of the analog signal is divided into a number of levels (e.g. 16 levels), and the analog signal is sampled at set intervals and then the appropriate level is determined. Since only 16 levels are used, the level closest to the actual level is selected. The signal reconstructed from this digital data has something in common with the original analog signal but is not exactly the same.

In binary digital data. The signal is represented by 0 and 1, where 0 is 0V pulse and 1 is 5V pulse. If the sample of the input signal has an amplitude greater than half of the maximum range, the signal sample is indicated as one. Zero is indicated in samples with an amplitude less than half of the maximum range. This produces a series of zeros and ones.

In order to reproduce the original signal, the receiver needs to know the threshold between the two levels. Usually this is done by a transmitter that signals the maximum range of signals, the number of levels, and the spacing of the levels linearly to the receiver. The receiver then determines the threshold and decodes the input signal. In particular, in a multi-level system, the signal is distorted due to the response of the network, ie overshooted and ringed. The instantaneous level of any received sample depends not only on the sample being transmitted but also on the previously transmitted sample and the sample to be transmitted later.

According to the invention, a data transmission system comprises a transmitter having means for encoding an input signal to form coded data, each element of said coded data having at least one of two discrete signal magnitude levels, and a period of data. Encoding means for including the specific training sequence in the coded data and a receiver for applying the threshold and receiving the coded data so that the discrete levels can be distinguished based on the received training order.

This system allows the receiver to continuously apply thresholds that depend on the dynamic state of the transmission link between the transmitter and the receiver.

Preferably the training sequence comprises at least two elements and the receiver comprises means for monitoring the results of at least one element of the training sequence different from the elements of the training sequence and applying a threshold.

This describes the effect of the transmission link on a group of elements.

The invention also relates to a transmitter and a receiver.

The present invention will be described with reference to the accompanying drawings.

1 shows a data transmission system according to the invention;

FIG. 2 shows an example of a line format of coded video data to be transmitted by the data transmission system of FIG. 1;

3 shows a transmitter according to the invention;

4 shows a receiver according to the invention;

5 shows an example of the contents of a buffer after 11 lines of training sequences have been received;

FIG. 6 shows an example of a set of thresholds generated from the contents of the buffer shown in FIG. 5;

FIG. 7 shows an example of a look-up-table generated from the threshold of FIG. 6.

As shown in FIG. 1, a digital data transmission system includes a transmitter 20, a receiver 30, and a communication link 40. Data is transmitted from the transmitter 20 to the receiver 30 via a communication link 40 which can be delivered in any suitable format. For example, the communication link 40 may be part of a public switched telephone network (PSTN), integrated services digital network (ISDN), radio link, coaxial cable, optical fiber, or the like.

To illustrate the purpose, the described data transmission system relates to the transmission of data representing a video image. However, the present invention is applicable to any system and transmits multi-level digital data, and more particularly relates to the transmission of analog transmission links such as cable modems or high bit rate teletext services.

The data transmission system described is suitable for supplying digital television signals to users via analog hybrid fiber coaxial networks. In order to use the facilities of an existing analog network, digital signals must be able to be transmitted through the existing network in the same way as ordinary TV channels.

So digital signals apply a similar bandwidth to regular TV channels (6-7MHz). It also looks like a TV signal by amplitude and has a regular 'line' sync pulse at 15.625 kHz, like any dc recovery in a network that depends on it. At the noise rate, the signal is around 50dB and to overcome this nonlinearity such as differential gain error or sync pulse clipping.

In order to achieve significant capacity improvements over analog, there is a desire for sufficient digital capacity to carry in four multiplexed MPEG video streams of receivable nature.

The present invention uses multi-level coding, where serial digital data is divided into n bits of symbols. Each symbol is a discrete level in the active video area 2 ⁿ Is encoded as one of

Set the signal rate so that the minimum pulse width that is hit is 6.75 MHz. 1 / 6.75 × 10 ⁶ We choose this to be 148ns. This passes through the bandwidth of the system without too much degradation. Given a system signal at a noise ratio, one can expect eight different levels to be recovered by giving three bits per symbol (ie n = 3).

Experience has shown that not all clamps and dc restorers in the system are really needed to maintain any frame timing by simply using line tuning and black levels. This means that frame timing can be omitted and a continuous flow of active 'lines' is used. This increases data throughput and simplifies the design of the transmitter or receiver.

By selecting the 27 MHz main clock rate, a ready-to-use TV sampling clock recovery chip can be used to provide clocks with clocked locks at significantly lower jitter lines at the receiver. The signal can be oversampled at this rate to determine the best sampling position. Out-of-the-box video analog-to-digital converters (ADCs) can be used, as well as at significantly higher logic rates.

In Fig. 2 a diagram of the waveform being transmitted is shown. It consists of a tuning pulse 2 with a standard width and amplitude repeated at 15.625 kHz. This is preceded and continued respectively by the front porch 4 and the rear porch 6 to allow analog and readily available TV tuned pulse separators in the digital converters used.

After the rear porch 6 there is a start pulse S which is used by the receiver to determine the best sampling position. This is followed by five training sequences (T) and eight symbols, which step through the set sequence across multiple lines. The first of these symbols M is the marker that is allowed as the start of the training sequence to be determined. The function and exact nature of the training sequence will be described later.

At this time, a plurality of valid data symbols D are followed. Each is slightly 148ns wide and is represented by one of eight different levels, slightly 0.1V. The valid data may be split into blocks to allow the addition of blocks based on forward error corrector (FEC). One overhead in systems where FEC-based blocks are used is the hardware at the receiver that needs to add Fleming bits to define the block boundaries and can discover and automatically investigate Fleming. This design is not necessary because the data is already partitioned on the line where the block is further broken down.

The choice of the error collector block size and the total number of symbols per line depends on the required bit rate and the FEC's collecting power.

The proposed system uses BCH (Bose-Chaudhuri Hocquenghem) FEC and divides the line into 17 blocks of 63 bits. Each 63-bit block consists of 19 symbols of data (57 bits) and two symbols of check bits (6 bits), 21 3-bit symbols giving a payload bit rate of 57 × 17 × 15625 = 15.140625 Mbit / sec. It includes.

In order to have a 'round' bit rate, the last block has three symbols where data is not filled with ((57 × 17) -9) × 15625 = 15.00 MHz. This can be thought of as a moderate rate at which four MPEG encoded TV channels are multiplexed, giving the necessary amount per channel. The FEC can correct one bit in error for each block. To reduce the likelihood of multi-bit errors, the symbols are gray coded such that the adjacent levels represent bit patterns with only one bit difference.

In FIG. 3 an example of a transmitter 20 is shown. The transmitter 20 is dependent on the MPEG multiplexer clock or becomes the main clock provider. The phase locked loop (PLL) and clock oscillator 201 generate a clock locked at the 15 MHz data bit clock with a 6.75 MHz symbol. The input binary digital data is divided into 3-bit symbols by a serial-in-parallel-out (SIPO) shift register 202 and stored in a first in, first out (FIFO) buffer 204. FIFO 204 buffers the symbol and block structure between successive input data rates and the 'bursty' line. The symbol is read from the FIFO 204 and the BCH FEC check bit is added by the FEC encoder 206. At the start of each line, the tuning pulse, black level (ie, front porch and rear porch), start pulse S and training sequence are added by unit 207 under control of control block 208. The data is then gray coded and converted to an 8-bit representation before being represented in the digital-to-analogue conventer (DAC) 212. Any amount of pre-compensation can be added at this stage to help reduce overshoot in the network. This can effectively reduce the rise time of the edges in the signal. The analog output of the DAC 212 can then be transmitted over the network in the same way as a normal TV channel. An analog post filter can be added if necessary to band the signal's limit to fit the network.

In Fig. 4 a block diagram of the receiver 30 is shown. The tune separator 301 extracts the tune and black level pulses from the input signal. PLL and voltage-controlled crystal oscillator (VCXO) 302 generate a line with a 27 MHz clock locked.

The 8-bit ADC 303 digitizes the signal input in the 8-bit signal. ADC 303 has on-chip clamps and automatic gain control (AGC) using tuning and black level pulses. The effect of the AGC is to set the digital output at the black level (i.e. the level of the front and rear porches 4, 6) at the base and 63 of the tuning pulses 2 to 0. A nominal maximum level video input of 0.7V is then given at a level of 213. The AGC gain is calculated using the tuning pulse height, and any clipping of the tuning pulse by the transmission network is changed to this nominal maximum height. The ADC is clocked at 27MHz.

The logic 304 following the ADC 303 includes a state machine looking for a start pulse S after each line tune pulse 2. The start pulse S is rounded after passing through the network and the highest sampling position is given as the closest sample at its peak. The switched version of the clock can be used when it is given a better sampling position.

The training sequence will now be described. The training sequence is 1024 long lines and applies five symbols at the start of each line between the start pulse (S) and the valid data symbol (D). The first symbol (M) in the sequence indicates the start of the training sequence, which is high on the first line of the sequence (level 7) and low on all other lines (level 0). The other three symbols T ₁ , T ₂ , and T ₃ give the last symbol T _4, which is low (level 0) or high (level 7), giving 2 × 8 ³ , a 1024 combination applying 1024 lines (approx. 65 mSec) Compute through the sequence of all possible combinations of 8 levels for ³ symbols (8 ³ combinations).

At the receiver, the level of the fourth symbol T ₃ in the training sequence of each line is stored and sampled in the FIFO 306. After FIFO 306 line 1024 contains examples of all levels of the fourth symbol with all combinations of the two preceding symbols T ₁ , T ₂ and high or low consecutive symbols T ₄ . 5 shows an example of an item of FIFO after 11 lines of data. The microprocessor 308 calculates each set of seven determined thresholds in the combination of preceding or successive levels and generates a look-up-table (LUT) stored in the SRAM 312. For example, in FIFO 306 samples 1-8 represent the level of the fourth symbol of training data T ₃ when the symbol T ₄ subsequent to the preceding symbols T ₁ and T ₂ becomes level zero. The microprocessor 308 calculates seven decision thresholds to be applied when the two preceding symbols become zero and the consecutive symbols become zero. This is typically two received training levels where the threshold is (threshold = L ₁ + [(L ₂ -L ₁ ) / 2] where L ₁ and L ₂ are the received levels for consecutive T ₃ symbols. By setting the respective thresholds for T _{3 which} are intermediate in. Figure 6 shows an example of the thresholds for cases of this being stored in the RAM 310 of the microprocessor. The microprocessor then uses a set of thresholds for calculating the LUT, as shown in Figure 7, and is stored in the SRAM 312.

In this case, the LUT is used to perform a threshold of valid data D in real time. 8-bit input data is applied to the LUT 312 via input a. The two preceding samples of input data are input into b and c, respectively. The level of the next example of the input data is input via the input d. This input d is a simple high / low indication obtained from the sample before it appears at input a of comparator 312. For valid data, successive samples have some value between the maximum and the minimum (213 and 0, respectively, in this embodiment). The abstract threshold is set halfway between the maximum and the minimum. If the value of the next sample is higher than this threshold, the value of the next sample is considered high, and if the value is low it is considered low. Inputs b and c are only three bits that can be given as latched output from LUT 312 when they are quantized and can reduce the size of the required LUT.

In effect, the LUT contains two banks of SRAM. Once the LUT is calculated in the microprocessor and written in SRAM, it 'pages' the LUT in the real-time data path. At this time, the whole cycle of converting a new FIFO of the training data and recalculating the set of threshold values is performed again. This can average the whole set to reduce the effects of random noise and new LUT calculations. It is then paged in for the entire LUT. The process repeats until the processor performs the task. This system is suitable in the response of the communication link 40 and any long term change in the response is tracked.

To further improve, the microprocessor can use the samples stored in the FIFO 306 to measure the pulse response of the link. The pulse response indicates the level of some sample that depends more on subsequent samples than on the previous two samples if the bandwidth of the communication link is lowered. The training sequence is sampled at its third rather than fourth symbol and the input at the LUT can be changed to input a bit of sample that is more consecutive than the two former samples. The processor may then have samples of all connections of the former and latter samples.

The thresholded 3-bit symbol is passed through a BCH FEC detector / corrector that is converted to gray code and corrects for any single bit error in each 64-bit block. The data then passes through the FIFO 316 and is reclocked by the control 318 at successive 15.0 MHz. This is passed in the MPEG demultiplexer / decoder for decoding in conventional methods.

Claims (9)

A transmitter having means for encoding an input signal to form coded data; Each element of the coded data having at least one of two discrete signal magnitude levels; Encoding means for including a periodic training sequence of data in the coded data; And And a receiver for applying a threshold and receiving coded data so that a discrete level can be distinguished based on a received training sequence. The method of claim 1, The training sequence comprises at least two elements, and the receiver comprises means for monitoring the results of at least one element of the training sequence that is different from the elements of the sequence and applying a threshold. The method according to claim 1 or 2, Means for generating a look-up-table in accordance with the level of the element of the threshold applied in relation to the received training sequence. An input unit for receiving input data; Each element of the input data indicative of one of at least two discrete signal magnitude levels; The input data comprising a known training sequence; And Means for applying a threshold and thresholds such that the discrete level is distinguished from others. The method of claim 4, wherein The training sequence comprises at least two elements, and wherein the adapted threshold means comprises means for monitoring the results of at least one element of the training sequence different from the elements of the sequence and applying the threshold value. receiving set. The method according to claim 4 or 5, Means for generating a look-up-table in accordance with the level of the element of the threshold applied in relation to the received training sequence. Means for encoding an input signal to form coded data; Each element of the coded data having one of at least two discrete signal magnitude levels; And And encoding means for including a periodic training sequence of data in the coded data. The method of claim 7, wherein At least one element of the periodic training sequence, in turn, appears at each of the discrete signal magnitude levels. The method of claim 8, And the periodic training sequence comprises at least two elements representing each one of the discrete signal magnitude levels.