KR20000007779A - Method for forming electrode of plasma display device - Google Patents

Method for forming electrode of plasma display device Download PDF

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Publication number
KR20000007779A
KR20000007779A KR1019980027279A KR19980027279A KR20000007779A KR 20000007779 A KR20000007779 A KR 20000007779A KR 1019980027279 A KR1019980027279 A KR 1019980027279A KR 19980027279 A KR19980027279 A KR 19980027279A KR 20000007779 A KR20000007779 A KR 20000007779A
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South Korea
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forming
substrate
metal oxide
electrode
address electrode
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KR1019980027279A
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Korean (ko)
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KR100324562B1 (en
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김정준
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구자홍
엘지전자 주식회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J9/00Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
    • H01J9/02Manufacture of electrodes or electrode systems
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J11/00Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
    • H01J11/10AC-PDPs with at least one main electrode being out of contact with the plasma
    • H01J11/12AC-PDPs with at least one main electrode being out of contact with the plasma with main electrodes provided on both sides of the discharge space
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J11/00Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
    • H01J11/20Constructional details
    • H01J11/22Electrodes, e.g. special shape, material or configuration
    • H01J11/26Address electrodes

Abstract

PURPOSE: A method of forming a plasma display panel electrode is provided to enhance adherence of electrodes by forming an address electrode with an electroless plating using a metal oxide layer. CONSTITUTION: The plasma display panel comprises a first substrate and a second substrate which are parallel each other. A pair of retaining electrodes are formed in the first substrate, and address electrode are formed to a cross direction with the retaining electrodes in the second substrate. A fabricating method of the second substrate comprises the steps of forming a glass member(110) of good etching characteristic on the glass substrate(102); exposing, developing, and etching a photoresist(111) with a constant pattern to form a groove(107) after deposition of the photoresist(111) on the glass member(110); and forming an address electrode(112) on an overall surface of a metal oxide layer(113) with the electroless plating using a metal oxide layer.

Description

플라즈마표시장치의 전극형성방법Electrode Formation Method of Plasma Display Device

본 발명은 플라즈마 표시장치에 관한 것으로서, 특히 MOG구조의 플라즈마 디스플레이 패널(PDP)에 있어서 밀착성이 우수한 어드레스전극을 배면기판에 형성하기 위한 전극형성방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device, and more particularly, to an electrode forming method for forming an address electrode having excellent adhesion on a rear substrate in a plasma display panel (PDP) having a MOG structure.

도 1 은 일반적인 플라즈마 디스플레이 패널의 MOG(Metal On Groove)구조를 단면도를 통해 나타낸 것으로 이해를 돕기위해 상부구조를 90도 회전하여 도시하였다.FIG. 1 illustrates a MOG structure of a general plasma display panel through a cross-sectional view, and the upper structure is rotated 90 degrees for better understanding.

도면을 참조하여 PDP구조를 살펴보면, 화상의 표시면인 전면기판(1)과, 상기 전면기판(1)과 일정거리를 사이에 두고 평행하게 위치한 배면기판(2)으로 이루어지는데, 상기 전면기판(1)에는 배면기판(2) 대향면에 일정간격으로 형성된 복수개의 유지전극라인(3)과, 상기 복수개의 유지전극라인(3)위에 형성되어 방전전류를 제한하는 유전층(4)과, 상기 유전층(4)위에 형성되어 상기 유지전극라인(3)을 보호하는 보호층(5)으로 구성되며, 상기 배면기판(2)에는 복수개의 방전공간을 형성시키는 복수개의 그루브(7;Groove)와, 상기 그루브(7) 전면에 형성되고 유지전극라인(3)과 직교하는 어드레스 전극(6)과, 상기 어드레스전극(6)의 전면에 형성되어 방전시 가시광선을 방출하는 형광층(8)으로 이루어진다.Looking at the PDP structure with reference to the drawings, it consists of a front substrate (1) which is a display surface of the image, and a rear substrate (2) disposed in parallel with a certain distance between the front substrate (1), the front substrate ( 1) a plurality of sustain electrode lines 3 formed on the opposite surface of the rear substrate 2 at a predetermined interval, a dielectric layer 4 formed on the plurality of sustain electrode lines 3 to limit discharge current, and the dielectric layer. (4) formed on the protective layer (5) to protect the sustain electrode line (3), the back substrate (2) a plurality of grooves (Groove) for forming a plurality of discharge spaces, and An address electrode 6 formed on the entire surface of the groove 7 and orthogonal to the sustain electrode line 3 and a fluorescent layer 8 formed on the front surface of the address electrode 6 to emit visible light upon discharge.

상기와 같이 구성된 종래기술에 의한 PDP중 임의의 셀의 화상표시과정은 다음과 같다.The image display process of any cell in the PDP according to the prior art configured as described above is as follows.

먼저, 해당 유지전극라인(3)에 예비방전전압이 공급되면 이후의 어드레스 방전이 안정적으로 일어나도록 유지전극라인(3) 간에 예비방전이 일어난다.First, when the preliminary discharge voltage is supplied to the sustain electrode line 3, the preliminary discharge occurs between the sustain electrode lines 3 so that subsequent address discharge occurs stably.

그후, 유지전극라인(3)과 해당 어드레스 전극라인(6)에 어드레스 방전전압이 공급되면 상기 유지전극라인(3)과 해당 어드레스 전극라인(6)간의 어드레스 방전이 일어나게 된다. 즉, 셀 내부에서 전계가 발생하여 방전가스중의 미량전자들이 가속되고, 가속된 전자와 가스중의 중성입자가 충돌하여 전자와 이온으로 전리되며, 상기 전리된 전자와 중성입자와의 또 다른 충돌등으로 중성입자가 점차 빠른 속도로 전자와 이온으로 전리되어 방전가스가 플라즈마 상태로 되는 동시에 진공 자외선이 발생된다. 상기 발생된 자외선이 형광층(8)을 여기시켜 가시광선을 발생시키고 발생된 가시광선은 전면기판(1)을 통해서 외부로 출사되면 외부에서 임의의 셀의 발광 즉, 화상표시를 인식할 수 있게된다.Thereafter, when an address discharge voltage is supplied to the sustain electrode line 3 and the address electrode line 6, an address discharge occurs between the sustain electrode line 3 and the address electrode line 6. In other words, an electric field is generated inside the cell, and the trace electrons in the discharge gas are accelerated, the accelerated electrons and the neutral particles in the gas collide with each other, and are ionized into electrons and ions, and another collision between the ionized electrons and the neutral particles Neutral particles are gradually ionized into electrons and ions at high speed, and the discharge gas is turned into a plasma state and vacuum ultraviolet rays are generated. When the generated ultraviolet rays excite the fluorescent layer 8 to generate visible light, and the emitted visible light is emitted to the outside through the front substrate 1, the emitted ultraviolet light of an arbitrary cell may be recognized from the outside. do.

그후, 해당 유지전극라인(3)에 150V 이상의 유지 방전 전압이 공급되면 상기 쌍을 이루는 유지전극라인(3)간에 유지 방전이 일어나 각 셀의 발광을 일정기간동안 유지시키게 된다.Thereafter, when the sustain discharge voltage of 150 V or more is supplied to the sustain electrode line 3, sustain discharge occurs between the pair of sustain electrode lines 3 to maintain light emission of each cell for a predetermined period of time.

이와같이 동작되는 종래 PDP는 전면기판과 배면기판을 구성한 후 프리트글래스(미도시)를 이용하여 결합시키고 내부에는 방전가스를 집어넣고 완전히 밀봉하여 제조하게 된다.The conventional PDP operated as described above is manufactured by constructing a front substrate and a rear substrate, and then combining them using frit glass (not shown).

특히, 배면기판(2)에 방전공간을 형성하는 방법에 있어서 종래에 사용한 대표적인 것은 유전층을 형성한 후 스크린 마스크를 이용하여 일정 패턴으로 다층 인쇄하여 수직한 격벽을 쌓아 방전공간을 형성하는 방법이 있으나, 본 명세서에서는 상기에서 살펴본 바와같이 MOG구조에 대해 살펴보기로 한다.In particular, the typical method used to form the discharge space on the back substrate (2) is a method of forming a discharge space by forming a vertical partition wall by forming a dielectric layer and then printing a multilayer pattern in a predetermined pattern using a screen mask. In the present specification, the MOG structure will be described as described above.

MOG 구조는 형광층을 전기영동법에 의해 형성함으로 고정세화가 가능한 장점을 갖는 구조로서, MOG구조에 의한 방전공간 형성방법으로 기판글래스 상에 에칭성이 양호한 글래스재를 일정높이로 형성한 후 직접 포토마스크를 이용해 노광→ 현상→에칭공정에 의해서 형성하게 된다.The MOG structure has the advantage of being capable of high definition by forming the fluorescent layer by electrophoresis method, and after forming a glass material having good etching property on the substrate glass by a method of forming a discharge space by the MOG structure, the photo is directly It forms by the exposure → image development → etching process using a mask.

상기 MOG구조의 형성공정을 도 2를 참조하여 살펴보면 다음과 같다.Looking at the formation process of the MOG structure with reference to FIG.

먼저 배면기판(2)상에 에칭성이 좋은 글래스재(10)를 150∼180μm 정도 형성한후(a)→ 포토레지스트(11)를 도포 한다.(b)→ 그 다음 포토마스크(12)를 대고 노광시킨 후(c)→ 현상공정에서 현상시켜 패턴을 형성하고(d)→ 다시 에칭액에 넣어 그루브 형상(7)을 형성한다.(e)→ 상기 에칭공정은 에칭액에서 100∼300초 동안 에칭을 행하고 세정을 행한 후 소성로에 넣어 200∼500℃ 사이에서 20∼60분 동안 소성시킨다.First, the glass material 10 having good etching property is formed on the back substrate 2 about 150 to 180 μm, and then (a) → photoresist 11 is applied. (B) → Next, the photomask 12 is applied. After exposure to light (c)-> developing in the developing process to form a pattern (d)-> again in etching liquid to form the groove shape (7) (e)-the etching process is etched in etching liquid for 100-300 second. After carrying out the washing, washing is carried out and then placed in a firing furnace, which is fired for 20 to 60 minutes between 200 to 500 ° C.

그 후 포토레지스트(11)가 남겨진 기판상에 진공챔버내에서 스퍼터(SPUTTER)나 전자빔증착(E-BAEM)법을 이용해 금(Au) 또는 은(Ag)을 형성함으로 넓은면적의 전극막(12)이 완성되는 것이다.(f)→ 그리고 형광층(8)을 전기영동법으로 형성시키면 (g)단계와 같이 그루브(7) 전면에 어드레스전극(6)과 형광체(8)가 형성된 배면기판구조를 완성하게 된다.Subsequently, a large area of the electrode film 12 is formed by forming gold (Au) or silver (Ag) using a sputter or electron beam deposition (E-BAEM) method in a vacuum chamber on the substrate where the photoresist 11 is left. (F) → Then, if the fluorescent layer 8 is formed by electrophoresis, the back substrate structure in which the address electrode 6 and the phosphor 8 are formed on the entire surface of the groove 7 is formed as in step (g). You are done.

그러나 상기와 같은 종래 어드레스전극 형성공정은 진공배기시간에 의한 작업시간이 과다하게 소요되고, 진공장비의 사용으로 인한 제품의 제조단가가 상승하게 된다.However, the conventional address electrode forming process as described above takes excessive working time due to the vacuum exhaust time, and increases the manufacturing cost of the product due to the use of the vacuum equipment.

또한, 그루브 형성물질이 글래스재 이므로 전극의 증착에 따른 배면기판과 금속재간의 밀착력이 저하되고, 소성공정시 글래스재로부터 소다성분이 전극으로 확산/침투하여 전극이 오염되어 저항이 높아지는 등의 문제점이 있었다.In addition, since the groove forming material is a glass material, the adhesion between the back substrate and the metal material is reduced due to the deposition of the electrode, and the soda component is diffused / infiltrated into the electrode from the glass material during the firing process, resulting in contamination of the electrode and high resistance. there was.

본 발명은 상기한 바와같은 종래 기술의 문제점을 해결하기 위하여 발명된 것으로 MOG 구조에서의 어드레스전극과 그루브면 간의 밀착성을 향상시키고, 소성공정시 발생하는 전극의 오염을 방지하며, 작업시간의 단축을 통해 제품의 양산성을 높이도록 하는데 목적이 있다.The present invention is invented to solve the problems of the prior art as described above to improve the adhesion between the address electrode and the groove surface in the MOG structure, to prevent contamination of the electrode generated during the firing process, and to reduce the work time The purpose is to increase the mass production of the product through.

이를 실현하기 위한 본 발명의 기술적 수단은 전극형성공정에 있어서 금속산화막을 먼저 그루브상에 도포한 후 그 위에 어드레스전극을 무전해도금법을 이용하여 형성시키는 것이다.The technical means of the present invention for realizing this is to first apply a metal oxide film on the groove in the electrode forming step, and then form the address electrode on the groove by electroless plating.

도 1 은 종래 플라즈마 디스플레이 패널의 단면도.1 is a cross-sectional view of a conventional plasma display panel.

도 2 는 종래 기술에 의한 배면기판의 형성 공정도.2 is a process chart for forming a back substrate according to the prior art.

도 3 은 본 발명에 의한 어드레스전극 형성 공정도.3 is a process diagram for forming an address electrode according to the present invention;

*** 도면의 주요 부분에 대한 부호의 설명 ****** Explanation of symbols for the main parts of the drawing ***

1 : 전면기판 2 : 배면기판1: Front board 2: Back board

3 : 유지전극 4 : 유전층3: sustain electrode 4: dielectric layer

5 : 보호층 6 : 어드레스전극5: protective layer 6: address electrode

7,107 : 그루브 8 : 형광층7,107 groove 8: fluorescent layer

102 : 배면기판 110 : 글래스재102: back substrate 110: glass material

111,111': 포토레지스트(P/R) 112 : 어드레스전극111, 111 ': photoresist (P / R) 112: address electrode

113 : 금속산화막113: metal oxide film

이하, 본 발명을 첨부도면을 참조하여 이하에서 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

먼저, 본 발명에 의한 배면기판의 어드레스 전극 형성공정을 도 3를 참조하여 살펴보면 다음과 같다.First, the process of forming the address electrode of the back substrate according to the present invention will be described with reference to FIG. 3.

배면기판(102)상에 a단계와 같이 에칭성이 양호한 글래스재(110)를 형성한 후 P/R(111)을 도포하고 노광/현상/에칭공정을 거쳐 그루브(107)가 형성되는 c단계 까지는 종래와 동일하게 진행된다.Step c is formed on the back substrate 102 by forming the glass material 110 having good etching property as in step a, and then applying the P / R 111 and forming the groove 107 through an exposure / development / etching process. The process proceeds as in the prior art.

그리고 상기 패턴형성이 완료되면 P/R(111)을 제거한 후 d단계에서 나타낸 바와같이 금속산화막(113)을 기판의 전체면에 형성하면 금속산화막(113)은 그루브 (107)를 따라 박막형성되게 된다. 그위에 다시 P/R(111') 전면 도포후 노광/현상 공정을 거쳐 f단계와 같이 P/R(111') 패턴을 형성하고 어드레스전극(112)을 금속산화막(113)을 이용한 무전해도금법으로 형성하면 g단계와 같은 형상을 이루게 된다.When the pattern formation is completed, the P / R 111 is removed and then the metal oxide film 113 is formed on the entire surface of the substrate as shown in step d so that the metal oxide film 113 is thin filmed along the groove 107. do. The P / R (111 ') is coated on the entire surface, followed by an exposure / development process to form a P / R (111') pattern as in step f. The electroless plating method using the metal oxide layer 113 on the address electrode 112 is performed. If formed to form the same shape as step g.

상기의 공정이 완료된 후 P/R(111')을 제거하게 되면 h단계와 같은 형상을 이루어 배면기판구조를 완성하게 되는 것이다.When the P / R 111 'is removed after the above process is completed, the back substrate structure is completed by forming the shape as in step h.

즉, 본 발명에 의한 공정중 금속산화막(ZnO,TiO2등)을 이용한 무전해도금이라는 방법으로 그루브(107)에 금속층(Au,Ag등)을 형성함으로서 금속산화물과의 밀착성이 좋은 어드레스전극(112)으로 활용할 수 있게되는데, 이와같은 공정을 통해 이루어지는 전극형성공정은 진공챔버내에서 금속증착에 의해 형성되는 종래 진공공정에 비해 공정시간을 단축시킬 수 있고 종래의 무전해도금에 비해 금 속의 밀착성 향상 등의 효과를 가져올 수 있다.That is, by forming a metal layer (Au, Ag, etc.) in the groove 107 by a method of electroless plating using a metal oxide film (ZnO, TiO 2, etc.) during the process according to the present invention, an address electrode having good adhesion with a metal oxide ( 112), the electrode forming process through this process can shorten the process time compared to the conventional vacuum process formed by metal deposition in the vacuum chamber and the adhesion of the metal compared to the conventional electroless plating It can bring about effects such as improvement.

또한, 상기 금속산화막(113)은 기판의 소성공정중 글래스의 소다성분이 어드레스전극에 확산/침투하여 전극의 저항을 증가시키게 되는 것을 막아 주는 역할을 함으로 전극의 오염을 방지할 수 있는 것이다.In addition, the metal oxide film 113 prevents contamination of the electrode by preventing the soda component of the glass from diffusing / infiltrating the address electrode and increasing the resistance of the electrode during the firing process of the substrate.

이상 설명한 바와같이 본 발명의 기술적 요지는 금속산화막을 이용한 무전해도금법을 이용하여 어드레스전극을 형성시킴으로 전극의 밀착성을 향상시키는 것으로서, 밀착력 뿐만 아니라 소성공정중 발생하는 전극의 오염을 방지하고 제품의 양산성을 증가시키게 되는 등의 효과가 있게된다.As described above, the technical gist of the present invention is to improve the adhesion of the electrode by forming an address electrode by using an electroless plating method using a metal oxide film, and to prevent not only adhesion but also contamination of the electrode generated during the firing process and mass production of the product. The effect is to increase the sex.

Claims (3)

서로 평행하게 결합되는 두 개의 기판중 제1기판에는 유지전극이 쌍을 이루며 형성되고, 제2기판에는 상기 유지전극과 교차되는 방향으로 어드레스전극이 형성되어 다수의 단위셀을 이루는 플라즈마 디스플레이 패널중 제2기판의 제조공정은,Among the two substrates coupled in parallel to each other, a sustain electrode is formed in pairs on the first substrate, and an address electrode is formed on the second substrate in a direction crossing the sustain electrode to form a plurality of unit cells. 2 manufacturing process of the substrate, 상기 글래스기판(102)상에 에칭성이 양호한 글래스재(110)를 형성하는 단계와,Forming a glass material 110 having good etching property on the glass substrate 102; 상기 글래스재(110) 위에 포토레지스트(111)를 도포후 일정 패턴으로 노광/현상/에칭하여 그루브(107)를 형성하는 단계와,Forming a groove 107 by coating the photoresist 111 on the glass material 110 and then exposing / developing / etching in a predetermined pattern; 상기 형성된 그루브(107) 전면에 금속산화막(113)을 형성하는 단계와,Forming a metal oxide film 113 on the entire surface of the formed groove 107; 상기 금속산화막(113) 전면에 어드레스전극(112)을 금속산화막을 이용한 무전해도금법으로 형성하는 단계가 포함됨을 특징으로 하는 플라즈마 표시장치의 전극형성방법.And forming an address electrode (112) on the front surface of the metal oxide film (113) by an electroless plating method using a metal oxide film. 제 1 항에 있어서,The method of claim 1, 상기 금속산화막(113)은 패턴형성에 의해 글래스재 상단에 남아있는 포토레지스트(111)를 제거후 전체면에 형성하고,The metal oxide film 113 is formed on the entire surface after removing the photoresist 111 remaining on the top of the glass material by the pattern formation, 상기 어드레스전극(112)은 포토레지스트(111')의 도포/노광/현상공정을 통해 패턴형성후 형성됨을 특징으로 하는 플라즈마 표시장치의 전극형성방법.And the address electrode (112) is formed after the pattern is formed by applying, exposing and developing the photoresist (111 '). 제 1 항에 있어서,The method of claim 1, 상기 금속산화막은 산화아연, 산화티타늄 등의 재질로 이루어짐을 특징으로 하는 플라즈마 디스플레이 패널의 제조방법.The metal oxide film is a method of manufacturing a plasma display panel, characterized in that made of a material such as zinc oxide, titanium oxide.
KR1019980027279A 1998-07-07 1998-07-07 Electrode form methode of Plasma Display Panel KR100324562B1 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100672627B1 (en) * 2000-12-27 2007-01-23 엘지.필립스 엘시디 주식회사 Flat luminescence lamp and method for manufacturing the same
KR100709160B1 (en) * 2004-06-25 2007-04-19 후지쯔 가부시끼가이샤 Gas discharge panel and manufacturing method therefor

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09213215A (en) * 1996-01-30 1997-08-15 Nippon Sheet Glass Co Ltd Manufacture of plasma display device and glass board for plasma display device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100672627B1 (en) * 2000-12-27 2007-01-23 엘지.필립스 엘시디 주식회사 Flat luminescence lamp and method for manufacturing the same
KR100709160B1 (en) * 2004-06-25 2007-04-19 후지쯔 가부시끼가이샤 Gas discharge panel and manufacturing method therefor

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