KR20000007299U - Monitor grid voltage stabilization circuit - Google Patents

Abstract

The present invention relates to a control grid voltage stabilization circuit of the monitor, the circuit of the present invention is a PNP type first transistor (Q1) is connected to the collector terminal and the emitter terminal to the high voltage circuit 10 and the control grid (G1); The collector terminal is connected to the base terminal of the first transistor Q1, and the emitter terminal is composed of a PNP type second transistor Q2 grounded through the zener diode ZD1, and the first resistor R1 is the first resistor. The collector terminal of the transistor Q11 is connected to the base terminal, the contact of the second resistor R2 and the third resistor R3 is connected to the base terminal of the second transistor Q2, and the second resistor R2 is connected. The other end of the first transistor (Q1) is connected between the emitter terminal and the control grid (G1), the other end of the third resistor (R3) receives a mute signal from the microcomputer 20, the fourth resistor (R4) One end of) is connected between the emitter end of the first transistor (Q1) and the control grid (G1), and the other end is connected between the emitter end of the second transistor (Q2) and the zener diode (ZD1), Even if the amount of beam current flowing through the control grid G1 is kept constant, the control is always performed. The effect is to minimize the effect of grid G1 voltage on the screen brightness.

Description

A circuit for stabilizing a G1 of a monitor

The present invention relates to a control grid voltage stabilization circuit of a monitor, and more particularly, to a control grid voltage stabilization circuit of a monitor that is designed to maintain a constant control grid voltage at all times even when the amount of beam current flowing through the receiving pipe is changed.

FIG. 1 is a circuit diagram illustrating a high voltage circuit and a peripheral circuit of a general monitor. As shown in FIG. 1, the high voltage circuit 2 converts a power supply voltage supplied through a switching power supply circuit SMPS into a DC / DC converter 3. After stabilization to B + voltage through the), the voltage is boosted through the flyback transformer (FBT) of the high-voltage circuit (2).

Accordingly, when power is supplied to the monitor and the horizontal deflection circuit starts to operate, the high voltage circuit 2 generates a high pressure necessary in the water pipe and supplies it to the control grid, the focus grid, the screen grid, and the like.

At this time, about -120 output from the flyback transformer (FBT) of the high-voltage circuit (2) V _pp The voltage of the degree is negative (-) rectified through the diode (D1) and capacitor (C1) and then supplied to the control grid (G1) of the water pipe, controlling the amount of electrons emitted from the cathode of the water pipe to control the luminance modulation Control

The control grid (G1) is generally made of stainless steel cylindrical, the center surrounding the cathode is made to drill a small hole of about 0.6mm to make a fine electron beam and to control the amount of electrons generated in the cathode.

At this time, the lower the negative (-) voltage is supplied to the control grid (G1), the greater the force for suppressing the electron emission of the cathode, so the amount of electrons colliding with the fluorescent film is reduced, the darker the screen.

In general, supplying the necessary voltage (rated voltage) to each monitor circuit at the time of power-off or mode switching at the time causes abnormalities to each monitor circuit. Therefore, each monitor circuit is warmed up at the time of power-off or at the beginning of mode conversion. It is then necessary to supply a ready voltage lower than the rated voltage for normal operation and then supply the rated voltage. This is called a mute function, and a mute signal for performing the mute function is output from the microcomputer 4.

The mute signal is maintained at a low level during normal operation, and then transitions to a high level for a while when the power is turned off or a mode is changed. It suppresses the amount of electrons emitted to the film.

Referring to FIG. 1, the operation of the high voltage circuit is divided into normal operation and mute operation.

About -120 output from the flyback transformer (FBT) of the high voltage circuit (2) V _pp The voltage is negative rectified and the rectified -DC voltage (typically -80V) is smoothed at the capacitor C1.

First, when a low level mute signal is output from the microcomputer 4 during normal operation, the mute signal is input to the base of the second transistor Q2 and the second transistor Q1 is turned on as the first transistor Q2 is turned on. ) Is turned off, the DC voltage Va of -80V supplied from the high voltage circuit 2 drops to about -60V through the voltage attenuation load R3 + R4, so that the control grid G1 of the water pipe. Supplied to.

However, when a mute signal of high level is output from the microcomputer 4 during a mute operation (when the power is turned off or a mode is switched), the mute signal is input to the base of the second transistor Q2 so that the second transistor Q2 is applied. Since the first transistor Q1 is turned on as it is turned off, the DC voltage Va of -80V supplied from the high voltage circuit 2 is directly controlled through the first transistor Q1 through the control grid ( Supplied to G1).

Therefore, when the high level mute signal is output from the microcomputer 4 at the time of power-off or mode switching, the control grid voltage is lowered from -60V to -80V, thereby suppressing electron emission and darkening the screen as a whole.

Meanwhile, the DC / DC converter 3 changes the magnitude of the input power voltage according to the horizontal frequency by using the power supply voltage output from the switching power supply circuit SMPS (these voltages are referred to as B + voltages). It serves to supply the circuit 2 or the horizontal deflection circuit.

At this time, since the flyback transformer (FBT) is connected to the load of the water pipe (CRT), the DC / DC converter (3) as the number of beam current (Beam Current) less and less (in accordance with the change in brightness of the screen) ) It is designed to regulate B + voltage. That is, after sensing the voltage output from the secondary side of the flyback transformer (FBT) and appropriately signal processing, the feedback voltage V _fb ), You can adjust B +.

For example, when the beam current increases and the anode voltage (high voltage) falls, the feedback voltage ( V _fb ) Is lowered, thereby increasing the B + voltage, thereby increasing the high pressure generated from the flyback transformer (FBT). On the contrary, when the beam current decreases and the anode voltage (high voltage) increases, the feedback voltage ( V _fb ) Rises, thereby lowering the B + voltage and lowering the high pressure generated from the flyback transformer (FBT), thereby keeping the high pressure constant.

However, as described above, the conventional monitor is controlled according to the beam current change because the magnitude of the B + voltage changes as the beam current flowing through the water pipe changes and the magnitude of the secondary output voltage of the flyback transformer (FBT) changes. There was a problem that the grid G1 voltage was also sensitively changed.

Accordingly, the present invention has been made to solve the problems of the prior art as described above, the control grid voltage of the monitor to always maintain a constant control grid (G1) voltage even if the amount of beam current flowing through the water pipe is changed. The purpose is to provide a stabilization circuit.

The control grid voltage stabilization circuit of the monitor according to the present invention for achieving the above object,

A high voltage circuit for negatively rectifying the AC voltage output from the flyback transformer through a diode and a capacitor and supplying it to the control grid of the water pipe; A monitor equipped with a microcomputer that outputs a low level mute signal during normal operation and a high level mute signal when the power is turned off or the mode is switched.

A PNP type first transistor having a collector stage and an emitter stage connected to the high voltage circuit and a control grid;

A PNP type second transistor having a collector terminal connected to the base terminal of the first transistor and an emitter terminal grounded through a zener diode;

A first resistor connecting the collector terminal and the base terminal of the first transistor;

A second resistor having one end connected in parallel between the emitter end of the first transistor and the control grid and the other end connected to the base end of the second transistor;

A third resistor having one end connected in parallel between the second resistor and the base end of the second transistor and the other end receiving a mute signal from the micom; And

And a fourth resistor having one end connected in parallel between the emitter terminal and the control grid of the first transistor and the other end connected in parallel between the emitter terminal and the zener diode of the second transistor.

1 is a circuit diagram showing a high voltage circuit and a peripheral circuit of a general monitor;

2 is a circuit diagram showing a control grid voltage stabilization circuit of the monitor according to the present invention.

* Explanation of symbols for main parts of the drawings

10: high voltage circuit 20: microcomputer

Q 1,2: First and second transistor ZD1: Zener diode

D1: Diode C: Capacitor

R 1,2,3,4: 1,2,3,4 resistors

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2 is a circuit diagram showing a control grid voltage stabilization circuit of the monitor according to the present invention.

As shown in FIG. 2, the circuit of the present invention includes a high voltage circuit 10 which rectifies an AC voltage output from a flyback transformer FBT by a diode D1 and a capacitor C1; A microcomputer 20 for outputting a low level mute signal during normal operation and a high level mute signal when the power is turned off or the mode is switched; And a control grid voltage supply unit 30 which adds or subtracts a correction voltage by the amount of change of the -DC voltage to the -DC voltage input from the high voltage circuit 10 and supplies it to the control grid G1 of the water pipe.

The control grid voltage supply unit 30 has a PNP type first transistor Q1 having a collector terminal receiving a -DC voltage from the high voltage circuit 10 and an emitter terminal connected to the control grid G1 of the water pipe. Wow ; A PNP type second transistor (Q2) having a collector terminal connected to the base terminal of the first transistor (Q1) and having an emitter terminal grounded through a zener diode (ZD1); A first resistor R1 connecting between the collector terminal and the base terminal of the first transistor Q11; The second resistor R2 having one end connected in parallel between the emitter terminal of the first transistor Q1 and the control grid G1 of the water pipe and the other end connected to the base terminal of the second transistor Q2. ; A third resistor (R3) having one end connected in parallel between the second resistor (R2) and the base terminal of the second transistor (Q2) and the other end receiving a mute signal from the micom (20); And one end connected in parallel between the emitter terminal of the first transistor Q1 and the control grid G1 of the water pipe and the other end between the emitter terminal of the second transistor Q2 and the zener diode ZD1. The fourth resistor R4 is connected in parallel.

Subsequently, the operation and effects of the circuit according to the present invention configured as described above are divided into (a) initial operation, (b) -DC voltage decrease, (c) -DC voltage increase, and (d) mute operation. As follows.

At this time, since (a) the initial operation (b)-when the DC voltage decreases (c)-when the DC voltage increase is all the normal operation of the monitor, the low level mute signal is output from the microcomputer 20.

a. Initial operation

When the flyback transformer FBT operates and the (A) point voltage gradually drops from 0 V to the negative (-) voltage, the base voltage of the first transistor Q1 changes with the (A) point voltage, and the control grid G1 The voltage is maintained at 0 V until the first transistor Q1 is turned on.

(A) When the point voltage reaches a negative (-) voltage enough to turn on the first transistor Q1, the control grid G1 voltage is the first resistor R1, the second resistor R2, and the third resistor. (R3) has a voltage formed by the difference between the emitter voltage and the base voltage of the first transistor Q1.

At this time, as the voltage of the control grid G1 falls negatively, the fourth resistor R4 forms a path of the emitter current of the second transistor Q2 so that the zener diode ZD1 can maintain a constant voltage.

b. DC voltage decrease

When the -DC voltage output from the high voltage circuit 10 decreases, that is, when the (A) point voltage is lowered, the base voltage of the first transistor Q1, that is, the (C) point voltage, is lowered, so that the first transistor Q1 is reduced. As the current flowing from the emitter stage to the collector stage increases, the emitter voltage of the first transistor Q1, that is, the (D) point voltage, decreases, and thus the base voltage of the second transistor Q2, that is, the (B) point voltage. Is lowered.

At this time, the difference between the emitter voltage and the base voltage of the second transistor Q2 increases, and as the current flowing from the emitter end of the second transistor Q2 to the base end increases, the base voltage of the first transistor Q1, i.e. Since the (C) point voltage increases, the emitter voltage of the first transistor Q1, that is, the (D) point voltage increases.

Accordingly, when the -DC voltage output from the high voltage circuit 10 decreases, the control grid voltage supply unit 10 corrects the amount of the reduction through the control grid voltage supply unit 10 and supplies the correction amount to the control grid G1 of the water pipe.

At this time, the DC voltage (A point voltage) of -80V supplied from the high voltage circuit 2 drops to about -60V by the second and third resistors R2 and R3 and is supplied to the control grid G1 of the water pipe. do.

c. DC voltage increase

When the -DC voltage output from the high voltage circuit 10 increases, that is, when the (A) point voltage increases, the base voltage of the first transistor Q1, that is, the (C) point voltage increases, and thus the first transistor Q1 As the current flowing from the emitter stage to the collector stage decreases, the emitter voltage of the first transistor Q1, that is, the (D) point voltage becomes high, so that the base voltage of the second transistor Q2, that is, the (B) point voltage, increases. Increases.

At this time, the difference between the emitter voltage and the base voltage of the second transistor Q2 is reduced, and as the current flowing from the emitter terminal to the base terminal of the second transistor Q2 decreases, the base voltage of the first transistor Q1 is reduced. That is, since the (C) point voltage is decreased, the emitter voltage of the first transistor Q1, that is, the (D) point voltage is reduced.

Accordingly, when the -DC voltage output from the high voltage circuit 10 is increased, the amount is corrected by the increase amount through the control grid voltage supply unit 10 and then supplied to the control grid G1 of the water pipe.

At this time, the DC voltage (A point voltage) of -80V supplied from the high voltage circuit 2 drops to about -60V by the second and third resistors R2 and R3 and is supplied to the control grid G1 of the water pipe. do.

d. Mute operation

Since the high level mute signal is output from the microcomputer 20, the base voltage of the second transistor Q2, that is, the point voltage (B) is higher than the emitter voltage of the second transistor Q2, so that the second transistor Q2 Is turned off.

As the second transistor Q2 is turned off, the base voltage of the first transistor Q1, that is, the (C) point voltage is lowered, so that the first transistor Q1 is saturated.

Accordingly, the DC voltage (A point voltage) of -80 V supplied from the high voltage circuit 10 is supplied to the control grid G1 of the water pipe as it is through the first transistor Q1.

Therefore, when a high level mute signal is output from the microcomputer 20 when the power is turned off or the mode is switched, the voltage of the control grid G1 is lowered from -60V to -80V.

As described above, the circuit according to the present invention maintains the control grid voltage G1 constantly even when the amount of beam current flowing through the water pipe changes, thereby controlling the effect of the control grid voltage on the screen brightness. Minimize the effect.

Claims (1)

A high voltage circuit 10 rectifying the AC voltage output from the flyback transformer FBT through the diode D1 and the capacitor C1 and supplying the negative voltage to the control grid G1 of the water pipe CRT; In the monitor equipped with a microcomputer 20 for outputting the mute signal of the low level in normal operation and the mute signal of the high level when the power is turned off or the mode switch, A PNP type first transistor Q1 having a collector stage and an emitter stage connected to the high voltage circuit 10 and the control grid G1, respectively; A PNP type second transistor (Q2) having a collector terminal connected to the base terminal of the first transistor (Q1) and having an emitter terminal grounded through a zener diode (ZD1); A first resistor R1 connecting between the collector terminal and the base terminal of the first transistor Q11; A second resistor (R2) having one end connected in parallel between the emitter terminal of the first transistor (Q1) and the control grid (G1) and the other end connected to the base terminal of the second transistor (Q2); A third resistor (R3) having one end connected in parallel between the second resistor (R2) and the base terminal of the second transistor (Q2) and the other end receiving a mute signal from the micom (20); And One end connected in parallel between the emitter terminal of the first transistor Q1 and the control grid G1, and the other end connected in parallel between the emitter terminal of the second transistor Q2 and the zener diode ZD1. The control grid voltage stabilization circuit of the monitor, characterized in that it further comprises a resistor (R4).