KR20000001594A - Driving clock control circuit for ccd camera - Google Patents

Abstract

PURPOSE: A driving clock control circuit for a CCD camera is provided to selectively output an image data by controlling clock speed of necessary time section and unnecessary time section according to a data requirement format of an external digital device by setting a driving clock of the CCD camera suitable for the digital device to be interfaced with. CONSTITUTION: The driving clock control circuit for a CCD camera including a CCD(10) to convert an external optic signal into a electric signal, a signal compensation portion(20) to delete noise in the converted signal and to convert an analog signal input after automatically controlled on the gain into digital data by sampling and holding, a brightness/color control portion(30) to output a video signal by filtering or correcting the brightness and color of the digital data transferred from the signal compensation portion, a timing signal generation portion(40) to generate a synchronization signal and a driving clock signal necessary at the CCD, the signal compensation portion and the brightness/color compensation portion, a decoding portion(50) to decode the data output from the brightness/color compensation portion, a frame buffer memory(60) to store the data output from the decoding portion, a data transferring portion(70) to read and fit the data stored in the frame buffer memory into a clock speed of a digital device to be interfaced with, and a microcomputer(80) to control each portion of the system further comprises: a timing control portion(90) to receive via the microcomputer the clock speed of the digital device and a size information of data required and divide n times the master clock by using a predetermined program and output the result to the timing signal generation portion

Description

Drive Clock Control Circuit of CD Camera

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drive clock control circuit of a CD camera, and in particular, to facilitate interface between a CD camera and another digital device, a CD camera for controlling the drive clock of the CD camera to be adapted to a digital device to be interfaced. It relates to a drive clock control circuit of.

1 is a block diagram showing a configuration of a conventional CD camera, and as shown therein, a CD 10 for converting and outputting an optical signal input from the outside into an electrical signal; A signal correction unit 20 which removes noise components of the signal converted through the CD 10, samples / holds an input analog signal with automatic gain control, converts the converted analog data into digital data, and outputs the digital data; A luminance / color control unit 30 for correcting or filtering the luminance and color of the digital data transmitted from the signal correction unit 20 and outputting a video signal processed by the signal; A timing signal generator (40) for generating a synchronization signal and a driving clock signal required by the CD (10), the signal correcting unit (20), and the luminance / color control unit (30); A decoder (50) for decoding and outputting the data output from the luminance / color control unit (30) to be stored in a memory; A frame buffer memory 60 for storing data output from the decoder 50; A data transmission unit (70) for reading data stored in the frame buffer memory (60) and outputting the data at a clock speed of a digital device to be interfaced; Referring to the operation and operation of the conventional device composed of a microcomputer 80 for the overall control of each part of the system as follows.

When the control signal is generated by the microcomputer 80, the control signal is inputted by the timing signal generator 40 and the synchronization signal required by the CD 10, the signal corrector 20, and the luminance / color controller 30. And a driving clock signal are generated respectively.

Then, the CD 10 converts an optical signal input from the outside into an electrical signal and outputs it to the signal correcting unit 20.

Accordingly, the signal correction unit 20 removes noise components by sampling and holding the synchronization signal generated by the timing signal generator 40, and automatically adjusts an analog signal output from the CD 10. In addition, the image data is converted into digital data and output to the luminance / color control unit 30.

The luminance / color control unit 30 corrects the signal converted into digital data by the signal correction unit 20 under the control of the microcomputer 80, and corrects the corrected video signal to the decoder unit 50. Output

The decoder unit 50 decodes the data so that the data can be stored in the memory, and decodes the data in the frame buffer memory 60.

Next, the data stored in the frame buffer memory 60 is fetched by the data transmission unit 70 according to the clock speed of an external digital device (not shown) to be interfaced and finally output.

FIG. 2 is a clock waveform diagram of image data output in units of frames of a conventional apparatus, and when an external interface device of a CD camera is a television, NTSC (American color television transmission / reception method) / arm (PAL: Field-based periods are regularly repeated in accordance with broadcast formats such as European color television transmission / reception schemes).

That is, in case of NTSC, color reproduction is performed only when the frequency of the subcarrier (3.58MHz) is correctly adjusted during demodulation of the image data. Therefore, the driving clocks of the camera are made up of n times the subcarrier frequency.

However, in the conventional apparatus, when the driving clock of the camera is limited to a television standard such as NTSC or PAL, when interfacing a digital device other than the television, data is regularly stored in the frame buffer memory. There is a problem in that the manufacturing cost increases and the interface is difficult because the digital output must be output at the clock speed.

Therefore, the present invention was created in order to solve the above-mentioned conventional problems, and by controlling the drive clock of the CD camera to match the digital device to interface, the required section and the unnecessary section according to the data request format of the external digital device. It is an object of the present invention to provide a driving clock control circuit of a CD camera that can selectively output image data by controlling the clock speed of the camera.

1 is a block diagram showing the configuration of a conventional CD camera.

FIG. 2 is a clock waveform diagram of image data output in units of fields in FIG. 1. FIG.

Figure 3 is a block diagram showing the configuration of a CD camera to which the present invention is applied.

4 is a clock waveform diagram of image data output in units of fields in FIG. 3; FIG.

* Description of the symbols for the main parts of the drawings *

90 timing controller 90a dispensing unit

90b: mode selector 90c: clock counter

The configuration of the present invention for achieving the above object, the CD to convert the optical signal input from the outside into an electrical signal and output; A signal correction unit which removes noise components of the signal converted through the CD, samples / holds the input analog signal by automatic gain adjustment, converts the digital signal into digital data, and outputs the digital data; A luminance / color control unit for correcting or filtering the luminance and color of the digital data transmitted from the signal correction unit and outputting a video signal processed by the signal; A timing signal generator for generating a synchronization signal and a driving clock signal required by the CD and signal correction unit and the luminance / color control unit; A decoder unit for decoding and outputting data output from the luminance / color control unit; A frame buffer memory for storing data output from the decoder unit; A data transmission unit which reads data stored in the frame buffer memory and outputs the data according to a clock speed of a digital device to be interfaced; In a CD camera composed of microcomputers that collectively control each part of the system, the master clock is calculated by inputting a clock speed and data size information of a digital device to be interfaced through a microcomputer, and calculating the master clock. It is achieved by further comprising a timing controller for dividing n and outputting it to a timing signal generator. An embodiment according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a block diagram showing a configuration of a CD camera to which the present invention is applied, and a CD 10 converting and outputting an optical signal input from the outside into an electrical signal as shown in the figure; A signal correction unit 20 which removes noise components of the signal converted through the CD 10, samples / holds an input analog signal with automatic gain control, converts the converted analog data into digital data, and outputs the digital data; A luminance / color control unit 30 for correcting or filtering the luminance and color of the digital data transmitted from the signal correction unit 20 and outputting a video signal processed by the signal; A timing signal generator (40) for generating a synchronization signal and a driving clock signal required by the CD (10), the signal correcting unit (20), and the luminance / color control unit (30); A decoder unit 50 for decoding and outputting data output from the luminance / color control unit 30; A frame buffer memory 60 for storing data output from the decoder 50; A data transmission unit (70) for reading data stored in the frame buffer memory (60) and outputting the data at a clock speed of a digital device to be interfaced; In a CD camera composed of a microcomputer 80 for overall control of each part of the system, the clock speed of the digital device to be interfaced and the size information of the required data are inputted through the microcomputer 80 to be calculated by a predetermined program. The timing controller 90 further divides the clock (master clock) by n and outputs the timing signal generator 40.

Here, the timing controller 90 may include: a divider unit 90a that receives the main clock and divides the n-th output signal; A mode selector (90b) for selectively outputting one of the clocks outputted from the division unit (90a) by a mode selection signal output from the microcomputer (80); A clock counter unit 90c that receives a clock output through the mode selector 90b and counts and outputs a clock that can transmit the maximum data in one line by a clock setting signal output from the microcomputer 80. The operation and action of the present invention configured as described above will be described.

First, when information about the clock speed of the external digital device is output to the timing controller 90 by data communication with an external digital device (not shown) interfaced by the microcomputer 80, the timing controller 90 may divide the dispensing unit ( 90a) divides the main clock by n and outputs it to the mode selector 90b. Accordingly, the mode selector 90b selects one of several divided clocks by the mode select signal output from the microcomputer 80. The clock counter unit 90c outputs the clock counter unit 90c. The clock counter unit 90c counts a clock that can transmit the maximum data in one line based on the clock setting signal output from the microcomputer 80. Output to 40).

Accordingly, the timing signal generator 40 receives a clock that is properly divided by the timing controller 90 and outputs the synchronization signal required by the CD 10, the signal corrector 20, and the luminance / color controller 30. And a driving clock signal are generated respectively.

Then, the CD 10 is driven by the synchronization signal and the driving clock signal and converts an optical signal input from the outside into an electrical signal and outputs it to the signal correction unit 20.

Accordingly, the signal correction unit 20 removes noise components by sampling and holding the synchronization signal generated by the timing signal generator 40, and automatically adjusts an analog signal output from the CD 10. In addition, the image data is converted into digital data and output to the luminance / color control unit 30.

The luminance / color control unit 30 corrects the signal converted into digital data by the signal correction unit 20 under the control of the microcomputer 80, and corrects the corrected video signal to the decoder unit 50. Output

Accordingly, the decoder 50 decodes the raw data output from the luminance / color control unit 30 in accordance with a predetermined transmission data protocol and outputs the data to the data transmission unit 70 so that the data transmission unit 70 finally receives the external data. Allow data to be output to a digital device.

4 is a clock waveform diagram of video data output in units of fields according to the present invention, in which a format required by an external interface device of a CD camera requires an even field, and an odd field. When not needed, the driving clock for the even field outputs data at the normal clock speed according to the clock speed of the interfaced digital device, and the driving clock is made as fast as possible for the unnecessary field to minimize the time interval between fields. The output is externally reduced but is not output to the data transmission unit 70.

In other words, in the related art, the data stored in the frame buffer memory 60 at a regular time is fetched by the data transmission unit 70 at an appropriate time and output to the external device. If an even field is used and an odd field ( If the odd field is not used, time loss as much as the odd field occurs. That is, since the data is output in the even field section but the data is not output in the odd field section, the time delay until the even field is output again causes flickering. At this time, if the odd field part is discarded at high speed and the even field is output again, the time delay between the even fields is minimized, thereby shortening the frame construction time, thereby naturally moving the video.

As described above, the drive clock control circuit of the CD camera of the present invention controls the drive clock of the CD camera to meet the demands of the digital device to interface with, so that the required section and the unnecessary section are in accordance with the data request format of the external digital device. By controlling the clock speed to selectively output image data, the frame composition time is shortened, thereby producing a natural image.

Claims (2)

A CD for converting and outputting an optical signal input from the outside into an electrical signal; A signal correction unit which removes noise components of the signal converted through the CD, samples / holds the input analog signal by automatic gain adjustment, converts the digital signal into digital data, and outputs the digital data; A luminance / color control unit for correcting or filtering the luminance and color of the digital data transmitted from the signal correction unit and outputting a video signal processed by the signal; A timing signal generator for generating a synchronization signal and a driving clock signal required by the CD and signal correction unit and the luminance / color control unit; A decoder unit for decoding and outputting data output from the luminance / color control unit; A frame buffer memory for storing data output from the decoder unit; A data transmission unit which reads data stored in the frame buffer memory and outputs the data according to a clock speed of a digital device to be interfaced; In a CD camera composed of microcomputers that collectively control each part of the system, the master clock is calculated by inputting a clock speed and data size information of a digital device to be interfaced through a microcomputer, and calculating the master clock. and a timing controller which divides n and outputs the timing signal to the timing signal generator. 2. The apparatus of claim 1, wherein the timing controller comprises: a divider which receives the main clock and divides the n clock; A mode selector which selects and outputs one of the clocks output from the frequency divider by a mode selection signal output from a microcomputer; The drive of the CD camera comprising: a clock counter unit configured to receive a clock output through the mode selector and count and output a clock capable of transmitting the maximum data in one line by a clock setting signal output from a microcomputer Clock control circuit.