KR19990083302A - Digital modulation system using extended code set - Google Patents

Abstract

The present invention utilizes a modified orthogonal code with reduced autocorrelation sidelobe to provide improved multipath performance while maintaining crosscorrelation properties of the modified code. A digital modulation system. For example, the corrected orthogonal code can reduce the autocorrelation level so as not to exceed half of the corrected orthogonal code length. In certain embodiments, a Mary orthogonal keying (MOK) system is used that modifies orthogonal Walsh codes using complementary codes to improve the autocorrelation characteristics of Walsh codes. It improves the multipath performance of the MOK system while maintaining low correlation with the orthogonality of Walsh codes.

Description

Digital modulation method and system {DIGITAL MODULATION SYSTEM USING EXTENDED CODE SET}

TECHNICAL FIELD The present invention relates to a wireless communication system, and more particularly, to a digital modulation system for encoding information using a modified orthogonal code such as M­ary orthogonal keying (MOK).

A wireless communication channel can hardly be modeled solely as a line of pure site. Therefore, many unique paths resulting from scattering and reflection of signals between the transmitting station and the receiving station and between many objects lying around them must be considered. Due to the scattering and reflection of the signal, many different copies of the transmitted signal (multipath signal) arriving at the receiving station will have various delays, phase differences and attenuations. As a result, the received signal consists of the sum of several signals transmitted over separate paths. Since these path lengths are not equal to each other, the information carried over the radio link will undergo a spread in delay while being transmitted from the transmitting station to the receiving station. The amount of time dispersion between the copy of the first received transmission signal and the last reached copy with a signal strength above a certain level is often referred to as delay spread. Delay spread can result in intersymbol interference (ISI). The same multipath environment, together with delay spreading, causes locally severe changes in received signal strength while multipath signals are subjected to constructive and destructive interference at the receiving antenna. A multipath component is a combination of multipath signals arriving at a receiver with approximately the same delay. Changes in the amplitude of multipath components are commonly referred to as Rayleigh fading and can cause large information blocks to be lost.

Digital modulation techniques can be used to improve wireless communication links by providing greater noise immunity and robustness. In some systems, data to be transmitted over a wireless communication link may be represented or encoded in a time sequence of symbols, each symbol having an M finite state and representing N bit information. Digital modulation involves selecting a particular code symbol from M finite code symbols based on the N bit information applied to the modulator. In the M-ary keying scheme, log ₂ M bits of information may be represented or encoded by M different codes or code symbols transmitted. The transmitted code is received in several delayed copies of the transmitted code, and the receiver correlates the delayed versions of the received code to a known code by performing the summation of the autocorrelation for all possible multipath delays.

The autocorrelation sidelobe shows the correlation between the known code and the time shifted copy of the received code. If the code is the same as it or its shifted version, the code will have a high level of autocorrelation or autocorrelation side lobe. For example, in the code 1 1 1-1, the autocorrelation for zero shift is as follows.

Code 1 1 1 -1

Shifted code1 1 1 -1

Product 1 1 1 1

Correlation = sum of multiplied values = 4

The autocorrelation for one chip shift is

Code 1 1 1 -1

Shifted code 1 1 1 -1

Product 1 1 -1

Correlation = sum of multiplied values = 1

The autocorrelation for the two-chip shift is

Code 1 1 1 -1

Shifted code 1 1 1 -1

Product 1 -1

Correlation = sum of multiplied values = 0

The autocorrelation for three-chip shift is

Code 1 1 1 -1

Shifted code 1 1 1 -1

Product -1

Correlation = sum of multiplied values = -1

A lot of shifts result in an autocorrelation value of zero, in this example the maximum autocorrelation side lobe has a value or magnitude one. In this example, -1 was used instead of 0 at the receiver. Autocorrelation side lobes provide an indication of multipath performance. If the autocorrelation side lobe is large, some multipath components interfere with each other severely.

Crosscorrelation refers to code that is correlated with different codes. Binary orthogonal keying is a form of digital modulation that provides good cross-correlation between codes by encoding data using orthogonal codes that do not interfere with each other. 1 shows a general block diagram of an M-ary orthogonal keying system 10. In this example, the input data is scrambled by the scrambler 12 as defined by the Institute of Electrical and Electronics Engineers (IEEE) 802.11 standard. The data is then provided to a serial-to-parallel converter 14 that converts the serial data into eight parallel bits that make up the data symbol. The first modulator 16 receives three parallel bits and generates a code that is eight chips long from a look-up table, and the second modulator 18 receives three parallel bits and a second length eight from the lookup table. Generate the code. A chip is also actually a code bit but is referred to as a chip to distinguish it from data bits. In this embodiment, one parallel bit is provided to the first exclusive OR (XOR) gate 20 which inverts the code if the bit value is one. Similarly, the last remaining bit is provided to the second XOR gate 22 which inverts the code from the second modulator 18 if the bit value is one. In this embodiment, the output I _out of the XOR gate 20 is applied to the signal circuit 21 so that all zeros are reversed to -1 for transmission. In addition, the circuit 21 operates the I _out before being used to modulate a carrier (carrier) having a frequency ω is I _out by the mixer 24 can be converted and / or processed. Output Q _out from XOR 22 is applied to signal circuit 23 where all zeros are reversed to -1 for transmission. Circuit 23 Q _out this operation the Q _out before being used to modulate the degree shifted carrier 90 by a mixer 26, converted and / or processed. In this particular embodiment, the first modulator 16 corresponds to an inphase (I) component of the output signal and the second modulator 18 corresponds to a quadrature (Q) component of the output signal.

Since each modulator 12, 14 receives log ₂ M bits of information and selects one of the M orthogonal codes, the modulators 12, 14 perform M binary orthogonal keying or encoding. By including both I and Q components with different polarities, there are a total of (2M) ² possible code combinations, so that the entire 2 + 2log ₂ M bits can be encoded into one orthogonal code. In this example, M is eight. In the M orthogonal keying system, the M codes are usually based on the M chip Walsh code. Since M chip Walsh codes are orthogonal and cross-correlation is zero, and thus M chip Walsh codes tend to be easily distinguished from each other, it is advantageous to use M chip Walsh codes in M binary orthogonal keying systems. However, using Walsh codes as orthogonal code can cause potential problems. For example, if Walsh code 0 (all 1s) is selected as the code symbol, Walsh code 0 may appear as an unmodulated continuous wave (CW) carrier signal.

To prevent Walsh code 0 CW modulation, an M-ary orthogonal keying system has been proposed that modifies the Walsh code by reversing the last two bits of each Walsh code using a cover sequence (1 1 1 1 1 1 0 0). By modifying the Walsh code in this way, the Walsh code 0 CW modulation is solved, but the modified Walsh code still has the poor autocorrelation and spectral characteristics inherent in the Walsh code. To cope with the poor autocorrelation and spectral characteristics of Walsh codes, current systems multiply the output signal by a pseudorandom noise (PN) sequence. Some systems, EG Tiedemann, AB Salmasi, Kay S. Gilhausen, on September 23-25, 1991, in the IEEE PIMRC Conference Bulletin, pages 131-136. As described by KS Gilhousen in "The Design And Development of a Code Division Multiple Access (CDMA) System for Cellular and Personal Communications", it multiplies PN sequences that are much longer than Walsh codes. Another system multiplies the Walsh code with a PN sequence having the same length as the Walsh code. However, the autocorrelation properties of the result code are still lacking. If the transmission code does not have sufficient autocorrelation characteristics, the system's multipath performance can be degraded because the system has difficulty detecting delayed or shifted versions of the transmission code.

The present invention relates to a digital modulation / demodulation system that provides improved multipath performance while maintaining the cross-correlation properties of the modified code using a modified orthogonal code with reduced autocorrelation side lobes. The modified orthogonal cord has an autocorrelation side lobe that does not exceed half the length of the modified orthogonal cord. In some embodiments, the orthogonality and low cross-correlation properties of Walsh codes are improved by using a Mary orthogonal keying (MOK) system to modify orthogonal Walsh codes using complementary codes. Improve multipath performance of MOK systems while maintaining

1 is a block diagram of a M­ary orthogonal keying (MOK) system using Walsh codes modified by a cover sequence (1 1 1 1 1 1 0 0),

2 is a block diagram of a digital modulation system for reducing autocorrelation sidelobe of an orthogonal code using a modified orthogonal code;

3 is a block diagram of one embodiment of a MOK system in accordance with the principles of the present invention;

4 shows the packet error rate versus delay spread of the MOK system using the Walsh code modified by the cover sequence in the current system, and the packet error rate of the MOK system using the modified Walsh code to reduce the autocorrelation side lobe. Comparison graph of delayed diffusion,

5 is a block diagram of another embodiment of a MOK system in accordance with the principles of the present invention;

Figure 6 illustrates packet error rate versus delay spread of an embodiment of a MOK system using a Walsh code modified by a cover sequence in the current system, and a packet error rate of an embodiment of a MOK system using a modified Walsh code to reduce autocorrelation side lobes. Comparison graph of delayed diffusion,

7 is a block diagram of another embodiment of a MOK system in accordance with certain principles of the invention;

8 shows a digital demodulator in accordance with some principles of the invention;

9 illustrates a demodulation system using a digital demodulator according to some principles of the present invention;

10 illustrates another embodiment of a demodulation system using a digital demodulator in accordance with the principles of the present invention.

Explanation of symbols for main parts of the drawings

12: scrambler 14: serial / parallel converter

32, 34: first and second modulator

36, 38: first and second exclusive OR gates

21, 23: signal circuit 24, 26: first and second mixer

Other aspects and advantages of the invention will become apparent upon reading the following detailed description with reference to the accompanying drawings.

Embodiments of a digital modulation (demodulation) system for improving multipath performance of a wireless communication system are described below. 2 shows a digital modulator 28 in accordance with the principles of the invention. In response to the data bits, modulator 28 selects the corresponding one of the M codes. M codes are generated by modifying an orthogonal code set to reduce the level of autocorrelation associated with that orthogonal code while maintaining the orthogonality of the set. For example, even if the same chip in the code of the orthogonal code set is reversed, the modified orthogonal code is still orthogonal. In accordance with a feature of the invention, the orthogonal code set is modified with other codes to produce M orthogonal N chip codes with autocorrelation side lobes that do not exceed the N / 2 value. Modulator 28 may perform the modification by performing the modification of the orthogonal code using a predetermined processing circuit that implements certain logic, or store the modified orthogonal code in a lookup table. In addition, modulator 28 may store different sets of modified orthogonal codes according to desired changes during operation, and may calculate different sets of modified orthogonal codes. The modification of the orthogonal code can be performed by multiplying the code having excellent autocorrelation property by the orthogonal code element by element. Thus, modulator 28 generates a code with low autocorrelation while maintaining at least some orthogonality of the original orthogonal code. In this embodiment, the data bits are received in parallel and the code chips are generated in series. Depending on the application, data bits may be received in series, and code chips may be generated in parallel.

The complementary code or sequence is a set of sequences characterized in that the autocorrelation of the sequence sum at the time of shift in the sequence has a characteristic of 0 except for the main peak at zero shift. Therefore, complementary codes can be used to modify the orthogonal code set of modulator 28. The supplemental code was published in November 1980 by Robert L. Frank, IEEE Transactions ON information Theory, Vol. It is discussed in "Polyphase Complementary Codes" described in IT 26, No. 6, pages 641-647. For a length equal to a power of two, the complementary code is easily generated by the following rule. In other words, starting from sequence A = B = {1}, a double-length complement code is given as ABAB ', where B' is the inversion of all elements of sequence B. Thus, for lengths 2 through 16, the complementary code is

{1 0}

{1 1 1 0}

{1 1 1 0 1 1 0 1}

(1 1 1 0 1 1 0 1 1 1 1 0 0 0 1 0}

to be. In addition, different transformations may be performed on the complementary code to generate another supplementary code having the same length. For example, reversing the first or second half of the code would allow {1 1 1 0 1 0 1 1} to be another complementary code of length 8.

The complementary code has a low autocorrelation side lobe and the complementary code multiplied by the Walsh function produces another complementary code. Thus, modifying the Walsh code set using the supplemental code, the resulting modified Walsh code is also the complementary code and has the same low autocorrelation side lobe. The modified Walsh code set is also orthogonal, and the cross correlation between two different codes (for delay 0) is zero.

3 is an embodiment of a MOK system 30 that generates code of length 8 using modulators 32 and 34 in response to three information bits from serial / parallel converter 14. In this embodiment, the orthogonal code set is a Walsh code set of length 8 and the Walsh code set is modified using the complementary code. A Walsh code of length eight,

1 1 1 1 1 1 1 1

1 1 1 1 0 0 0 0

1 1 0 0 1 1 0 0

1 0 0 1 1 0 0 1

1 0 1 0 1 0 1 0

1 0 1 0 0 1 0 1

1 0 0 1 0 1 1 0

1 1 0 0 0 0 1 1

to be. In the previous system, the Walsh code is modified by an exclusive OR of the elements with the code {1 1 1 1 1 1 1 0 0}, so that the last two chips (or chips in the last two columns of the Walsh code set) of each Walsh code are reversed. However, this modified code has an autocorrelation side lobe of magnitude 5 (when using -1 instead of 0), which is greater than half the autocorrelation value of a chip code of length 8 and causes multipath performance problems. .

Instead, in the embodiment of FIG. 3, the MOK system 30 uses a complementary code of length 8, for example, the sequence {1 1 1 0 1 1 0 1} or {1 1 1 0 1 0 1 1}. Modify the Walsh code set with length 8. In the latter case, the modified Walsh code set is

1 1 1 0 1 0 1 1

1 1 1 0 0 1 0 0

1 1 0 1 1 0 0 0

1 0 0 0 1 1 0 1

1 0 1 1 1 1 1 0

1 0 1 1 0 0 0 1

1 0 0 0 0 0 1 0

1 1 0 1 0 1 1 1

Appears as This modified Walsh code set creates an autocorrelation side lobe of magnitude or value of only 2, even in the worst case. Thus, this modified code is comparable in terms of performance to a complementary Barker code where autocorrelation side lobes are limited to only one. The supplemental Barker code was published in November 1980 by Robert L. Frank, IEEE Transactions ON information Theory, Vol. It is discussed in "Polyphase Complementary Codes" described in IT 26, No. 6, pages 641-647. However, the Barker code or sequence is only present for constant odd lengths such as length 11. Of the two complementary codes, the former mentioned above has an improved cross-correlation property for time shifted codes.

During operation of the embodiment of FIG. 3, the scrambler 12 receives data and scrambles it according to the IEEE 802.11 standard. In other embodiments, the scrambler 12 is not essential and the data may be manipulated by other forms of data conversion, interleaving or modification, or applied directly to the serial / parallel converter 14. In this embodiment, the serial / parallel converter 14 is a 1: 8 multiplexer (MUX) that generates data symbols of eight data bits in parallel in accordance with a 1.375 MHz clock signal. The 8 bit data symbol is encoded into a symbol consisting of 8 chip codes or I / Q code pairs of codewords, such that the symbol spacing is equal to the code length. Three bits of the data symbols are provided to a first modulator 32 that generates a corresponding Walsh code of length 8 modified by the complementary code. The first modulator 32 generates a Walsh code of length 8 with a chip rate of approximately 11 MHz in accordance with the 11 MHz clock signal. In the above embodiment, each symbol contains 8 data bits, which are encoded in 8 chip independent I and A codes. A chip is also actually referred to as a chip to distinguish it from code bits but data bits. In this embodiment, the first modulator 32 corresponds to the I phase modulation branch of the MOK system 30 which produces the I component of the signal to be transmitted.

Three bits of the second set of data symbols from the converter 14 are provided to a second modulator 34 that generates a corresponding Walsh code of modified length 8 using the complementary code. The second modulator 32 corresponds to the Q phase modulation branch of the MOK system 30 which produces a Q component of the signal to be transmitted. In response to the three data bits, the second modulator 34 also generates a Walsh code of length 8 at a chip rate of approximately 11 MHz in accordance with the 11 MHz clock signal.

One of the remaining two bits of the data symbol 8 bits from the serial / parallel converter 14 is provided to the first XOR gate 36. If the bit is zero, the first XOR gate 36 changes the polarity of the Walsh code of length 8 from the first modulator 32. The resulting modified Walsh code I _out is provided to the signal circuit 21 to change 0 to 1 and is provided to the first mixer 24 to perform additional signal processing and / or conversion before modulating the carrier with frequency ω. The last remaining bit is provided to the second XOR gate 38. If the bit is zero, the second XOR gate 38 changes the polarity of the Walsh code of length 8 from the second modulator 34. The resulting modified Walsh code Q _out is provided to the second mixer 26 and provided to the signal circuit 23 for any conversion and / or processing before modulating a 90 degree shifted version of the carrier with frequency ω. If -1 is used instead of 0, the first and second XOR gates 36 and 38 can be replaced by multipliers to change the polarity of I _out and Q _out . The I _out modulation carrier and the Q _out modulation carrier are then combined and transmitted. Thus, this particular embodiment of MOK system 30 divides the eight bits of input data into four bits for the I branch and four bits for the Q branch. Three data bits on the I branch are encoded with an 8 chip code and three bits of the Q branch are encoded with an 8 chip code in parallel. Since the last two bits encode information by respectively determining the polarity of the 8-bit symbol, the MOK system 30 encodes the 8 data bits into 2 codes selected from 16 possible code sets. In this example, there are eight modified Walsh codes, which can be reversed to get 16 codes. At a symbol rate of 1.375 MSps and 8 bits / symbol, the data rate of the MOK system 30 is 11 MBps.

4 shows a comparison graph of packet error rate versus delay spread in a multipath fading channel using 8 bits / symbol in an 11 Mbps and 4 taps channel matched filter as will be understood by one skilled in the art. give. Curve 40 corresponds to digital modulation using a Walsh code modified by the cover sequence (1 1 1 1 1 1 0 0) of the current system 40, and curve 42 is complemented in accordance with the principles of the present invention. Corresponds to digital modulation using Walsh codes modified by code (1 1 1 0 1 0 1 1). The channel model used has a Rayleigh fading path independent of the exponentially decreasing multiplier delay profile. 4 shows that by using the complementary code, the system suffers about 50% greater delay spread than the other code (curve 40) to achieve a packet error rate of 1% or 10%.

5 illustrates an embodiment of a MOK system 50 that can be used in a fallback mode for the MOK system 30 (FIG. 3). Once again, the input data is scrambled by the scrambler 12 according to the IEEE 802.11 standard. The data is provided to a serial / parallel converter 52. In this embodiment the serial / parallel converter 52 generates 5-bit data symbols in parallel at a data symbol rate of 1.375 MSps. Modulator 54 receives three bits from a five-bit data symbol, which modulates 54 into three modified Walsh codes of length 8 in accordance with the principles of the present invention. A modified Walsh code of length 8 is provided in both I and Q branches 56 and 58. According to another aspect of this particular embodiment, this embodiment provides the same code to the multi-phase modulation path or branch so that the fallback mode is on a multi-phase modulation path such as I and Q branches 56 and 58 in this embodiment. Independent phase modulation such as quadrature phase shift keying (QPSK) or 8 phase shift keying (8PSK) of the same code. An 8 chip modified Walsh code is provided serially to the first XOR gate 60 on the I branch 56, and an 8 chip Walsh code is provided serially to the second XOR gate 62 on the Q branch 58. . One of the remaining two bits from the serial / parallel converter 52 goes to the first XOR gate 60 to adjust the polarity of the modified Walsh code of length 8 and to generate I _out on the I branch 56 and the other. The bit goes to the second XOR gate 62 to adjust the polarity of the modified Walsh code of length 8 and generate Q _out on the Q branch. According to an embodiment, if -1 is used instead of 0, the first and second XOR gates 60, 62 may be replaced by multipliers. Thus, when the data symbol is 5 bits / symbol and the symbol rate is 1.375 MBps, this embodiment provides a data rate of 6.8 MBps.

FIG. 6 shows 1) the Walsh code modified by the cover sequence (1 1 1 1 1 1 0 0) of the current system using QPSK at a fallback rate of 6.8 Mbps, 2) 8 at a fallback rate of 8.25 Mbps. Walsh code modified by a complementary code (e.g., 1 1 1 0 1 0 1 1) using PSK, 3) A supplemental code (e.g., using QPSK at a fallback rate of 6.8 Mbps) 1 1 1 0 1 0 1 shows a comparison graph of packet error rate versus delay spread in a multipath fading channel using the Walsh code modified by 1) and the same code on the I and Q branches (curve 65). . The channel used has a Rayleigh fading path independent of the exponentially decreasing multiplier delay profile. 6 shows that by using the code proposed by the present invention, the delay spread tolerance is more than doubled. 6 also shows that a digital modulation system can achieve a high data rate (8.25 Mbps) without losing much delay spread performance by using an alternative modulation scheme such as 8PSK instead of QPSK. .

7 illustrates an embodiment of a MOK system 66 that may be used in a fallback mode for the MOK system 30 (FIG. 3). The input data is scrambled by the scrambler 12 according to the IEEE 802.11 standard. The scrambled data is provided to a serial / parallel converter 68. In this embodiment the serial / parallel converter 68 generates four bit data symbols in parallel at a symbol rate of 1.375 MSps. Three bits among the four bit data symbols are received by the modulator 70 encoding three bits into a modified Walsh code of length 8 in accordance with the principles of the present invention. The modulator 70 generates Walsh codes of length 8 in series at a rate of 11 MHz. A modified Walsh code of length 8 is provided to the XOR gate 72 corresponding to both the I and Q branches. The modified Walsh code of length 8 is multiplied by the remaining bits of the data symbols from the serial / parallel converter 68 to adjust the polarity of the code of length 8 and produce I _out and Q _out in serial form. According to an embodiment, if -1 is used instead of 0, the XOR gate 72 may be replaced with a multiplier. Thus, at a data symbol of 4 bits / symbol and a symbol rate of 1.375 MBps, this embodiment provides a data rate of 5.5 MBps.

8 shows a digital demodulation system 76 used in a receiver (not shown) and receiving a transmission code from a transmitter (not shown) using the embodiment of the digital modulation system described above. Digital demodulation system 76 receives a modified orthogonal code in accordance with the principles of the present invention. In response to the corrected orthogonal code, the digital demodulation system generates a corresponding data symbol. Depending on the particular embodiment, the code chip and / or data bits may be in parallel or in series.

9 shows a demodulation system 80 using a digital demodulation system in accordance with the principles of the present invention. In this particular embodiment, the received signal is provided to both I and Q branches 82 and 84 of the demodulation system 80. The first mixer 86 extracts modulated I information by multiplying the received signal by cosωt, where ω is the carrier frequency, and the second mixer 88 multiplies the received signal by sinωt to extract the modulated Q information. After low pass filtering, the I and Q information is provided to correlator blocks 90 and 92, respectively. In this particular embodiment, the correlator blocks 90, 92 comprise eight correlators for correlating time delayed versions of I and Q information, respectively. Find code blocks 94 and 96 find known modified orthogonal codes with the highest correlation magnitude for I and Q information in accordance with the present invention. In certain embodiments, demodulator 76 (FIG. 8) or portions thereof may be performed within detection code blocks 94 and 96 or receive output from detection code blocks 94 and 96 to retrieve known orthogonal codes as appropriate data. It can be decoded into bits. According to an embodiment, the digital demodulation system 76 (FIG. 8), or a portion thereof, is a branch point of the I and Q paths 82 and 84 in the detection code blocks 94 and 96, in the detection polarity blocks 98 and 100, respectively. may be implemented at the output of the branching off and / or detection polarity blocks 98 and 100 to decode the modified orthogonal codes and generate corresponding data bits. In this embodiment, each of the detection polarity blocks 98, 100 decodes additional data bits from the polarity of the detected corrected orthogonal code.

FIG. 10 shows an embodiment of a demodulation system 110 that can be used at a fallback rate for demodulation system 80 (FIG. 9) receiving code symbols from modulation system 50 (FIG. 5), where the same code is used. Is transmitted on the multiple modulation path. The difference between the demodulation system 110 and the maximum rate demodulation system of FIG. 9 is that the code detection block 112 adds the square of the correlation output of the I and Q correlators 90, 92, and according to the present invention, the highest correlation complex. Is to detect a corrected orthogonal code having a size. According to one feature of this particular embodiment, there is the same code for digital demodulation on the I and Q paths 82 and 84. In this particular embodiment, block 114 detects a corrected orthogonal code with the highest complex correlation size. In some embodiments, demodulator 76 or portion thereof is performed within detection code block 112 or receives output from detection code block 112 to decode the modified orthogonal code into corresponding data bits. According to an embodiment, the digital demodulation system 76 (FIG. 8), or a portion thereof, is in the code detection block 112, in the phase detector 114, at the branch point of the path 116 and / or at the output of the phase detector 114. It can be implemented in to decode the corrected orthogonal code and generate the corresponding data bits. Phase detector 114 detects the phase of the complex correlation output to decode the extra 2 bits per code symbol for QPSK and the extra 3 bits per code symbol for 8 ms PSK.

In addition to the embodiments described above, alternative forms of digital modulation (demodulation) systems in accordance with the principles of the invention are possible, which omit and / or add, modify, or use components of the described system. For example, in the above embodiment, the QPSK phase shift modulation scheme (FIGS. 1, 3, 5) and binary phase shift keying (BPSK) (FIG. 6) are used together with the digital modulation scheme. May be used with amplitude modulation schemes including quadrature amplitude modulation (QAM) and other amplitude modulation schemes including 8PSK as will be appreciated by those skilled in the art. In addition, although the digital modulation system has been described using orthogonal codes 1 and 0 modified by codes 1 and 0, the digital modulation system may be performed using codes 1 and -1 or 1 and 0 depending on the embodiment. . In the embodiment described above, although codes 1 and -1 were received at the receiver and the correlation decision was described in terms of 1 and -1, the demodulation system may use 1 and 0 or 1 and -1 depending on the embodiment.

In addition, although the digital modulation system has been described using a particular form of separate components, the system can be performed with other processing in different forms. In addition, the various components constituting the digital modulation system and their respective operating parameters and characteristics must be properly matched with the operating environment to perform the appropriate operation. In addition, digital modulation systems and portions thereof may be specifically integrated circuits, software driven processing circuitry, firmware, lookup tables, or other discretes, depending on the application, as would be understood by those skilled in the art having the benefit of the present invention. It should also be understood that it may be implemented in an array of components. What has been described above is merely exemplary application of the principles of the present invention. Those skilled in the art will appreciate that such modifications, arrangements, methods, and various other modifications, arrangements, methods may be applied to the present invention without departing from the spirit and scope of the invention without strictly following the exemplary applications described and described herein. You will easily recognize that you can.

According to the present invention, a digital modulation (demodulation) system using a modified orthogonal code with reduced autocorrelation side lobes provides improved multipath performance while maintaining the cross-correlation characteristics of the modified code.

Claims (12)

Generating a modified code from an orthogonal code in response to a set of information bits, thereby providing a modified code with an autocorrelation sidelobe that is less than half the length of the modified code Information bit processing method characterized in that. The method of claim 1, And generating the modification code by modifying the orthogonal code using a complementary code. The method of claim 1, And wherein said modifying code generation step comprises using a Walsh code as said orthogonal code. The method of claim 1, And generating said modification code as one of M modification codes in response to a log ₂ M bit set. The method of claim 4, wherein Generating a modification code having a length M; The method of claim 5, And using M = 8. The method of claim 1, Providing the modification code to the multiple modulation path to modulate the modification code on a modulation path. In response to a modified orthogonal code modified from an orthogonal code, the demodulator generates a corresponding set of data bits and provides the modified code with an autocorrelation side lobe that is less than half the length of the modified orthogonal code. Demodulation method characterized in that. In response to the set of information bits, generating a modified Walsh code from the Walsh code using the complementary code Information bit processing method characterized in that. Generating a corresponding set of information bits in response to a modified Walsh code modified from the Walsh code using the complementary code. Demodulation method characterized in that. A modulator generating a modified code from an orthogonal code in response to a set of information bits to provide the modified code with an autocorrelation side lobe that is less than half the length of the orthogonal code Digital modulation system characterized in that. Modulator in response to a set of information bits, using a supplemental code to generate a modified modified Walsh code from Walsh code Digital modulation system characterized in that.